Vectrex 6809
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@ -76,17 +76,17 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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case 0x32: INDEX_OP(LEAS); break; // LEAS (Indexed)
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case 0x33: INDEX_OP(LEAU); break; // LEAU (Indexed)
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case 0x34: PSH(SP); break; // PSHS (Immediate)
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case 0x35: ; break; // PULS (Immediate)
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case 0x35: PUL(SP); break; // PULS (Immediate)
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case 0x36: PSH(US); break; // PSHU (Immediate)
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case 0x37: ; break; // PULU (Immediate)
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case 0x37: PUL(US); break; // PULU (Immediate)
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case 0x38: ILLEGAL(); break; // ILLEGAL
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case 0x39: RTS(); break; // RTS (Inherent)
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case 0x3A: ABX_(); break; // ABX (Inherent)
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case 0x3B: RTI(); break; // RTI (Inherent)
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case 0x3C: ; break; // CWAI (Inherent)
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case 0x3C: CWAI_(); break; // CWAI (Inherent)
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case 0x3D: MUL_(); break; // MUL (Inherent)
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case 0x3E: ILLEGAL(); break; // ILLEGAL
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case 0x3F: ; break; // SWI (Inherent)
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case 0x3F: SWI1(); break; // SWI (Inherent)
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case 0x40: REG_OP(NEG, A); break; // NEGA (Inherent)
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case 0x41: ILLEGAL(); break; // ILLEGAL
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case 0x42: ILLEGAL(); break; // ILLEGAL
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@ -119,22 +119,22 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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case 0x5D: REG_OP(TST, B); break; // TSTB (Inherent)
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case 0x5E: ILLEGAL(); break; // ILLEGAL
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case 0x5F: REG_OP(CLR, B); break; // CLRB (Inherent)
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case 0x60: REG_OP(TR, B); break; // NEG (Indexed)
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case 0x60: INDEX_OP(I_NEG); break; // NEG (Indexed)
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case 0x61: ILLEGAL(); break; // ILLEGAL
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case 0x62: ILLEGAL(); break; // ILLEGAL
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case 0x63: REG_OP(TR, B); break; // COM (Indexed)
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case 0x64: REG_OP(TR, B); break; // LSR (Indexed)
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case 0x63: INDEX_OP(I_COM); break; // COM (Indexed)
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case 0x64: INDEX_OP(I_LSR); break; // LSR (Indexed)
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case 0x65: ILLEGAL(); break; // ILLEGAL
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case 0x66: REG_OP(TR, B); break; // ROR (Indexed)
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case 0x67: REG_OP(TR, A); break; // ASR (Indexed)
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case 0x68: REG_OP(TR, A); break; // ASL , LSL (Indexed)
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case 0x69: REG_OP(TR, A); break; // ROL (Indexed)
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case 0x6A: REG_OP(TR, A); break; // DEC (Indexed)
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case 0x66: INDEX_OP(I_ROR); break; // ROR (Indexed)
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case 0x67: INDEX_OP(I_ASR); break; // ASR (Indexed)
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case 0x68: INDEX_OP(I_ASL); break; // ASL , LSL (Indexed)
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case 0x69: INDEX_OP(I_ROL); break; // ROL (Indexed)
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case 0x6A: INDEX_OP(I_DEC); break; // DEC (Indexed)
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case 0x6B: ILLEGAL(); break; // ILLEGAL
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case 0x6C: REG_OP(TR, A); break; // INC (Indexed)
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case 0x6D: REG_OP(TR, A); break; // TST (Indexed)
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case 0x6E: REG_OP(TR, A); break; // JMP (Indexed)
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case 0x6F: REG_OP(TR, A); break; // CLR (Indexed)
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case 0x6C: INDEX_OP(I_INC); break; // INC (Indexed)
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case 0x6D: INDEX_OP(I_TST); break; // TST (Indexed)
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case 0x6E: INDEX_OP(I_JMP); break; // JMP (Indexed)
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case 0x6F: INDEX_OP(I_CLR); break; // CLR (Indexed)
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case 0x70: EXT_MEM(NEG); break; // NEG (Extended)
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case 0x71: ILLEGAL(); break; // ILLEGAL
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case 0x72: ILLEGAL(); break; // ILLEGAL
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@ -8,7 +8,18 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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public const ushort LEAY = 1;
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public const ushort LEAS = 2;
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public const ushort LEAU = 3;
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public const ushort JMP = 4;
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public const ushort I_NEG = 4;
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public const ushort I_COM = 5;
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public const ushort I_LSR = 6;
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public const ushort I_ROR = 7;
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public const ushort I_ASR = 8;
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public const ushort I_ASL = 9;
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public const ushort I_ROL = 10;
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public const ushort I_DEC = 11;
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public const ushort I_INC = 12;
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public const ushort I_TST = 13;
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public const ushort I_JMP = 14;
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public const ushort I_CLR = 15;
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public ushort indexed_op;
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public ushort indexed_reg;
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@ -38,9 +49,12 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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PopulateCURINSTR(RD_INC_OP, ALU, PC, IDX_DCDE);
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}
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private void INDEX_OP_EX6()
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private void INDEX_OP_EX6(ushort oper)
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, IDX_DCDE);
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PopulateCURINSTR(IDLE,
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RD, ALU, IDX_EA,
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oper, ALU,
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WR, IDX_EA, ALU);
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}
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private void INDEX_OP_EX7()
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@ -284,6 +298,18 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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case LEAY: INDEX_OP_LEA(Y); break; // LEAY
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case LEAS: INDEX_OP_LEA(SP); break; // LEAS
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case LEAU: INDEX_OP_LEA(US); break; // LEAU
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case I_NEG: INDEX_OP_EX6(NEG); break; // NEG
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case I_COM: INDEX_OP_EX6(COM); break; // COM
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case I_LSR: INDEX_OP_EX6(LSR); break; // LSR
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case I_ROR: INDEX_OP_EX6(ROR); break; // ROR
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case I_ASR: INDEX_OP_EX6(ASR); break; // ASR
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case I_ASL: INDEX_OP_EX6(ASL); break; // ASL
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case I_ROL: INDEX_OP_EX6(ROL); break; // ROL
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case I_DEC: INDEX_OP_EX6(DEC8); break; // DEC
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case I_INC: INDEX_OP_EX6(INC8); break; // INC
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case I_TST: INDEX_OP_EX6(TST); break; // TST
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case I_JMP: INDEX_OP_JMP(); break; // JMP
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case I_CLR: INDEX_OP_EX6(CLR); break; // CLR
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}
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}
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}
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@ -47,7 +47,7 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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public const ushort SET = 32;
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public const ushort EI = 33;
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public const ushort DI = 34;
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public const ushort HALT = 35;
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public const ushort CWAI = 35;
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public const ushort STOP = 36;
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public const ushort ASGN = 38;
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public const ushort ADDS = 39; // signed 16 bit operation used in 2 instructions
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@ -80,8 +80,13 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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public const ushort EA_8 = 66;
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public const ushort EA_16 = 67;
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public const ushort PSH_n = 68;
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public const ushort WR_DEC_LO_OP = 69;
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public const ushort WR_DEC_HI_OP = 70;
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public const ushort PUL_n = 69;
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public const ushort WR_DEC_LO_OP = 70;
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public const ushort WR_DEC_HI_OP = 71;
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public const ushort SET_ADDR_PUL = 72;
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public const ushort SET_F_I = 73;
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public const ushort SET_E = 74;
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public const ushort ANDCC = 75;
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public MC6809()
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{
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@ -233,6 +238,13 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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Regs[IDX_EA] = (ushort)(Regs[indexed_reg] + (((Regs[ALU2] & 0x80) == 0x80) ? (Regs[ALU2] | 0xFF00) : Regs[ALU2]));
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Index_Op_Builder();
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break;
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case PUL_n:
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PUL_n_BLD(cur_instr[instr_pntr++]);
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break;
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case SET_ADDR_PUL:
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Regs[cur_instr[instr_pntr++]] = (ushort)((Regs[ALU2] << 8) + Regs[ADDR]);
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PUL_n_BLD(cur_instr[instr_pntr++]);
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break;
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}
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break;
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case WR:
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@ -302,9 +314,21 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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case MUL:
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Mul_Func();
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break;
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case SET_F_I:
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FlagI = true; FlagF = true;
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break;
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case SET_E:
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FlagE = true;
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break;
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case ANDCC:
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Regs[CC] &= Regs[instr_pntr++];
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break;
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case PSH_n:
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PSH_n_BLD(cur_instr[instr_pntr++]);
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break;
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case PUL_n:
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PUL_n_BLD(cur_instr[instr_pntr++]);
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break;
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case ADD16BR:
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ADD16BR_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]);
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break;
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@ -399,7 +423,7 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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interrupts_enabled = false;
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EI_pending = 0;
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break;
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case HALT:
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case CWAI:
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break;
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case STOP:
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@ -479,7 +503,8 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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ushort d9 = 0, ushort d10 = 0, ushort d11 = 0, ushort d12 = 0, ushort d13 = 0, ushort d14 = 0, ushort d15 = 0, ushort d16 = 0, ushort d17 = 0, ushort d18 = 0,
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ushort d19 = 0, ushort d20 = 0, ushort d21 = 0, ushort d22 = 0, ushort d23 = 0, ushort d24 = 0, ushort d25 = 0, ushort d26 = 0, ushort d27 = 0, ushort d28 = 0,
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ushort d29 = 0, ushort d30 = 0, ushort d31 = 0, ushort d32 = 0, ushort d33 = 0, ushort d34 = 0, ushort d35 = 0, ushort d36 = 0, ushort d37 = 0, ushort d38 = 0,
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ushort d39 = 0, ushort d40 = 0, ushort d41 = 0, ushort d42 = 0, ushort d43 = 0, ushort d44 = 0, ushort d45 = 0, ushort d46 = 0, ushort d47 = 0, ushort d48 = 0)
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ushort d39 = 0, ushort d40 = 0, ushort d41 = 0, ushort d42 = 0, ushort d43 = 0, ushort d44 = 0, ushort d45 = 0, ushort d46 = 0, ushort d47 = 0, ushort d48 = 0,
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ushort d49 = 0, ushort d50 = 0, ushort d51 = 0, ushort d52 = 0, ushort d53 = 0, ushort d54 = 0, ushort d55 = 0, ushort d56 = 0, ushort d57 = 0, ushort d58 = 0)
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{
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cur_instr[0] = d0; cur_instr[1] = d1; cur_instr[2] = d2;
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cur_instr[3] = d3; cur_instr[4] = d4; cur_instr[5] = d5;
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@ -493,7 +518,14 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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cur_instr[27] = d27; cur_instr[28] = d28; cur_instr[29] = d29;
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cur_instr[30] = d30; cur_instr[31] = d31; cur_instr[32] = d32;
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cur_instr[33] = d33; cur_instr[34] = d34; cur_instr[35] = d35;
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cur_instr[36] = d36; cur_instr[37] = d37;
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cur_instr[36] = d36; cur_instr[37] = d37; cur_instr[38] = d38;
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cur_instr[39] = d39; cur_instr[40] = d40; cur_instr[41] = d41;
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cur_instr[42] = d42; cur_instr[43] = d43; cur_instr[44] = d44;
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cur_instr[45] = d45; cur_instr[46] = d46; cur_instr[47] = d47;
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cur_instr[48] = d48; cur_instr[49] = d49; cur_instr[50] = d50;
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cur_instr[51] = d51; cur_instr[52] = d52; cur_instr[53] = d53;
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cur_instr[54] = d54; cur_instr[55] = d55; cur_instr[56] = d56;
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cur_instr[57] = d57; cur_instr[58] = d58;
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}
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// State Save/Load
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@ -262,6 +262,126 @@ namespace BizHawk.Emulation.Common.Components.MC6809
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}
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}
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private void PUL(ushort src)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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IDLE,
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PSH_n, src);
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}
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// Post byte info is in ALU
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// mask out bits until the end
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private void PUL_n_BLD(ushort src)
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{
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if (Regs[ALU].Bit(7))
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{
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PopulateCURINSTR(RD_INC_OP, CC, src, PUL_n, src);
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Regs[ALU] &= 0x7F;
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}
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else if (Regs[ALU].Bit(6))
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{
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PopulateCURINSTR(RD_INC_OP, A, src, PUL_n, src);
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Regs[ALU] &= 0x3F;
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}
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else if (Regs[ALU].Bit(5))
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{
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PopulateCURINSTR(RD_INC_OP, B, src, PUL_n, src);
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Regs[ALU] &= 0x1F;
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}
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else if (Regs[ALU].Bit(4))
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{
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PopulateCURINSTR(RD_INC_OP, DP, src, PUL_n, src);
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Regs[ALU] &= 0xF;
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}
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else if (Regs[ALU].Bit(3))
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{
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PopulateCURINSTR(RD_INC_OP, ALU2, src,
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RD_INC_OP, ADDR, src, SET_ADDR_PUL, X, src);
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Regs[ALU] &= 0x7;
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}
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else if (Regs[ALU].Bit(2))
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{
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PopulateCURINSTR(RD_INC_OP, ALU2, src,
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RD_INC_OP, ADDR, src, SET_ADDR_PUL, Y, src);
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Regs[ALU] &= 0x3;
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}
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else if (Regs[ALU].Bit(1))
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{
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if (src == US)
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{
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PopulateCURINSTR(RD_INC_OP, ALU2, src,
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RD_INC_OP, ADDR, src, SET_ADDR_PUL, SP, src);
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}
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else
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{
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PopulateCURINSTR(RD_INC_OP, ALU2, src,
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RD_INC_OP, ADDR, src, SET_ADDR_PUL, US, src);
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}
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Regs[ALU] &= 0x1;
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}
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else if (Regs[ALU].Bit(0))
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{
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PopulateCURINSTR(RD_INC_OP, ALU2, src,
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RD_INC_OP, ADDR, src, SET_ADDR_PUL, PC, src);
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}
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else
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{
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// extra end cycle
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PopulateCURINSTR(RD_INC_OP, IDLE);
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}
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}
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private void SWI1()
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{
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Regs[ADDR] = 0xFFFA;
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PopulateCURINSTR(SET_E,
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DEC16, SP,
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WR_DEC_LO, SP, PC,
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WR_DEC_HI, SP, PC,
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WR_DEC_LO, SP, US,
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WR_DEC_HI, SP, US,
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WR_DEC_LO, SP, Y,
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WR_DEC_HI, SP, Y,
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WR_DEC_LO, SP, X,
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WR_DEC_HI, SP, X,
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WR_DEC_LO, SP, DP,
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WR_DEC_LO, SP, B,
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WR_DEC_LO, SP, A,
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WR, SP, CC,
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SET_F_I,
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RD_INC, ALU, ADDR,
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RD_INC, ALU2, ADDR,
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SET_ADDR, ADDR, ALU, ALU2);
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}
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private void CWAI_()
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, ANDCC, ALU,
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SET_E,
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DEC16, SP,
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WR_DEC_LO, SP, PC,
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WR_DEC_HI, SP, PC,
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WR_DEC_LO, SP, US,
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WR_DEC_HI, SP, US,
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WR_DEC_LO, SP, Y,
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WR_DEC_HI, SP, Y,
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WR_DEC_LO, SP, X,
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WR_DEC_HI, SP, X,
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WR_DEC_LO, SP, DP,
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WR_DEC_LO, SP, B,
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WR_DEC_LO, SP, A,
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WR, SP, CC,
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CWAI);
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}
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private void DEC_16(ushort src_l, ushort src_h)
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{
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}
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private void HALT_()
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{
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}
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private void JR_COND(bool cond)
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{
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