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5495 Commits

Author SHA1 Message Date
Triang3l 9b83d3d0f4 [GPU] XeSL resolve shaders + host depth store width fix 2022-06-19 17:50:21 +03:00
Triang3l 166be463be [XeSL] Metal Shading Language definitions 2022-06-16 21:39:16 +03:00
Triang3l 127bf34264 [Vulkan] Trace dump tool 2022-06-13 13:03:02 +03:00
Triang3l ac268afbe9 [Vulkan] Fix 1<< uint32_t constants 2022-06-12 19:45:12 +03:00
Triang3l 140ed51e9a [GPU] Fix missing xenia-ui dependency in gpu > gpu-shader-compiler (needed for gmake2) 2022-06-12 19:44:24 +03:00
Triang3l 17c835b245 Merge branch 'master' into vulkan 2022-06-12 18:51:08 +03:00
Triang3l 820b7ba217 [GPU] Fix GetActiveTextureHostSwizzle return type 2022-06-12 18:50:38 +03:00
Triang3l 1a22216e44 [SPIR-V] Texture fetch instructions 2022-06-09 21:42:16 +03:00
Triang3l f875a8d887 Merge branch 'master' into vulkan 2022-06-09 21:35:12 +03:00
Triang3l 78d1eb8bf8 [GPU] TextureCache::GetActiveTextureHostSwizzle 2022-06-09 21:34:21 +03:00
Triang3l 56f72da137 [GPU] More exact PWL texture/RT gamma conversion 2022-06-07 21:26:34 +03:00
Triang3l a8cfe9bebb [Vulkan] Unsubsample odd-sized 4:2:2 textures 2022-06-02 23:10:50 +03:00
Triang3l 1ce45ee150 Merge branch 'master' into vulkan 2022-06-02 22:50:14 +03:00
Triang3l 55a91afcc7 [D3D12] Don't decompress unaligned BC textures if supported 2022-06-02 22:48:03 +03:00
Triang3l 84fcd5defa [GPU] Fix resolve destination offset and extent calculation 2022-06-02 21:47:30 +03:00
Triang3l a9a072bf00 [GPU] Explain why a 32x32x4bpp linear texture takes 2 pages, not 1 [ci skip] 2022-06-01 13:00:23 +03:00
Triang3l 8bd244f277 [GPU] Better explanation for exact texture memory extent calculation [ci skip] 2022-06-01 12:55:16 +03:00
Triang3l d1ad10b98c [GPU] Primitive reset comment typo correction [ci skip] 2022-05-31 23:23:53 +03:00
Triang3l efd7ef212a [D3D12] 128 megatexel limit explanation based on the spec [ci skip] 2022-05-31 23:23:10 +03:00
Triang3l 25594c918c [GPU] Fix tiled texture memory extent calculation 2022-05-31 23:17:33 +03:00
Rick Gibbed a3e5ea8575
[Base] Fix missing include in utf8.cc. 2022-05-27 17:56:14 -05:00
Triang3l 6c9a06b2da [Vulkan] Texture loading 2022-05-24 22:42:22 +03:00
Triang3l 9c445d397b [Vulkan] Fix single-type descriptor pool reuse 2022-05-24 22:37:49 +03:00
Triang3l aac28f19d1 Merge branch 'master' into vulkan 2022-05-24 22:34:40 +03:00
Triang3l a4840e1992 [GPU] FIXME comment for 1bpb/2bpb texture tiled extent 2022-05-24 22:33:27 +03:00
Triang3l 8701c9f24e [D3D12] Texture load code cleanup and resolution scaling fixes 
The resolution scale is now taken into account when copying from the mip tail.
 2022-05-24 22:28:42 +03:00
Triang3l 75c185e759 [GPU] Move texture load shader info to common 2022-05-24 22:24:33 +03:00
Triang3l f994d3ebb3 [Vulkan] Single block-compressed flag for host texture formats, not block sizes 2022-05-23 13:27:43 +03:00
Triang3l f7b0edee6b [Vulkan] GBGR/BGRG decompression 2022-05-23 13:18:47 +03:00
Triang3l 4c2f8764d6 Merge branch 'master' into vulkan 2022-05-23 12:36:35 +03:00
Triang3l c1f15c86a3 [GPU] Decompress GBGR/BGRG into RGBB, not RGB1 
While the alpha of the texture data is not used at all (replaced with blue using the view swizzle), still make the shader code state the intention more explicitly if the format is decompressed for use as signed. Unsigned 1.0 is 0xFF, while signed 1.0 is 0x7F.
 2022-05-23 12:31:45 +03:00
Triang3l cf3069eb13 [GPU] Signedness in Cr_Y1_Cb_Y0_REP/Y1_Cr_Y0_Cb_REP comment [ci skip] 2022-05-22 22:11:59 +03:00
Triang3l ef808e9def [GPU] _REP explanation in Cr_Y1_Cb_Y0_REP/Y1_Cr_Y0_Cb_REP comment [ci skip] 2022-05-22 21:46:11 +03:00
Triang3l 6735dbd941 [GPU] Calculate, not store, texture load host X blocks per thread 2022-05-22 21:21:54 +03:00
Triang3l 888d5044e0 [GPU] 2x1-subsampled texture RGBA8 conversion shader 2022-05-22 21:07:38 +03:00
Triang3l d3561d2f47 [D3D12] Pre-swizzle 2x1-subsampled formats 2022-05-22 20:31:48 +03:00
Triang3l 5de825e3a0 [GPU] Prevent multiple evaluation of XE_TEXTURE_LOAD_TRANSFORM arguments 2022-05-22 19:48:23 +03:00
Triang3l 2f0a884438 [GPU] Add k prefix to texture load group size constants 2022-05-22 19:35:25 +03:00
Triang3l 8f06ba6f7d [D3D12] Texture host BPB in LoadModeInfo 2022-05-22 19:28:05 +03:00
Triang3l 003c62ba73 [GPU] Correct rounding of texture load row size 
The original multiplication was likely added early during the development of generic resolution scaling. Before generic resolution scaling, invocations were done for unscaled guest blocks, now they're done for scaled blocks, so with 3x1 scaling, an invocation for 8 blocks writes 8 host blocks, not 24.
 2022-05-22 18:33:59 +03:00
Triang3l 6aa30ed074 [GPU] 128-thread groups in all texture load shaders 
Vulkan's minimum requirement (maxComputeWorkGroupInvocations) is 128.
 2022-05-22 18:03:09 +03:00
Triang3l 91c4e02e96 [Vulkan] Implement ClearCaches and don't do it for pipelines 2022-05-22 15:05:15 +03:00
Triang3l 35cfb07967 Merge branch 'master' into vulkan 2022-05-22 14:56:44 +03:00
Triang3l 88784101c8 [D3D12] Remove PipelineCache::ClearCache leftovers 2022-05-22 14:56:22 +03:00
Triang3l 68e7c56918 Merge branch 'master' into vulkan 2022-05-22 14:47:20 +03:00
Triang3l d31ddd9b23 [GPU] Remove PipelineCache::ClearCache 2022-05-22 14:46:03 +03:00
Triang3l 08769de68b [Vulkan] Texture object and view creation 2022-05-19 21:56:24 +03:00
Triang3l b0e1916f75 Merge branch 'master' into vulkan 2022-05-19 21:46:21 +03:00
Triang3l 9aaf19a455 [Vulkan] Remove unused variable in VulkanPresenter::GuestOutputImage::Initialize 2022-05-19 21:45:48 +03:00
Triang3l c85c2f5b79 Merge branch 'master' into vulkan 2022-05-19 21:43:19 +03:00
Triang3l 1dcc919a33 [GPU] Move k_Y1_Cr_Y0_Cb_REP usage example to xenos.h 2022-05-19 21:41:52 +03:00
Triang3l 7d63d6e1d3 [D3D12] Fix 2:1-subsampled format swizzle 2022-05-19 21:40:03 +03:00
Triang3l 825a5b176c [D3D12] Fix frontbuffer resource state 2022-05-19 21:39:11 +03:00
Triang3l 46202dd27a [Vulkan] Basic texture descriptor set allocation/binding 2022-05-17 22:42:28 +03:00
Triang3l 3381d679b4 Merge branch 'master' into vulkan 2022-05-17 22:31:34 +03:00
Triang3l 7675b6b140 [DXBC] Cleanup texture/sampler name setting 2022-05-17 22:30:55 +03:00
Triang3l 533de3b477 [D3D12] Remove unnecessary binding count uint32_t casts 2022-05-17 21:33:17 +03:00
Triang3l 5f2b0a899a [Vulkan] Fix TransientDescriptorPool ignoring the descriptor type 2022-05-15 22:20:24 +03:00
Triang3l f9261811a9 [D3D12] Fix layouts_mutex_ lock naming 2022-05-15 18:52:28 +03:00
Triang3l 0db94a700f [Vulkan] Use pipeline layout key structures directly 2022-05-15 17:42:27 +03:00
Triang3l b80361ee3c [Vulkan] Texture cache: Maximum dimensions, null images 2022-05-15 16:59:27 +03:00
Triang3l 185c23dd50 [Vulkan] Gather shader stages that VS can be translated into 2022-05-15 16:31:24 +03:00
Triang3l 7d19a8c0e8 [Vulkan] Add missing <functional> include for std::hash 2022-05-15 16:20:12 +03:00
Triang3l 862c457761 [Vulkan] Use Shader::IsHostVertexShaderTypeDomain 2022-05-15 16:19:36 +03:00
Triang3l 05adfbc58d Merge branch 'master' into vulkan 2022-05-15 16:18:41 +03:00
Triang3l a65fd4f673 [GPU] Shader::IsHostVertexShaderTypeDomain 2022-05-15 16:13:05 +03:00
Triang3l f9b3b90a68 [D3D12] Subsystem management order cleanup 2022-05-14 22:30:06 +03:00
Triang3l 60052fb4fc [Vulkan] Don't require imageViewFormatSwizzle in the immediate drawer 2022-05-14 22:18:21 +03:00
Triang3l d6a9056952 [D3D12] D3D12Texture::SRVDescriptorKey structure 2022-05-14 18:41:15 +03:00
Triang3l 26cf717394 [GPU] Make TextureCache constructors explicit 2022-05-14 18:28:32 +03:00
Triang3l 775b4623dc Merge branch 'master' into vulkan 2022-05-14 17:05:39 +03:00
Triang3l d280b3953d [GPU] Texture object/binding management to common superclass 2022-05-14 16:18:10 +03:00
Triang3l af3158f1bf [Legacy Vulkan] Add Vulkan prefix to Pipeline/TextureCache to avoid future name collisions 2022-05-11 21:21:33 +03:00
Triang3l 73d574a046 [Vulkan] Rectangle and quad list geometry shader generation 2022-05-10 21:48:18 +03:00
Triang3l b9256fcdbd Merge branch 'master' into vulkan 2022-05-10 15:57:50 +03:00
Triang3l e6fb9883d2 [D3D12] Discard primitives with NaN position in GS 2022-05-09 22:34:17 +03:00
Triang3l 4cd4a91aa7 [D3D12] Rectangle GS comment typo fix [ci skip] 2022-05-09 19:17:55 +03:00
Triang3l 8f0e751909 [D3D12] Runtime geometry shader generation 2022-05-09 19:16:22 +03:00
Triang3l 44cda56d35 [GPU] Handle kRegisters and kGammaRamp in the trace viewer 2022-05-08 19:41:11 +03:00
Triang3l 2473496c7e [GPU] Make RegisterFile::kRegisterCount constexpr 2022-05-08 19:37:29 +03:00
Triang3l 72cf75f365 [DXBC] Geometry shader instructions 2022-05-07 22:11:31 +03:00
Caroline Joy Bell d36c3975d8 [UI] Implement Type::kDirectory in Win32FilePicker 2022-05-07 21:54:26 +03:00
Triang3l e3425b242e [DXBC] Both v[#] and v[#][#] operands for HS and GS 2022-05-07 16:17:17 +03:00
Triang3l 5875f6ab31 [UI] Windows: Disable rounded corners 2022-05-05 21:46:20 +03:00
Triang3l 9c8e0cc53e [GPU] DC_LUT_PWL_DATA comment fix [ci skip] 2022-05-05 13:13:30 +03:00
Triang3l c794d0d538 [GPU] DC_LUT_RW_INDEX/WRITE_EN_MASK + gamma ramp and registers in traces 2022-05-05 13:10:29 +03:00
Triang3l 2d90d5940f [DXBC] Jump to the loop skip address before pushing 2022-05-04 22:01:30 +03:00
Triang3l 0e0f04dc1d [D3D12] Fix point size calculation + point code cleanup 
6fcf9d21fe made per-vertex diameter vs. constant radius consistent, and with that commit the shader works with direct pixel to NDC conversion, however, the NDC conversion factor was outdated in that commit (still included the 0.5 factor for diameter to radius conversion, resulting in all points being 50% narrower along each axis than needed). Now, the diameter to radius conversion factor is used there properly, and also the multiplication of the per-vertex diameter by 0.5 has been removed from the shader since the constant already includes it now (the constant diameter is passed via the system constants instead of the radius also).
 2022-05-04 13:26:30 +03:00
Peter Wright 7ab5ccbbd9 Add #include <cfloat> to fix build error on Linux. 2022-05-03 19:45:10 +03:00
Triang3l 9e6f96a2fc Merge branch 'master' into vulkan 2022-05-03 16:21:30 +03:00
Triang3l 6fcf9d21fe [D3D12] Point sprite size fixes, point/line bits in PsParamGen 2022-05-03 16:15:16 +03:00
Triang3l fe50c5c2e5 [XeSL] Prefix all local names with `xesl_id/var_` 2022-05-03 13:48:32 +03:00
Triang3l 72a4d14056 Merge branch 'master' into vulkan 2022-05-03 00:13:31 +03:00
Triang3l b88f715140 Merge branch 'master' into vulkan 2022-05-03 00:13:17 +03:00
Triang3l 7a89ad16a6 [D3D12] Update D3D12RenderTargetCache::Update write mask argument name 2022-05-02 23:16:18 +03:00
Triang3l 0fd578cafd [GPU] Get unclipped draw height by running VS on the CPU 2022-04-28 22:25:25 +03:00
Triang3l b2b1d7b518 [GPU] More accurate vertex kill + PsParamGen/point documentation 2022-04-27 23:10:56 +03:00
Triang3l 5ec0c92601 [GPU] Ignore z_enable for !z_write_enable && z_func == ALWAYS 2022-04-27 21:46:29 +03:00
Triang3l 5519dbb39f [GPU] Shader control flow documentation improvements 2022-04-27 21:34:08 +03:00
Triang3l b42680abf7 [GPU] Shader ALU refactoring + documentation 
Mainly move instruction info from the ShaderTranslator to xe::gpu::ucode for future use in the CPU shader interpreter
 2022-04-27 20:52:20 +03:00
Triang3l df9a37f798 [GPU] Ucode disasm: Fix exec formatting 2022-04-26 23:08:31 +03:00
Triang3l 69958cba9d [GPU] shader-compiler: Accept little-endian ucode 2022-04-26 22:59:02 +03:00
Triang3l 443d61c9e1 [D3D12] GetFormatCopyInfo: Remove unused divide_by_block_size variable 2022-04-26 22:42:17 +03:00
Triang3l fcf6a7ded1 [Android] Minor postInvalidateWindowSurface JNI cleanup 2022-04-26 22:41:11 +03:00
Triang3l 12ff951972 [Base] More flexible Xenos float16 conversion functions 2022-04-26 22:35:37 +03:00
Joel Linn e3dd873892 [Base] Fix wait for callback return 
- If wait item has disarmed itself and is then disarmed by another
  thread, still wait for the callback to return to meet guaratees
 2022-04-26 13:56:11 -05:00
Joel Linn 3b4dc7da3b [Base] Use disruptorplus spin wait 
- Attempt to fix deadlocks when using valgrind on CI
 2022-04-26 13:56:11 -05:00
Joel Linn e59a0e1206 [Base] Relax some timing constraints. 
- Because setting the timer is scheduled by us but the wait on POSIX is
  currently scheduled by pthreads, this solves issues on overprovisioned
  CIs
 2022-04-26 13:56:11 -05:00
Joel Linn 4a36a7962c [Base] Remove unneeded delay scheduler 2022-04-26 13:56:11 -05:00
Joel Linn 15950eec37 [Base] Use chrono APIs for Timers 2022-04-26 13:56:11 -05:00
Joel Linn 1478be14c7 [Base] Add chrono tests 2022-04-26 13:56:11 -05:00
Joel Linn 23eef94984 [Base] Add chrono support 
- WinSystemClock is a FILETIME clock without scaling, can convert to
  system_time
- XSystemClock is a FILTETIME clock with scaling applied, can only
  convert to WinSystemClock
 2022-04-26 13:56:11 -05:00
Joel Linn 9b4168cce9 [Base] Make HighResolutionTimer platform agnostic 2022-04-26 13:56:11 -05:00
Joel Linn 75357caeaf [Base] Add TimerQueue 
- Cross platform functionality similar to Windows' `CreateTimerQueue`
  with `WT_EXECUTEINTIMERTHREAD`
 2022-04-26 13:56:11 -05:00
Joel Linn a85fc25040 [Base] Add more tests for HighResolutionTimer 2022-04-26 13:56:11 -05:00
Wunkolo be8b9c512f [x64] Add GFNI optimization for SPLAT(int8) 
`pxor` is a zero-uop register-rename and `gf2p8affineqb dest, zero, int8`
is a very quick single-instruction way to use affine galois
transformations to fill a register with an immediate byte without
touching memory.
 2022-04-26 13:46:46 -05:00
Gliniak 3a115ae6a0 [Kernel] Restored usage of: log_string_format_kernel_calls 2022-04-14 13:48:24 -05:00
Triang3l ef8a60e011 [GPU] Round tessellation patch vertex count up (by @deaklajos #2007) 
Also move the clamping of the guest index count to the index buffer size to the place before it's read in calculations
 2022-04-14 21:19:12 +03:00
Triang3l 38aca269e1 [GPU] Offset and clamp tessellation patch index (#2008, thanks @deaklajos) 2022-04-14 13:04:34 +03:00
Triang3l fea430f1f9 [GPU] Fix scalar c[#+aL], shader docs/refactoring 2022-04-13 23:08:19 +03:00
Triang3l 1f324bebcd [GPU] Norm16 > float16 texture load shaders 2022-04-09 23:34:50 +03:00
Triang3l 744767f549 [D3D12] Compile all built-in shaders with the same FXC version 2022-04-09 23:24:28 +03:00
Triang3l 72f3eead63 [GPU] Texture load shader style (alignment) cleanup 2022-04-09 23:23:54 +03:00
DESKTOP-F0UGBP9\deakl 8d02c5ab21 [GPU] Fixed size 0 point sprites enlarged to default 2022-04-05 02:25:24 +03:00
Triang3l 47799163bd Merge branch 'master' into vulkan 2022-04-04 22:02:46 +03:00
Triang3l 3d48fde5ca [GPU] XeSL texture load shaders + minor XeSL cleanup 2022-04-04 21:48:27 +03:00
Triang3l 0acb97d383 [Vulkan] EDRAM range ownership transfers, resolve clears, 2x-as-4x MSAA 
Transfers are functional on a D3D12-like level, but need additional work so fallbacks are used when multisampled integer sampled images are not supported, and to eliminate transfers between render targets within Vulkan format compatibility classes by using different views directly.
 2022-04-03 16:40:29 +03:00
Triang3l 85fc7036b8 Merge branch 'master' into vulkan 2022-04-02 22:45:23 +03:00
Triang3l c4eae232f1 [D3D12] Fixes/cleanup for render targets and barriers 2022-04-02 22:44:10 +03:00
Triang3l 1131dff705 Merge branch 'master' into vulkan 2022-03-28 21:58:34 +03:00
Triang3l 0f3207d019 [Vulkan] Fix basePipelineIndex signedness 2022-03-28 21:57:44 +03:00
Triang3l 52d61fc94c Merge branch 'master' into vulkan 2022-03-27 16:20:21 +03:00
Triang3l 3a07559df9 [GPU] XeSL host depth store and VS passthrough shaders 2022-03-27 16:15:53 +03:00
Triang3l 328aa11283 Merge branch 'master' into vulkan 2022-03-27 00:11:45 +03:00
Triang3l 2cd6c31998 [Vulkan] Samplerless texelFetch 2022-03-27 00:09:44 +03:00
Gliniak 67a0ccb7c0 [CPU] Unified assertions for unimplemented opcodes 2022-03-23 11:41:49 -05:00
Triang3l 7048baaf21 Merge branch 'master' into vulkan 2022-03-22 21:54:34 +03:00
Triang3l fa62d395fd [Vulkan] InitializeSubresourceRange: Use return, not reference 2022-03-22 21:51:02 +03:00
Triang3l 32ab1a2df1 [D3D12] Minor RT code style/comments cleanup 2022-03-22 21:48:26 +03:00
Triang3l ee8e71cea8 [D3D12] RT dump: Fix r# allocation 2022-03-22 21:41:44 +03:00
Triang3l 920704c71a [D3D12] RT transfer: Same front/back stencil ops 2022-03-22 21:39:06 +03:00
Triang3l 1259c9f7a2 [Vulkan] Pipeline barrier merging 2022-03-21 23:02:51 +03:00
Triang3l acc4fd6846 [Vulkan] Rectangle list geometry shader 2022-03-21 22:53:19 +03:00
Triang3l c47b874a4d Merge branch 'master' into vulkan 2022-03-21 20:57:02 +03:00
Triang3l 82c1fb87aa [App] Do all fullscreen entry logic for --fullscreen=true (fixes #1999) 2022-03-14 20:42:52 +03:00
Wunkolo c1de37f381 [x64] Remove usage of `xbyak_bin2hex.h` 
C++ has had binary-literals since C++14. There is no need for these
binary enum values from xbyak.
 2022-03-08 12:18:58 -06:00
Wunkolo f356cf5df8 [x64] Add `VECTOR_ROTATE_LEFT_I32` overflow-test 
Edit one of the lanes in this unit-test to be larger than the width of
the element-size to ensure that this case is handled correctly.

It should only mask the lower `log2(32)=5` bits of the input, causing
`33`(`100001`) to be `1`(`000001`).
 2022-03-08 12:18:58 -06:00
Wunkolo 337f0b2948 [x64] Add AVX512 optimization for `VECTOR_ROTATE_LEFT(Int32)` 
`vprolvd` is an almost 1:1 analog with this opcode and can be
conditionally emitted when the host supports AVX512{F,VL}.

Altivec docs say that `vrl{bhw}` masks the lower log2(n) bits of the
element-size.

[vprold](https://www.felixcloutier.com/x86/vprold:vprolvd:vprolq:vprolvq)
modulos the shift-value by the element size in bits, which is the same
as masking the lower log2(n) bits. So `vrlw` maps exactly to `vprold`.
 2022-03-08 12:18:58 -06:00
Joel Linn 7e894d10a7 [kernel] Correct status for looked up objects 
- The guest will check for 0x40000000 and replace it with
  0xb7 (ERROR_ALREADY_EXISTS), which is the correct return value.
  For example, see:
  https://docs.microsoft.com/en-us/windows/win32/api/synchapi/nf-synchapi-createmutexa
 2022-03-08 12:17:57 -06:00
Joel Linn 91f4954967 [kernel] Refactor uses of attribute names 2022-03-08 12:17:57 -06:00