[GPU] Shader ALU refactoring + documentation
Mainly move instruction info from the ShaderTranslator to xe::gpu::ucode for future use in the CPU shader interpreter
This commit is contained in:
Triang3l
parent
df9a37f798
commit
b42680abf7
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@ -28,7 +28,7 @@ void DxbcShaderTranslator::ProcessVectorAluOperation(
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uint32_t used_result_components =
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instr.vector_and_constant_result.GetUsedResultComponents();
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if (!used_result_components &&
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!AluVectorOpHasSideEffects(instr.vector_opcode)) {
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!ucode::GetAluVectorOpcodeInfo(instr.vector_opcode).changed_state) {
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return;
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}
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@ -561,12 +561,12 @@ struct ParsedAluInstruction {
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// instruction even if only constants are being exported. The XNA disassembler
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// falls back to displaying the whole vector operation, even if only constant
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// components are written, if the scalar operation is a nop or if the vector
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// operation has side effects (but if the scalar operation isn't nop, it
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// outputs the entire constant mask in the scalar operation destination).
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// Normally the XNA disassembler outputs the constant mask in both vector and
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// scalar operations, but that's not required by assembler, so it doesn't
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// really matter whether it's specified in the vector operation, in the scalar
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// operation, or in both.
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// operation changes a0, p0 or kills pixels (but if the scalar operation isn't
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// nop, it outputs the entire constant mask in the scalar operation
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// destination). Normally the XNA disassembler outputs the constant mask in
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// both vector and scalar operations, but that's not required by assembler, so
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// it doesn't really matter whether it's specified in the vector operation, in
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// the scalar operation, or in both.
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InstructionResult vector_and_constant_result;
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// Describes how the scalar operation result is stored.
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InstructionResult scalar_result;
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@ -591,8 +591,8 @@ struct ParsedAluInstruction {
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// will result in the same microcode (since instructions with just an empty
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// write mask may have different values in other fields).
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// This is for disassembly! Translators should use the write masks and
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// AluVectorOpHasSideEffects to skip operations, as this only covers one very
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// specific nop format!
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// the changed state bits in the opcode info to skip operations, as this only
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// covers one very specific nop format!
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bool IsVectorOpDefaultNop() const;
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// Whether the scalar part of the instruction is the same as if it was omitted
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// in the assembly (if compiled or assembled with the Xbox 360 shader
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@ -370,9 +370,12 @@ void Shader::GatherAluInstructionInformation(
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ParseAluInstruction(op, type(), instr);
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instr.Disassemble(&ucode_disasm_buffer);
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kills_pixels_ = kills_pixels_ ||
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ucode::AluVectorOpcodeIsKill(op.vector_opcode()) ||
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ucode::AluScalarOpcodeIsKill(op.scalar_opcode());
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kills_pixels_ =
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kills_pixels_ ||
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(ucode::GetAluVectorOpcodeInfo(op.vector_opcode()).changed_state &
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ucode::kAluOpChangedStatePixelKill) ||
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(ucode::GetAluScalarOpcodeInfo(op.scalar_opcode()).changed_state &
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ucode::kAluOpChangedStatePixelKill);
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GatherAluResultInformation(instr.vector_and_constant_result,
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memexport_alloc_current_count);
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@ -1055,99 +1058,6 @@ uint32_t ParsedTextureFetchInstruction::GetNonZeroResultComponents() const {
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return result.GetUsedResultComponents() & components;
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}
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struct AluOpcodeInfo {
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const char* name;
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uint32_t argument_count;
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uint32_t src_swizzle_component_count;
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};
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static const AluOpcodeInfo alu_vector_opcode_infos[0x20] = {
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{"add", 2, 4}, // 0
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{"mul", 2, 4}, // 1
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{"max", 2, 4}, // 2
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{"min", 2, 4}, // 3
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{"seq", 2, 4}, // 4
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{"sgt", 2, 4}, // 5
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{"sge", 2, 4}, // 6
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{"sne", 2, 4}, // 7
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{"frc", 1, 4}, // 8
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{"trunc", 1, 4}, // 9
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{"floor", 1, 4}, // 10
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{"mad", 3, 4}, // 11
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{"cndeq", 3, 4}, // 12
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{"cndge", 3, 4}, // 13
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{"cndgt", 3, 4}, // 14
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{"dp4", 2, 4}, // 15
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{"dp3", 2, 4}, // 16
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{"dp2add", 3, 4}, // 17
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{"cube", 2, 4}, // 18
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{"max4", 1, 4}, // 19
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{"setp_eq_push", 2, 4}, // 20
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{"setp_ne_push", 2, 4}, // 21
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{"setp_gt_push", 2, 4}, // 22
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{"setp_ge_push", 2, 4}, // 23
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{"kill_eq", 2, 4}, // 24
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{"kill_gt", 2, 4}, // 25
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{"kill_ge", 2, 4}, // 26
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{"kill_ne", 2, 4}, // 27
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{"dst", 2, 4}, // 28
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{"maxa", 2, 4}, // 29
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};
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static const AluOpcodeInfo alu_scalar_opcode_infos[0x40] = {
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{"adds", 1, 2}, // 0
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{"adds_prev", 1, 1}, // 1
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{"muls", 1, 2}, // 2
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{"muls_prev", 1, 1}, // 3
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{"muls_prev2", 1, 2}, // 4
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{"maxs", 1, 2}, // 5
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{"mins", 1, 2}, // 6
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{"seqs", 1, 1}, // 7
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{"sgts", 1, 1}, // 8
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{"sges", 1, 1}, // 9
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{"snes", 1, 1}, // 10
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{"frcs", 1, 1}, // 11
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{"truncs", 1, 1}, // 12
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{"floors", 1, 1}, // 13
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{"exp", 1, 1}, // 14
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{"logc", 1, 1}, // 15
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{"log", 1, 1}, // 16
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{"rcpc", 1, 1}, // 17
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{"rcpf", 1, 1}, // 18
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{"rcp", 1, 1}, // 19
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{"rsqc", 1, 1}, // 20
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{"rsqf", 1, 1}, // 21
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{"rsq", 1, 1}, // 22
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{"maxas", 1, 2}, // 23
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{"maxasf", 1, 2}, // 24
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{"subs", 1, 2}, // 25
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{"subs_prev", 1, 1}, // 26
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{"setp_eq", 1, 1}, // 27
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{"setp_ne", 1, 1}, // 28
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{"setp_gt", 1, 1}, // 29
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{"setp_ge", 1, 1}, // 30
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{"setp_inv", 1, 1}, // 31
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{"setp_pop", 1, 1}, // 32
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{"setp_clr", 0, 0}, // 33
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{"setp_rstr", 1, 1}, // 34
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{"kills_eq", 1, 1}, // 35
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{"kills_gt", 1, 1}, // 36
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{"kills_ge", 1, 1}, // 37
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{"kills_ne", 1, 1}, // 38
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{"kills_one", 1, 1}, // 39
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{"sqrt", 1, 1}, // 40
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{"UNKNOWN", 0, 0}, // 41
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{"mulsc", 2, 1}, // 42
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{"mulsc", 2, 1}, // 43
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{"addsc", 2, 1}, // 44
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{"addsc", 2, 1}, // 45
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{"subsc", 2, 1}, // 46
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{"subsc", 2, 1}, // 47
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{"sin", 1, 1}, // 48
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{"cos", 1, 1}, // 49
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{"retain_prev", 0, 0}, // 50
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};
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static void ParseAluInstructionOperand(const AluInstruction& op, uint32_t i,
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uint32_t swizzle_component_count,
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InstructionOperand& out_op) {
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@ -1290,9 +1200,10 @@ void ParseAluInstruction(const AluInstruction& op,
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// Vector operation and constant 0/1 writes.
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instr.vector_opcode = op.vector_opcode();
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const auto& vector_opcode_info =
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alu_vector_opcode_infos[uint32_t(instr.vector_opcode)];
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ucode::AluVectorOpcode vector_opcode = op.vector_opcode();
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instr.vector_opcode = vector_opcode;
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const ucode::AluVectorOpcodeInfo& vector_opcode_info =
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ucode::GetAluVectorOpcodeInfo(vector_opcode);
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instr.vector_opcode_name = vector_opcode_info.name;
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instr.vector_and_constant_result.storage_target = storage_target;
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@ -1322,19 +1233,18 @@ void ParseAluInstruction(const AluInstruction& op,
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instr.vector_and_constant_result.components[i] = component;
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}
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instr.vector_operand_count = vector_opcode_info.argument_count;
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instr.vector_operand_count = vector_opcode_info.GetOperandCount();
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for (uint32_t i = 0; i < instr.vector_operand_count; ++i) {
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InstructionOperand& vector_operand = instr.vector_operands[i];
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ParseAluInstructionOperand(op, i + 1,
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vector_opcode_info.src_swizzle_component_count,
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vector_operand);
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ParseAluInstructionOperand(op, i + 1, 4, vector_operand);
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}
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// Scalar operation.
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instr.scalar_opcode = op.scalar_opcode();
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const auto& scalar_opcode_info =
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alu_scalar_opcode_infos[uint32_t(instr.scalar_opcode)];
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ucode::AluScalarOpcode scalar_opcode = op.scalar_opcode();
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instr.scalar_opcode = scalar_opcode;
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const ucode::AluScalarOpcodeInfo& scalar_opcode_info =
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ucode::GetAluScalarOpcodeInfo(scalar_opcode);
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instr.scalar_opcode_name = scalar_opcode_info.name;
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instr.scalar_result.storage_target = storage_target;
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@ -1355,12 +1265,12 @@ void ParseAluInstruction(const AluInstruction& op,
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instr.scalar_result.components[i] = GetSwizzleFromComponentIndex(i);
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}
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instr.scalar_operand_count = scalar_opcode_info.argument_count;
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instr.scalar_operand_count = scalar_opcode_info.operand_count;
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if (instr.scalar_operand_count) {
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if (instr.scalar_operand_count == 1) {
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ParseAluInstructionOperand(op, 3,
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scalar_opcode_info.src_swizzle_component_count,
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instr.scalar_operands[0]);
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ParseAluInstructionOperand(
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op, 3, scalar_opcode_info.single_operand_is_two_component ? 2 : 1,
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instr.scalar_operands[0]);
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} else {
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// Constant and temporary register.
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@ -1393,7 +1303,7 @@ void ParseAluInstruction(const AluInstruction& op,
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temp_op.is_negated = src3_negate;
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temp_op.is_absolute_value = op.abs_constants();
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temp_op.storage_source = InstructionStorageSource::kRegister;
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temp_op.storage_index = op.scalar_const_op_src_temp_reg();
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temp_op.storage_index = op.scalar_const_reg_op_src_temp_reg();
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temp_op.storage_addressing_mode =
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InstructionStorageAddressingMode::kAbsolute;
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temp_op.component_count = 1;
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@ -1423,7 +1333,7 @@ bool ParsedAluInstruction::IsNop() const {
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return scalar_opcode == ucode::AluScalarOpcode::kRetainPrev &&
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!scalar_result.GetUsedWriteMask() &&
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!vector_and_constant_result.GetUsedWriteMask() &&
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!ucode::AluVectorOpHasSideEffects(vector_opcode);
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!ucode::GetAluVectorOpcodeInfo(vector_opcode).changed_state;
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}
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uint32_t ParsedAluInstruction::GetMemExportStreamConstant() const {
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@ -2264,7 +2264,7 @@ bool SpirvShaderTranslator::ProcessVectorAluOperation(
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close_predicated_block = false;
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if (!instr.vector_and_constant_result.GetUsedWriteMask() &&
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!AluVectorOpHasSideEffects(instr.vector_opcode)) {
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!ucode::GetAluVectorOpcodeInfo(instr.vector_opcode).changed_state) {
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return false;
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}
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@ -0,0 +1,120 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2022 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#include "xenia/gpu/ucode.h"
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namespace xe {
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namespace gpu {
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namespace ucode {
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const AluScalarOpcodeInfo kAluScalarOpcodeInfos[64] = {
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{"adds", 1, true, kAluOpChangedStateNone},
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{"adds_prev", 1, false, kAluOpChangedStateNone},
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{"muls", 1, true, kAluOpChangedStateNone},
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{"muls_prev", 1, false, kAluOpChangedStateNone},
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{"muls_prev2", 1, true, kAluOpChangedStateNone},
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{"maxs", 1, true, kAluOpChangedStateNone},
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{"mins", 1, true, kAluOpChangedStateNone},
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{"seqs", 1, false, kAluOpChangedStateNone},
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{"sgts", 1, false, kAluOpChangedStateNone},
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{"sges", 1, false, kAluOpChangedStateNone},
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{"snes", 1, false, kAluOpChangedStateNone},
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{"frcs", 1, false, kAluOpChangedStateNone},
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{"truncs", 1, false, kAluOpChangedStateNone},
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{"floors", 1, false, kAluOpChangedStateNone},
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{"exp", 1, false, kAluOpChangedStateNone},
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{"logc", 1, false, kAluOpChangedStateNone},
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{"log", 1, false, kAluOpChangedStateNone},
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{"rcpc", 1, false, kAluOpChangedStateNone},
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{"rcpf", 1, false, kAluOpChangedStateNone},
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{"rcp", 1, false, kAluOpChangedStateNone},
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{"rsqc", 1, false, kAluOpChangedStateNone},
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{"rsqf", 1, false, kAluOpChangedStateNone},
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{"rsq", 1, false, kAluOpChangedStateNone},
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{"maxas", 1, true, kAluOpChangedStateAddressRegister},
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{"maxasf", 1, true, kAluOpChangedStateAddressRegister},
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{"subs", 1, true, kAluOpChangedStateNone},
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{"subs_prev", 1, false, kAluOpChangedStateNone},
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{"setp_eq", 1, false, kAluOpChangedStatePredicate},
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{"setp_ne", 1, false, kAluOpChangedStatePredicate},
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{"setp_gt", 1, false, kAluOpChangedStatePredicate},
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{"setp_ge", 1, false, kAluOpChangedStatePredicate},
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{"setp_inv", 1, false, kAluOpChangedStatePredicate},
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{"setp_pop", 1, false, kAluOpChangedStatePredicate},
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{"setp_clr", 0, false, kAluOpChangedStatePredicate},
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{"setp_rstr", 1, false, kAluOpChangedStatePredicate},
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{"kills_eq", 1, false, kAluOpChangedStatePixelKill},
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{"kills_gt", 1, false, kAluOpChangedStatePixelKill},
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{"kills_ge", 1, false, kAluOpChangedStatePixelKill},
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{"kills_ne", 1, false, kAluOpChangedStatePixelKill},
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{"kills_one", 1, false, kAluOpChangedStatePixelKill},
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{"sqrt", 1, false, kAluOpChangedStateNone},
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{"opcode_41", 0, false, kAluOpChangedStateNone},
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{"mulsc", 2, false, kAluOpChangedStateNone},
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{"mulsc", 2, false, kAluOpChangedStateNone},
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{"addsc", 2, false, kAluOpChangedStateNone},
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{"addsc", 2, false, kAluOpChangedStateNone},
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{"subsc", 2, false, kAluOpChangedStateNone},
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{"subsc", 2, false, kAluOpChangedStateNone},
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{"sin", 1, false, kAluOpChangedStateNone},
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{"cos", 1, false, kAluOpChangedStateNone},
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{"retain_prev", 0, false, kAluOpChangedStateNone},
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{"opcode_51", 0, false, kAluOpChangedStateNone},
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{"opcode_52", 0, false, kAluOpChangedStateNone},
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{"opcode_53", 0, false, kAluOpChangedStateNone},
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{"opcode_54", 0, false, kAluOpChangedStateNone},
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{"opcode_55", 0, false, kAluOpChangedStateNone},
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{"opcode_56", 0, false, kAluOpChangedStateNone},
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{"opcode_57", 0, false, kAluOpChangedStateNone},
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{"opcode_58", 0, false, kAluOpChangedStateNone},
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{"opcode_59", 0, false, kAluOpChangedStateNone},
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{"opcode_60", 0, false, kAluOpChangedStateNone},
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{"opcode_61", 0, false, kAluOpChangedStateNone},
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{"opcode_62", 0, false, kAluOpChangedStateNone},
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{"opcode_63", 0, false, kAluOpChangedStateNone},
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};
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const AluVectorOpcodeInfo kAluVectorOpcodeInfos[32] = {
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{"add", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"mul", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"max", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"min", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"seq", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"sgt", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"sge", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"sne", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"frc", {0b1111}, kAluOpChangedStateNone},
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{"trunc", {0b1111}, kAluOpChangedStateNone},
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{"floor", {0b1111}, kAluOpChangedStateNone},
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{"mad", {0b1111, 0b1111, 0b1111}, kAluOpChangedStateNone},
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{"cndeq", {0b1111, 0b1111, 0b1111}, kAluOpChangedStateNone},
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{"cndge", {0b1111, 0b1111, 0b1111}, kAluOpChangedStateNone},
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{"cndgt", {0b1111, 0b1111, 0b1111}, kAluOpChangedStateNone},
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{"dp4", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"dp3", {0b0111, 0b0111}, kAluOpChangedStateNone},
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{"dp2add", {0b0011, 0b0011, 0b0001}, kAluOpChangedStateNone},
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{"cube", {0b1111, 0b1111}, kAluOpChangedStateNone},
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{"max4", {0b1111}, kAluOpChangedStateNone},
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{"setp_eq_push", {0b1001, 0b1001}, kAluOpChangedStatePredicate},
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{"setp_ne_push", {0b1001, 0b1001}, kAluOpChangedStatePredicate},
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{"setp_gt_push", {0b1001, 0b1001}, kAluOpChangedStatePredicate},
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{"setp_ge_push", {0b1001, 0b1001}, kAluOpChangedStatePredicate},
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{"kill_eq", {0b1111, 0b1111}, kAluOpChangedStatePixelKill},
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{"kill_gt", {0b1111, 0b1111}, kAluOpChangedStatePixelKill},
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{"kill_ge", {0b1111, 0b1111}, kAluOpChangedStatePixelKill},
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{"kill_ne", {0b1111, 0b1111}, kAluOpChangedStatePixelKill},
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{"dst", {0b0110, 0b1010}, kAluOpChangedStateNone},
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{"maxa", {0b1111, 0b1111}, kAluOpChangedStateAddressRegister},
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{"opcode_30", {}, kAluOpChangedStateNone},
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{"opcode_31", {}, kAluOpChangedStateNone},
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};
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} // namespace ucode
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} // namespace gpu
|
||||
} // namespace xe
|
||||
|
|
@ -13,6 +13,7 @@
|
|||
#include <cstdint>
|
||||
|
||||
#include "xenia/base/assert.h"
|
||||
#include "xenia/base/math.h"
|
||||
#include "xenia/base/platform.h"
|
||||
#include "xenia/gpu/xenos.h"
|
||||
|
||||
|
|
@ -900,8 +901,9 @@ static_assert_size(FetchInstruction, sizeof(uint32_t) * 3);
|
|||
// Conventions:
|
||||
// - All temporary registers are vec4s.
|
||||
// - Most scalar ALU operations work with one or two components of the source
|
||||
// register passed as the third operand of the whole co-issued ALU operation,
|
||||
// denoted by `a` (the left-hand operand) and `b` (the right-hand operand).
|
||||
// register or the float constant passed as the third operand of the whole
|
||||
// co-issued ALU operation, denoted by `a` (the left-hand operand) and `b`
|
||||
// (the right-hand operand).
|
||||
// `a` is the [(3 + src3_swizzle[6:7]) & 3] component (W - alpha).
|
||||
// `b` is the [(0 + src3_swizzle[0:1]) & 3] component (X - red).
|
||||
// - mulsc, addsc, subsc scalar ALU operations accept two operands - a float
|
||||
|
|
@ -948,6 +950,14 @@ static_assert_size(FetchInstruction, sizeof(uint32_t) * 3);
|
|||
// use instructions that may be interpreted by the host GPU as fused
|
||||
// multiply-add.
|
||||
|
||||
// For analysis of shaders and skipping instructions that write nothing.
|
||||
enum AluOpChangedState {
|
||||
kAluOpChangedStateNone = 0,
|
||||
kAluOpChangedStateAddressRegister = 1 << 0,
|
||||
kAluOpChangedStatePredicate = 1 << 1,
|
||||
kAluOpChangedStatePixelKill = 1 << 2,
|
||||
};
|
||||
|
||||
enum class AluScalarOpcode : uint32_t {
|
||||
// Floating-Point Add
|
||||
// adds/ADDs dest, src0.ab
|
||||
|
|
@ -1277,17 +1287,28 @@ enum class AluScalarOpcode : uint32_t {
|
|||
kRetainPrev = 50,
|
||||
};
|
||||
|
||||
constexpr bool AluScalarOpcodeIsKill(AluScalarOpcode scalar_opcode) {
|
||||
switch (scalar_opcode) {
|
||||
case AluScalarOpcode::kKillsEq:
|
||||
case AluScalarOpcode::kKillsGt:
|
||||
case AluScalarOpcode::kKillsGe:
|
||||
case AluScalarOpcode::kKillsNe:
|
||||
case AluScalarOpcode::kKillsOne:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
struct AluScalarOpcodeInfo {
|
||||
const char* name;
|
||||
// 0 - no operands.
|
||||
// 1 - one single-component (W) or two-component (WX) r# or c#.
|
||||
// 2 - c#.w and r#.x.
|
||||
uint32_t operand_count;
|
||||
// If operand_count is 1, whether both W and X of the operand are used rather
|
||||
// than only W.
|
||||
bool single_operand_is_two_component;
|
||||
// Note that all scalar instructions except for retain_prev modify the
|
||||
// previous scalar register, so they must be executed even if they don't write
|
||||
// any result and don't perform any other state changes.
|
||||
AluOpChangedState changed_state;
|
||||
};
|
||||
|
||||
// 6 scalar opcode bits - 64 entries.
|
||||
extern const AluScalarOpcodeInfo kAluScalarOpcodeInfos[64];
|
||||
|
||||
inline const AluScalarOpcodeInfo& GetAluScalarOpcodeInfo(
|
||||
AluScalarOpcode opcode) {
|
||||
assert_true(uint32_t(opcode) < xe::countof(kAluScalarOpcodeInfos));
|
||||
return kAluScalarOpcodeInfos[uint32_t(opcode)];
|
||||
}
|
||||
|
||||
enum class AluVectorOpcode : uint32_t {
|
||||
|
|
@ -1385,6 +1406,9 @@ enum class AluVectorOpcode : uint32_t {
|
|||
// dest.y = src0.y * src1.y + src2.y;
|
||||
// dest.z = src0.z * src1.z + src2.z;
|
||||
// dest.w = src0.w * src1.w + src2.w;
|
||||
// According to SQ_ALU::multiply_add (used in the isHardwareAccurate case)
|
||||
// from IPR2015-00325 sq_alu, this is FMA - rounding to single-precision only
|
||||
// after the addition.
|
||||
kMad = 11,
|
||||
|
||||
// Per-Component Floating-Point Conditional Move If Equal
|
||||
|
|
@ -1490,6 +1514,17 @@ enum class AluVectorOpcode : uint32_t {
|
|||
// } else {
|
||||
// dest.xyzw = src0.w;
|
||||
// }
|
||||
// However, the comparisons may be >= actually - the XNA documentation on
|
||||
// MSDN, as well as R600 and GCN documentation, describe `max` as being
|
||||
// implemented via >= rather than >. `max4` is documented vaguely, without the
|
||||
// exact calculations for each component - MSDN describes it as max(xyzw), and
|
||||
// in the R600 documentation it's max(wzyx). There's also a case more similar
|
||||
// to `max4` where there also is a discrepancy between IPR2015-00325 sq_alu
|
||||
// and the GCN documentation - `cube` has max3 in zyx priority order, and a >=
|
||||
// comparison is used for this purpose on the GCN, but in IPR2015-00325 sq_alu
|
||||
// it's implemented via >. It's possible that in an early version of the R400,
|
||||
// the comparison was >, but was later changed to >=, but this is merely a
|
||||
// guess.
|
||||
kMax4 = 19,
|
||||
|
||||
// Floating-Point Predicate Counter Increment If Equal
|
||||
|
|
@ -1627,60 +1662,32 @@ enum class AluVectorOpcode : uint32_t {
|
|||
kMaxA = 29,
|
||||
};
|
||||
|
||||
constexpr bool AluVectorOpcodeIsKill(AluVectorOpcode vector_opcode) {
|
||||
switch (vector_opcode) {
|
||||
case AluVectorOpcode::kKillEq:
|
||||
case AluVectorOpcode::kKillGt:
|
||||
case AluVectorOpcode::kKillGe:
|
||||
case AluVectorOpcode::kKillNe:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
struct AluVectorOpcodeInfo {
|
||||
const char* name;
|
||||
uint32_t operand_components_used[3];
|
||||
AluOpChangedState changed_state;
|
||||
|
||||
// Whether the vector instruction has side effects such as discarding a pixel or
|
||||
// setting the predicate and can't be ignored even if it doesn't write to
|
||||
// anywhere. Note that all scalar operations except for retain_prev have a side
|
||||
// effect of modifying the previous scalar result register, so they must always
|
||||
// be executed even if not writing.
|
||||
constexpr bool AluVectorOpHasSideEffects(AluVectorOpcode vector_opcode) {
|
||||
if (AluVectorOpcodeIsKill(vector_opcode)) {
|
||||
return true;
|
||||
uint32_t GetOperandCount() const {
|
||||
if (!operand_components_used[2]) {
|
||||
if (!operand_components_used[1]) {
|
||||
if (!operand_components_used[0]) {
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
return 2;
|
||||
}
|
||||
return 3;
|
||||
}
|
||||
switch (vector_opcode) {
|
||||
case AluVectorOpcode::kSetpEqPush:
|
||||
case AluVectorOpcode::kSetpNePush:
|
||||
case AluVectorOpcode::kSetpGtPush:
|
||||
case AluVectorOpcode::kSetpGePush:
|
||||
case AluVectorOpcode::kMaxA:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
// Whether each component of a source operand is used at all in the instruction
|
||||
// (doesn't check the operand count though).
|
||||
constexpr uint32_t GetAluVectorOpUsedSourceComponents(
|
||||
AluVectorOpcode vector_opcode, uint32_t src_index) {
|
||||
assert_not_zero(src_index);
|
||||
switch (vector_opcode) {
|
||||
case AluVectorOpcode::kDp3:
|
||||
return 0b0111;
|
||||
case AluVectorOpcode::kDp2Add:
|
||||
return src_index == 3 ? 0b0001 : 0b0011;
|
||||
case AluVectorOpcode::kSetpEqPush:
|
||||
case AluVectorOpcode::kSetpNePush:
|
||||
case AluVectorOpcode::kSetpGtPush:
|
||||
case AluVectorOpcode::kSetpGePush:
|
||||
return 0b1001;
|
||||
case AluVectorOpcode::kDst:
|
||||
return src_index == 2 ? 0b1010 : 0b0110;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return 0b1111;
|
||||
// 5 vector opcode bits - 32 entries.
|
||||
extern const AluVectorOpcodeInfo kAluVectorOpcodeInfos[32];
|
||||
|
||||
inline const AluVectorOpcodeInfo& GetAluVectorOpcodeInfo(
|
||||
AluVectorOpcode opcode) {
|
||||
assert_true(uint32_t(opcode) < xe::countof(kAluVectorOpcodeInfos));
|
||||
return kAluVectorOpcodeInfos[uint32_t(opcode)];
|
||||
}
|
||||
|
||||
// Whether each component of a source operand is needed for the instruction if
|
||||
|
|
@ -1688,7 +1695,7 @@ constexpr uint32_t GetAluVectorOpUsedSourceComponents(
|
|||
// undefined in translation. For per-component operations, for example, only the
|
||||
// components specified in the write mask are needed, but there are instructions
|
||||
// with special behavior for certain components.
|
||||
constexpr uint32_t GetAluVectorOpNeededSourceComponents(
|
||||
inline uint32_t GetAluVectorOpNeededSourceComponents(
|
||||
AluVectorOpcode vector_opcode, uint32_t src_index,
|
||||
uint32_t used_result_components) {
|
||||
assert_not_zero(src_index);
|
||||
|
|
@ -1721,8 +1728,8 @@ constexpr uint32_t GetAluVectorOpNeededSourceComponents(
|
|||
case AluVectorOpcode::kKillNe:
|
||||
components = 0b1111;
|
||||
break;
|
||||
// kDst is per-component, but not all components are used -
|
||||
// GetAluVectorOpUsedSourceComponents will filter out the unused ones.
|
||||
// kDst is per-component, but not all components are used.
|
||||
// operand_components_used will filter out the unused ones.
|
||||
case AluVectorOpcode::kMaxA:
|
||||
if (src_index == 1) {
|
||||
components |= 0b1000;
|
||||
|
|
@ -1731,8 +1738,8 @@ constexpr uint32_t GetAluVectorOpNeededSourceComponents(
|
|||
default:
|
||||
break;
|
||||
}
|
||||
return components &
|
||||
GetAluVectorOpUsedSourceComponents(vector_opcode, src_index);
|
||||
return components & GetAluVectorOpcodeInfo(vector_opcode)
|
||||
.operand_components_used[src_index - 1];
|
||||
}
|
||||
|
||||
enum class ExportRegister : uint32_t {
|
||||
|
|
@ -1787,7 +1794,6 @@ struct alignas(uint32_t) AluInstruction {
|
|||
|
||||
// Whether data is being exported (or written to local registers).
|
||||
bool is_export() const { return data_.export_data == 1; }
|
||||
bool export_write_mask() const { return data_.scalar_dest_rel == 1; }
|
||||
|
||||
// Whether the jump is predicated (or conditional).
|
||||
bool is_predicated() const { return data_.is_predicated; }
|
||||
|
|
@ -1921,7 +1927,7 @@ struct alignas(uint32_t) AluInstruction {
|
|||
}
|
||||
}
|
||||
|
||||
uint32_t scalar_const_op_src_temp_reg() const {
|
||||
uint32_t scalar_const_reg_op_src_temp_reg() const {
|
||||
return (uint32_t(data_.scalar_opc) & 1) | (data_.src3_sel << 1) |
|
||||
(data_.src3_swiz & 0x3C);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue