zilmar
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3c7e71adca
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Core: Fix up CX86RecompilerOps::COP1_D_Opcode for the registers it is using
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2024-12-26 14:16:26 +10:30 |
|
zilmar
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fc79cb0344
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Core: Add DwordLower for cvt.w
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2024-12-26 09:35:07 +10:30 |
|
zilmar
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7e74b98d5b
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Core: Fix up labels in CX86RecompilerOps::COP1_S_CVT
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2024-12-19 21:59:42 +10:30 |
|
zilmar
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57f278416e
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core: better handling of fpu registers with COP1_S_Opcode
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2024-12-19 19:09:31 +10:30 |
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zilmar
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52d904702f
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Core: With CONST64 CX86RegInfo::WriteBackRegisters might not write the high 32bit correct
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2024-11-28 11:39:41 +10:30 |
|
zilmar
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885d31f275
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Core: Update Map_MemoryStack to pass gp by reference
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2024-10-24 12:01:14 +10:30 |
|
zilmar
|
7f18773b5b
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Core: Add CX86RegInfo::GetFPStatusReg
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2024-05-16 15:51:04 +09:30 |
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zilmar
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4c23e7af2c
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Core: Remove ChangeFPURegFormat, Load_FPR_ToTop
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2024-05-02 17:21:01 +09:30 |
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zilmar
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b313640831
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Core: In CX86RegInfo::Map_TempReg allow it to use FPStatusReg if it is unprotected
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2024-04-18 17:28:23 +09:30 |
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zilmar
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4071b52810
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Core: CX86RegInfo::UnMap_X86reg should fail on a protected register
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2024-04-18 16:41:03 +09:30 |
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zilmar
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79f7aa9927
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Core: CX86RegInfo::UnMap_FPStatusReg should unprotect register before trying to free it
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2024-04-18 16:34:49 +09:30 |
|
zilmar
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97ec1f533b
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Core: Make sure precision is set to 53bit
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2024-03-07 20:52:24 +10:30 |
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zilmar
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fae0b81e21
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Core: Have CX86RegInfo::Map_TempReg generate a BreakPoint if it mapping a protected register
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2024-02-22 19:41:10 +10:30 |
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zilmar
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f8089f565e
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Core: Unmap FPU_Float with writing to m_FPR_UDW
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2024-01-04 14:40:42 +10:30 |
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zilmar
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552b8f744a
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Core: update Format_Name to match FPU_STATE
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2024-01-04 13:11:21 +10:30 |
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zilmar
|
6ca8333d39
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Core: Get CX86RecompilerOps::COP1_S_CMP to work with exceptions
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2024-01-04 12:39:51 +10:30 |
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zilmar
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c9d2bbd221
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Core: CX86RecompilerOps::COP1_CF should be able use the mapped FPStatusReg if is mapped
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2024-01-04 12:37:06 +10:30 |
|
zilmar
|
0998f0ff0e
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Core: Add being able to get FPU_FloatLow from CX86RegInfo::FPRValuePointer
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2024-01-04 12:32:55 +10:30 |
|
zilmar
|
91a8a828d7
|
Core: CX86RegInfo::FPRValuePointer when the format is FPU_Dword it should be using m_FPR_UW
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2024-01-04 12:01:21 +10:30 |
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zilmar
|
e2306e3541
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Core: Get COP1_S_CVT_W to handle inexact
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2023-12-28 09:21:53 +10:30 |
|
zilmar
|
d6a2ae80c1
|
Core: Remove SystemRegisters
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2023-10-19 14:56:53 +10:30 |
|
zilmar
|
c28c6bb4a1
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Core: Add fpu exceptions to COP1_S_ADD
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2023-08-31 10:08:49 +09:30 |
|
zilmar
|
416c85ecda
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Core: some code clean up of Load_FPR_ToTop
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2023-08-31 09:30:05 +09:30 |
|
zilmar
|
2dcfcf250d
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Core: Do not force unmapping of fpr registers before CX86RegInfo::BeforeCallDirect(void)
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2023-08-31 09:28:23 +09:30 |
|
zilmar
|
6884c8d2c9
|
Core: fix up how recompiler handles rounding
|
2023-08-17 15:24:57 +09:30 |
|
zilmar
|
fa25b6d2af
|
Core: clear FPU StatusReg cause in CX86RecompilerOps::COP1_S_ADD
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2023-05-02 11:12:13 +09:30 |
|
zilmar
|
ea70218d1c
|
Clean up warnings
|
2023-02-28 10:09:08 +10:30 |
|
zilmar
|
bd1b1b4dbb
|
Core: Missed file for code clean up
|
2022-12-19 15:36:08 +10:30 |
|
zilmar
|
ff56992542
|
Android: Some more core changes for asmjit
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2022-12-07 09:04:55 +10:30 |
|
zilmar
|
8e94b3086b
|
Core: Change recompiler to use asmjit
|
2022-11-23 14:46:55 +10:30 |
|
zilmar
|
529812fdca
|
Core: Switch to use asmjit registers in recompiler
|
2022-11-07 21:03:32 +10:30 |
|
zilmar
|
697397f1dd
|
Core: Rearrange OrConstToX86Reg parameters
|
2022-11-07 16:03:45 +10:30 |
|
zilmar
|
59892a266b
|
Core: rearrange MoveX86regToVariable parameters
|
2022-11-07 15:30:25 +10:30 |
|
zilmar
|
8702e6b67c
|
core: Rearrange MoveVariableDispToX86Reg parmeters
|
2022-11-07 14:18:15 +10:30 |
|
zilmar
|
40456f12db
|
Core: Change order of MoveConstToVariable
|
2022-11-07 11:26:17 +10:30 |
|
zilmar
|
d06d1526d9
|
Core: Change the order of MoveVariableToX86reg parameters
|
2022-10-24 16:05:19 +10:30 |
|
zilmar
|
538933e0a5
|
Core: reoder MoveConstToX86reg parameters
|
2022-10-24 15:05:31 +10:30 |
|
zilmar
|
fdbc31961f
|
Core: Change the order of MoveX86RegToX86Reg
|
2022-10-24 12:48:51 +10:30 |
|
zilmar
|
0848bab003
|
Core: do not predefine temp reg
|
2022-10-10 13:57:10 +10:30 |
|
zilmar
|
46dcf967e1
|
Core: Change StackPos to be a reference
|
2022-10-10 13:42:52 +10:30 |
|
zilmar
|
6044222be0
|
Core: Remove temp usage of Name
|
2022-10-10 13:38:43 +10:30 |
|
zilmar
|
761a1ee52a
|
Code clean up
|
2022-10-10 10:52:17 +10:30 |
|
zilmar
|
457937f039
|
Core: Map temp pass in flag for 8 bit register
|
2022-09-12 06:01:43 +09:30 |
|
zilmar
|
7d55fdca37
|
Core: Fix bug in CX86RegInfo::FreeX86Reg where x86RegIndex_Size was introduced
|
2022-09-05 10:42:49 +09:30 |
|
zilmar
|
d82a370e59
|
Core: Create a x86RegIndex enum
|
2022-08-29 11:49:20 +09:30 |
|
zilmar
|
3e198d04a8
|
core: change CX86RecompilerOps to have a variable for CX86Ops instead of inheriting it
|
2022-08-15 12:39:34 +09:30 |
|
zilmar
|
51c9867e76
|
Core: Get the recompiler to be use globals less
|
2022-08-08 20:22:51 +09:30 |
|
zilmar
|
603ed853bc
|
Core: Some code clean up for load/store non memory
|
2022-05-30 20:20:25 +09:30 |
|
zilmar
|
ee864797ab
|
vgturtle127's Beautification 14 - Source\Project64-video directory and final cleanup
|
2021-05-18 21:21:36 +09:30 |
|
zilmar
|
c512a592a7
|
Move class out of file names
|
2021-04-14 15:04:15 +09:30 |