Core: Fix up CX86RecompilerOps::COP1_D_Opcode for the registers it is using

This commit is contained in:
zilmar 2024-12-26 14:16:26 +10:30
parent fc79cb0344
commit 3c7e71adca
3 changed files with 12 additions and 2 deletions

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@ -10423,9 +10423,10 @@ void CX86RecompilerOps::COP1_D_Opcode(void (CX86Ops::*Instruction)(const asmjit:
asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.fs, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.ft, CRegInfo::FPU_Double);
TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.ft, CRegInfo::FPU_UnsignedDoubleWord);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Double);
m_RegWorkingSet.FpuState(m_RegWorkingSet.StackTopPos()) = CRegInfo::FPU_UnsignedDoubleWord;
(m_Assembler.*Instruction)(asmjit::x86::qword_ptr(TempReg));
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
m_Assembler.mov(TempReg, (uint64_t)&m_TempValue64);

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@ -1269,6 +1269,10 @@ void CX86RegInfo::PrepareFPTopToBe(int32_t Reg, int32_t RegToLoad, FPU_STATE For
m_Assembler.MoveVariableToX86reg(TempReg, &g_Reg->m_FPR_D[RegToLoad], stdstr_f("m_FPR_D[%d]", RegToLoad).c_str());
m_Assembler.fpuLoadQwordFromX86Reg(StackTopPos(), TempReg);
break;
case FPU_UnsignedDoubleWord:
m_Assembler.MoveVariableToX86reg(TempReg, &g_Reg->m_FPR_UDW[RegToLoad], stdstr_f("m_FPR_UDW[%d]", RegToLoad).c_str());
m_Assembler.fpuLoadQwordFromX86Reg(StackTopPos(), TempReg);
break;
default:
if (HaveDebugger())
{
@ -1401,6 +1405,10 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
m_Assembler.MoveVariableToX86reg(TempReg, &m_Reg.m_FPR_D[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_D[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.fpuStoreQwordFromX86Reg(StackTopPos(), TempReg, true);
break;
case FPU_UnsignedDoubleWord:
m_Assembler.MoveVariableToX86reg(TempReg, &m_Reg.m_FPR_UDW[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("m_FPR_UDW[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.fpuStoreQwordFromX86Reg(StackTopPos(), TempReg, true);
break;
default:
if (HaveDebugger())
{

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@ -64,7 +64,8 @@ public:
FPU_Float = 4,
FPU_FloatLow = 5,
FPU_Double = 6,
FPU_UnsignedDoubleWord = 7,
FPU_DoubleWord = 7,
FPU_UnsignedDoubleWord = 8,
};
CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler);