Commit Graph

45 Commits

Author SHA1 Message Date
zilmar 4053bc2286 [Project64] Fix CArmOps::SetJump20 for negative 2016-11-22 21:07:44 +11:00
zilmar a5a1547131 [Project64] Get CArmOps::MoveConstToArmReg to work in IT block 2016-11-22 20:56:36 +11:00
zilmar 3704300b44 [Project64] Update CArmOps::SubConstFromArmReg to have source and dest reg 2016-11-22 20:41:19 +11:00
zilmar e5b260b078 [Project64] Add ArmBreakPoint 2016-11-22 18:09:37 +11:00
zilmar 28e4ba2e8c [Project64] Add CArmOps::ProgressItBlock 2016-11-22 18:06:50 +11:00
zilmar 88fc1130c8 [Project64] Add comment to StoreArmRegToArmRegPointer 2016-11-22 18:04:17 +11:00
zilmar b046831771 [Project64] Add CArmOps::SubArmRegFromArmReg 2016-11-22 18:02:53 +11:00
zilmar abb764d0c4 [Project64] Add CArmOps::StoreArmRegToArmRegPointer 2016-11-22 18:00:45 +11:00
zilmar 7ea5418168 [Project64] Add CArmOps::OrConstToVariable 2016-11-22 17:59:04 +11:00
zilmar e1e82546bb [Project64] Add CArmOps::OrConstToArmReg 2016-11-22 17:57:54 +11:00
zilmar b672cfa21b [Project64] Add CArmOps::MoveArmRegToVariable 2016-11-22 17:56:23 +11:00
zilmar 86d7fbd4b8 [Project64] Add comment to LoadArmRegPointerToArmReg 2016-11-22 17:54:46 +11:00
zilmar 4686ce7127 [Project64] Add LoadArmRegPointerByteToArmReg 2016-11-22 17:53:10 +11:00
zilmar afd92fc562 [Project64] Add second source to AndArmRegToArmReg 2016-11-22 17:48:03 +11:00
zilmar beea1d8c27 [Project64] Add AndConstToArmReg 2016-11-22 17:45:07 +11:00
zilmar 0b53e3e584 [Projec64] Add AndConstToVariable 2016-11-22 17:43:59 +11:00
zilmar ae27b59621 [Project64] Rename ArmBranchCompare to ArmCompareType 2016-11-22 17:41:46 +11:00
zilmar dff480d6dc [Android] Add CArmOps::IfBlock 2016-11-22 17:34:47 +11:00
zilmar cb29d3b98e [Android] Add another case to ThumbCompressConst 2016-11-22 07:51:08 +11:00
zilmar f90c3d76e1 [Android] Add XorArmRegToArmReg 2016-10-01 10:54:23 +10:00
zilmar 338881c4ab [Android] Add XorArmRegToArmReg 2016-10-01 10:43:31 +10:00
zilmar 25954e657e [Android] Add XorConstToArmReg 2016-10-01 10:36:40 +10:00
zilmar 25e2125a63 [Android[ Add StoreArmRegToArmRegPointer 2016-10-01 10:35:31 +10:00
zilmar f9cf02ada0 [Android] Add SignExtendByte 2016-10-01 10:34:14 +10:00
zilmar cdba209aea ]Android] Add ShiftLeftImmed 2016-10-01 10:21:54 +10:00
zilmar 5f787d8540 [Android] Add ShiftRightUnsignImmed 2016-10-01 10:16:25 +10:00
zilmar 4174ec153b [Android] Add MulF32 2016-10-01 09:32:32 +10:00
zilmar c0802d11c7 [Android] Add OrArmRegToArmReg 2016-10-01 09:26:52 +10:00
zilmar 24973f49e2 [Android] Add MoveVariableToFloatReg 2016-10-01 09:21:40 +10:00
zilmar 51109ffe27 [Android] Add StoreFloatRegToArmRegPointer 2016-10-01 09:13:06 +10:00
zilmar 793f0e5cc4 [Android] Add LoadFloatingPointControlReg 2016-10-01 08:38:56 +10:00
zilmar 8e76c17ca1 [Android] Add LoadArmRegPointerToFloatReg 2016-10-01 08:22:19 +10:00
zilmar 4418985aa6 [Android] Add LoadArmRegPointerToArmReg 2016-10-01 08:00:18 +10:00
zilmar 46a724d9b7 [Android] Add LoadArmRegPointerByteToArmReg 2016-10-01 07:20:51 +10:00
zilmar bf56f9f626 [Android] get CompareArmRegToConst to take a uint32_t 2016-10-01 07:10:44 +10:00
zilmar 4121511cf2 [Android] switch order of LoadArmRegPointerToArmReg 2016-10-01 06:42:18 +10:00
zilmar 6214abb248 [Android] Flip order of variables in MoveConstToArmReg 2016-10-01 06:36:49 +10:00
zilmar 93475500e2 [Android] Add mapping temp register 2016-10-01 05:58:04 +10:00
zilmar 8d836692a4 [Project64] Add map variable 2016-09-30 23:33:07 +10:00
zilmar bee1440813 [Android] fix up CArmOps::AddConstToArmReg 2016-09-29 22:15:33 +10:00
zilmar 17f740911c [Android] Add Arm32Opcode handling for AndArmRegToArmReg 2016-09-29 22:03:06 +10:00
zilmar b15a8b1fbc [Android] Add CArmOps::AddConstToArmReg 2016-09-29 21:59:18 +10:00
zilmar b175442aac [Android] Add Arm32Opcode handling for CArmOps::AddArmRegToArmReg 2016-09-29 21:58:10 +10:00
zilmar a8f2ce86f4 [Android] Arm: Add definition of fpu registers 2016-09-29 21:56:33 +10:00
zilmar 146ff34894 [Poject64] Add Arm recompiler 2016-08-11 21:09:21 +10:00