9541d17c7c
* implement the last missing instructions. QADD is not good according to ARMWrestler, but it doesn't make sense. TODO: investigate.
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* buttons A and B
* silence 'unknown IO write' for 3D GPU ports
2017-01-31 18:41:31 +01:00
516bc30ee3
* very shitty implementation of save RAM. requires an existing save file for now.
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* refine some SPI code, too. mostly removing a useless function.
* support 16bit accesses to DMAxCNT registers.
2017-01-31 17:34:17 +01:00
c3e2f7ad9b
* fix VRAM address calculation for GPU A
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* add support for mode 5
2017-01-31 15:43:22 +01:00
12ebf83665
keep the GPU from crashing if there's no VRAM mapped, I guess.
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noting that the way it's accessing VRAM is grossly inaccurate.
2017-01-31 04:06:05 +01:00
594286ee5d
* scheduler revamp, simpler design
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* fix dumb bug of the year: ARM LDR opcodes would accidentally read twice, which fucked with things like the IPC FIFO.
2017-01-31 03:54:51 +01:00
348bbd8cb8
move TCM shit to CP15.cpp. closer to the real thing (for example now DMA can't access TCM, etc).
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the code is shit. I would use templates if only it fucking worked without requiring the function body to be included in a .h.
2017-01-30 19:11:29 +01:00
6f3b0498db
start refactoring shit: more accurate timing and way of counting cycles.
2017-01-30 18:36:11 +01:00
296212ac49
* support for cart secure area
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* fix bug in THUMB LDMIA
2017-01-23 02:26:05 +01:00
ac8936539e
some attempt at cart support
2017-01-22 20:34:59 +01:00
711375c0be
BG scroll. also fix silly bug.
2017-01-20 15:27:56 +01:00
7dba0121cb
fix bug with ALU operations and shift operands, where the shift operation could obliterate the carry flag
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also, misc shit
2017-01-20 15:13:44 +01:00
3e5e8f60c4
* some basic BG display code
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* basic, frozen-in-time RTC
* power management device
2017-01-20 01:18:30 +01:00
d7c1d2a2cd
* start GPU shit: draw BG0 16-color.
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* fix a few DMA bugs.
* fix a bug where some code could still run right after a halt instruction.
* fix VRAM mapping, too. I'm an idiot.
2017-01-18 17:57:12 +01:00
d30e6956fa
skeleton for 2D GPU
2017-01-18 04:03:19 +01:00
7f5ee5c00e
ARM9 division hardware. POSTFLG register.
2017-01-18 02:20:45 +01:00
9808b73c6f
DMA support!
2017-01-18 01:33:06 +01:00
b10a0d64a2
fix bug with IPC FIFO IRQs
2017-01-17 05:29:38 +01:00
8ea2aaad5a
separate IO read/write handlers from the rest before it's too late.
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remove some useless cruft.
2017-01-17 02:29:25 +01:00
45bceecc19
IPC FIFO emulation.
2017-01-17 01:58:25 +01:00
8c2f785a0f
uh oh! it's getting further
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(also CodeBlocks is fucking dumb)
2017-01-16 04:47:37 +01:00
af05333290
christ. CodeBlocks is retarded.
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also, lots of crap. I lost track of it.
2016-12-23 21:22:22 +01:00
9bb3537ede
some more crap emulated.
2016-12-06 17:32:51 +01:00
c8a0058ebc
implementation of VRAM and other misc crap
2016-12-05 23:17:03 +01:00
8c8c78cf83
misc fixes.
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shit in place to start implementing GPU shit.
GPL headers added before it's too late. (TODO: put actual GPL license in the repo)
also added URL that doesn't exist yet but is reserved.
2016-12-05 18:02:29 +01:00
343797f47d
* somewhat proper event scheduler
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* support for timers
* fixes, additions, shit
2016-12-05 17:08:24 +01:00
a14c01208a
fix some shit. add support for SPI and firmware.
2016-12-04 03:20:50 +01:00
d7c1d77ba2
more instructions. shared WRAM.
2016-12-03 18:29:19 +01:00
1e4086e1b6
moar instructions and shit implemented
2016-12-03 17:58:24 +01:00
f2858e1c47
less amnesia! ITCM, DTCM, corresponding CP15 support
2016-12-03 16:13:04 +01:00
948cdeab59
amnesia is over
2016-12-03 13:42:27 +01:00
23d584ca4c
implement LDR/STR/LDRB/STRB.
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more macro soup.
2016-12-03 01:31:33 +01:00
f74fb2dd27
well, adding shit. laying out the base for the interpreter. really dirty code.
2016-11-24 18:31:49 +01:00
3505ec993b
hey look, more crap
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no MrRean this doesn't run NSMB yet
2016-11-03 01:38:58 +01:00
5b7ae6dab3
add more crap
2016-05-16 17:48:40 +02:00
StapleButter