Connor McLaughlin
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a9cbc08890
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CPU/Recompiler: Cleanup/combine shift immediate/variable
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2019-11-23 00:35:32 +10:00 |
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Connor McLaughlin
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5b745864e3
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CPU/Recompiler: Implement sub/subu
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2019-11-23 00:30:47 +10:00 |
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Connor McLaughlin
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f14ad1d3c4
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CPU/Recompiler: Implement add/addu/addi
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2019-11-23 00:26:56 +10:00 |
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Connor McLaughlin
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641e68db95
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CPU/Recompiler: Implement b{gez,ltz}(al)?
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2019-11-23 00:25:51 +10:00 |
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Connor McLaughlin
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167e2a3454
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CPU/Recompiler: Implement j/jal/jr/jalr/beq/bne/bgtz/blez
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2019-11-22 21:41:10 +10:00 |
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Connor McLaughlin
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44676a6810
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Update README.md
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2019-11-22 18:33:35 +10:00 |
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Connor McLaughlin
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ff398a3f77
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Revert "Frontend: Swap L1/R1 and L2/R2 bindings"
This reverts commit a25fe54a4b.
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2019-11-22 18:28:41 +10:00 |
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Connor McLaughlin
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11966e4caf
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CPU/Recompiler: Write exception exits to far code buffer
Keeps the hot path nice and clean.
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2019-11-22 18:01:28 +10:00 |
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Connor McLaughlin
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7b0978119b
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CPU: Only write exceptions to log when logging
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2019-11-22 17:54:06 +10:00 |
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Connor McLaughlin
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f46160ac46
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CPU/Recompiler: Implement mult/multu
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2019-11-22 16:45:13 +10:00 |
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Connor McLaughlin
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e5c0d28fdc
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CPU/Recompiler: Implement mfhi/mthi/mflo/mtlo
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2019-11-22 10:53:54 +10:00 |
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Connor McLaughlin
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51a873e58d
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CPU: Expand register file to include hi/lo/pc/npc
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2019-11-22 10:53:54 +10:00 |
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Connor McLaughlin
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330d512831
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CPU: Write exceptions to trace log
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2019-11-22 10:53:15 +10:00 |
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Connor McLaughlin
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9e82afac7b
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CPU/Recompiler: Support block revalidation instead of flushing
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2019-11-22 00:32:40 +10:00 |
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Connor McLaughlin
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7aafaeacbc
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CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions
Currently not passing CPU tests when combined with lwl/lwr.
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2019-11-21 23:34:04 +10:00 |
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Connor McLaughlin
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9e3bb62216
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CPU/CodeCache: Fast path for self-linking blocks
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2019-11-20 01:19:03 +10:00 |
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Connor McLaughlin
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09de3819eb
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CPU/Recompiler: Implement sra/srav instructions
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2019-11-20 01:00:31 +10:00 |
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Connor McLaughlin
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4f436461ff
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CPU/Recompiler: Combine shift instructions
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2019-11-20 01:00:31 +10:00 |
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Connor McLaughlin
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51600c5bc0
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CPU/Recompiler: Implement andi/xori, combine BitwiseImmediate
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2019-11-20 01:00:31 +10:00 |
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Connor McLaughlin
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6157aa9d21
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CPU/Recompiler: Implement srlv/srrv instructions
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2019-11-20 00:32:41 +10:00 |
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Connor McLaughlin
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82cbb6e1b8
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CPU/Recompiler: Implement srl instruction
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2019-11-20 00:21:02 +10:00 |
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Connor McLaughlin
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5217088d82
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CPU: Refactor load delay handling
Now works when mixing interpreter and recompiler code.
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2019-11-20 00:15:15 +10:00 |
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Connor McLaughlin
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1d6c4a3af1
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CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
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2019-11-19 20:38:05 +10:00 |
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Connor McLaughlin
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0e8ff85f04
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dep: Add xbyak
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2019-11-19 20:13:20 +10:00 |
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Connor McLaughlin
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b9089cac95
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System: Fix EXE loading again
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2019-11-18 21:03:48 +10:00 |
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Connor McLaughlin
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19062e11b5
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Revert "Bus: Relax memory timing"
This reverts commit b5c799ba81.
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2019-11-17 22:11:16 +10:00 |
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Connor McLaughlin
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38d0f46063
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Frontend: Fix some GPU settings not saving to ini
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2019-11-17 22:10:55 +10:00 |
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Connor McLaughlin
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48e3683d20
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HostInterface: Fix load state on boot not loading state
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2019-11-17 19:41:25 +10:00 |
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Connor McLaughlin
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1f4dbd1060
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Frontend: Implement D3D<->GL renderer switching
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2019-11-17 19:37:10 +10:00 |
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Connor McLaughlin
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d1f7ad2512
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HostInterface: Fix display classes not getting destructed
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2019-11-17 19:36:56 +10:00 |
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Connor McLaughlin
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55550798e4
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Frontend: Call timeBeginPeriod() to increase timer resolution
Hopefully will prevent FPS fluctuations due to sleep variation.
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2019-11-17 01:47:52 +10:00 |
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Connor McLaughlin
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b2b5e6c793
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HostInterface: Reset throttle timer on slowdown
Prevents too slow messages when fast forwarding.
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2019-11-17 01:47:50 +10:00 |
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Connor McLaughlin
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b5c799ba81
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Bus: Relax memory timing
Formulas from Mednafen.
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2019-11-17 01:47:46 +10:00 |
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Connor McLaughlin
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8fb4f73d17
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Settings: Add audio sync and additional cleanup
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2019-11-16 20:52:39 +10:00 |
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Connor McLaughlin
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3673c6e33c
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HostInterface: Re-enable audio sync by default
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2019-11-16 20:52:39 +10:00 |
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Connor McLaughlin
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f1289d6161
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Settings: Hook up console region
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2019-11-16 20:52:39 +10:00 |
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Connor McLaughlin
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613e4f4a2a
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GPU: Set PAL mode on soft reset if region is PAL
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2019-11-16 20:52:39 +10:00 |
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Connor McLaughlin
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49ab9467df
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GPU: Set throttle frequency based on mode config
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2019-11-16 20:52:39 +10:00 |
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Connor McLaughlin
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77fe883901
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System: Default to NTSC region for BIOS boot if auto
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2019-11-16 20:52:39 +10:00 |
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Connor McLaughlin
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b57f1d4a60
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HostInterface: Implement non-vsync based speed throttler
Needed for PAL games.
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2019-11-16 20:52:39 +10:00 |
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Connor McLaughlin
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246c97ccb3
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System: Scaffolding for multi-system/multi-bios
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2019-11-16 20:50:59 +10:00 |
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Connor McLaughlin
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d6209937fb
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CDROM: Properly handle audio sectors in SeekL
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2019-11-16 12:54:41 +10:00 |
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Connor McLaughlin
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f12b97e98b
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DMA: Add missing transfer_ticks to save state
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2019-11-16 01:51:22 +10:00 |
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Connor McLaughlin
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4524172573
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Frontend: Use flip model swap chains in D3D
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2019-11-16 01:45:31 +10:00 |
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Connor McLaughlin
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2399c1dab7
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SPU: Fix incorrect step value in attack phase
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2019-11-16 01:43:34 +10:00 |
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Connor McLaughlin
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a47492382c
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System: Add "fast boot" option (skip boot logo)
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2019-11-16 01:04:52 +10:00 |
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Connor McLaughlin
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30fd7a6683
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DMA: Support delaying transfers
Fixes Syphon Filter 2/3.
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2019-11-15 23:27:56 +10:00 |
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Connor McLaughlin
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e02ebb1b2a
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SPU: Mute voice without release phase on loop/end flag
Fixes channels getting stuck in Syphon Filter.
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2019-11-15 17:24:11 +10:00 |
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Connor McLaughlin
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5b5d22fd27
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SPU: Stub out transfer control register
Fixes sound in Ridge Racer.
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2019-11-15 16:44:23 +10:00 |
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Connor McLaughlin
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d9c27c4ee3
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SPU: Fix sustain step being ignored
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2019-11-15 16:42:25 +10:00 |