addresses used as part of code execution (ie, from the PC) during emulation.
This gives Distella much more information than can be determined from a
static analysis alone, resulting in an extremely accurate disassembly.
This also allows to generate very accurate debugger .cfg files.
Not all carts have been ported to this new scheme yet, particularly ones
having extended RAM that can be mapped out dynamically.
Note that this new scheme doubles the amount of RAM used for storing ROM
images, so up to 128KB extra will be used. There's also a small runtime
check for each instruction executed. Preliminary testing doesn't show
any slowdowns, but we'll see how it goes.
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Added 'ramrandom' commmandline argument, used to toggle randomizing or
zeroing or all RAM in the system (both zero-page and SARA).
Disassembler now properly supports all test cases, including rewinding
within the debugger.
Added preliminary support for disassembling from zero-page RAM.
Bumped version # for final release.
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The disassembler now accepts a range of start addresses and remembers
old entry points, so the disassembly becomes more complete each time
the debugger is used.
Changes to address offsets within the same bank are now supported
(ie, changing from $fxxx to $dxxx within the same bank properly
updates the display).
Re-added ability to manually change banks from the debugger prompt
and the disassembly UI. This now works correctly with the Distella
code.
Cleanup of the Cartridge::bank(...) API: if a bank cannot be changed,
the calling code will now know about it. This fixes confusion with
some ROMs, whereby changing a bank in the debugger prompt would print
a success message even if the operation failed.
Note that these changes have broken rewind in the debugger. Actually,
it only exposes problems that the rewind functionality already had :)
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now properly detected as E7.
Some minor cleanups to the Cart classes.
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These have ARM code appended to the beginning of the ROM, which is
(for now) ignored by Stella.
Improved memory usage for DPC and DPC+ schemes, so that an extra
copy of the ROM image is no longer required. This also fixes a bug
in the getImage methods, which wouldn't have actually returned any
changes made by patching the ROM (it always returned the original,
non-modified copy).
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final support for this completed before the 3.1 release next week.
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The file selector in Windows now ignores all items starting with '.', not just the directories '.' and '..'. This is most apparent when using the Windows port and browing Linux shares, which shows many dot files.
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key. This enables automatically taking snapshots every X seconds
while in emulation mode. The interval (in seconds) can be set
with the 'ssdelay' commandline argument.
Some minor cleanups to the EventHandler methods, making them
const when possible.
Added latest DPC+ changes from Spiceware.
Fixed issue with ROMs that run entirely from ZP RAM; no disassembly
was being generated when entering the debugger. For now, this
special case is detected, and the disassembly is generated for
the code that ran before the PC entered ZP RAM space. Eventually,
this will go away when the Distella fully supports disassembling
below 0x1000.
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informs the rest of the system about how a page of address
space is to be treated (READ, WRITE, READWRITE). This makes it
much easier to track if a read from the write port has occurred.
As such, the _rwport command should now be somewhat faster.
Eventually, the debugger/disassembler will use this info to
colorize the output.
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'Stephen Anthony' (aka, me) in addition to Brad Mott as copyright
holders for Stella. I think I've been with the project long
enough now (almost 10 years) to justify being specifically mentioned
above and beyond 'the Stella Team'.
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disassembly instead of re-disassembling again. Still TODO is make the
search case in-sensitive.
Added latest DPC+ code from Spiceware.
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as 'const', and return types are closer to the actual type of data
returned.
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really aren't that many ROM banks. This is done so that the RAM banks
always start at number 256.
Added latest DPC+ updates from Spiceware.
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and E7. DPC and DPC+ currently do not modify the DPC address space
on a patch; more research is required to figure out how to handle this.
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when their address space has been modified by poke. Any writes done
inadvertently by reading from the write port are also flagged. This flag
is used by CartDebug to determine if cart address space has changed.
For now, it uses this information to do a complete re-disassembly.
Entire bank changes are signaled by setting myBankChanged to true,
which overrides the page dirty flag and short-circuits testing for it.
Still TODO is add support for 'AR' bankswitching, and fix the patch
method for several schemes.
Added latest DPC+ updates from Spiceware and Batari.
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over onto the opposite side of the screen. Breakpoints set by clicking
in RomListWidget only apply if they've actually been enabled. This
fixes a bug whereby a breakpoint could look like it is enabled when
it really isn't. Related to this, breakpoints cannot be set for
disassembly lines that don't contain a valid address or an empty
bytes area (basically, empty lines and lines containing '.byte' items).
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AtariAge. Basically, this is an enhanced version of the DPC class used
by Pitfall2.
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stephena