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Added debugger patch support for bankswitch schemes CV, DPC, DPC+ 

and E7.  DPC and DPC+ currently do not modify the DPC address space
on a patch; more research is required to figure out how to handle this.


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1980 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
This commit is contained in:
stephena 2010-03-30 20:36:13 +00:00
parent 4c75e52a96
commit 108a807017
9 changed files with 78 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/emucore/CartCV.cxx
View File

@ -72,6 +72,8 @@ void CartridgeCV::reset()
for(uInt32 i = 0; i < 1024; ++i)
myRAM[i] = mySystem->randGenerator().next();
}
myBankChanged = true;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
@ -139,7 +141,9 @@ uInt8 CartridgeCV::peek(uInt16 address)
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeCV::poke(uInt16, uInt8)
{
// This is ROM so poking has no effect :-)
// NOTE: This does not handle accessing RAM, however, this function
// should never be called for RAM because of the way page accessing
// has been setup
return false;
}
@ -165,9 +169,20 @@ int CartridgeCV::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeCV::patch(uInt16 address, uInt8 value)
{
// TODO - ROM vs RAM in patching
myImage[address & 0x07FF] = value;
return true;
address &= 0x0FFF;
if(address < 0x0800)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
// The following will work for both reads and writes
myRAM[address & 0x03FF] = value;
}
else
myImage[address & 0x07FF] = value;
return myBankChanged = true;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

18
src/emucore/CartDPC.cxx
View File

@ -346,14 +346,14 @@ bool CartridgeDPC::poke(uInt16 address, uInt8 value)
{
if((index >= 5) && myMusicMode[index - 5])
{
// Data fecther is in music mode so its low counter value
// Data fetcher is in music mode so its low counter value
// should be loaded from the top register not the poked value
myCounters[index] = (myCounters[index] & 0x0700) |
(uInt16)myTops[index];
}
else
{
// Data fecther is either not a music mode data fecther or it
// Data fetcher is either not a music mode data fetcher or it
// isn't in music mode so it's low counter value should be loaded
// with the poked value
myCounters[index] = (myCounters[index] & 0x0700) | (uInt16)value;
@ -421,7 +421,7 @@ void CartridgeDPC::bank(uInt16 bank)
// Remember what bank we're in
myCurrentBank = bank;
uInt16 offset = myCurrentBank * 4096;
uInt16 offset = myCurrentBank << 12;
uInt16 shift = mySystem->pageShift();
uInt16 mask = mySystem->pageMask();
@ -455,8 +455,16 @@ int CartridgeDPC::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeDPC::patch(uInt16 address, uInt8 value)
{
myProgramImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
return true;
address &= 0x0FFF;
// For now, we ignore attempts to patch the DPC address space
if(address >= 0x0080)
{
myProgramImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
return myBankChanged = true;
}
else
return false;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

16
src/emucore/CartDPCPlus.cxx
View File

@ -315,7 +315,7 @@ uInt8 CartridgeDPCPlus::peek(uInt16 address)
default:
break;
}
return myProgramImage[myCurrentBank * 4096 + address];
return myProgramImage[(myCurrentBank << 12) + address];
}
}
@ -501,7 +501,7 @@ void CartridgeDPCPlus::bank(uInt16 bank)
// Remember what bank we're in
myCurrentBank = bank;
uInt16 offset = myCurrentBank * 4096;
uInt16 offset = myCurrentBank << 12;
uInt16 shift = mySystem->pageShift();
uInt16 mask = mySystem->pageMask();
@ -535,8 +535,16 @@ int CartridgeDPCPlus::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeDPCPlus::patch(uInt16 address, uInt8 value)
{
myProgramImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
return myBankChanged = true;
address &= 0x0FFF;
// For now, we ignore attempts to patch the DPC address space
if(address >= 0x0080)
{
myProgramImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
return myBankChanged = true;
}
else
return false;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

26
src/emucore/CartE7.cxx
View File

@ -258,8 +258,30 @@ int CartridgeE7::bankCount()
bool CartridgeE7::patch(uInt16 address, uInt8 value)
{
address = address & 0x0FFF;
myImage[(myCurrentSlice[address >> 11] << 11) + (address & 0x07FF)] = value;
return true;
if(address < 0x0800)
{
if(myCurrentSlice[0] == 7)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address & 0x03FF] = value;
}
else
myImage[(myCurrentSlice[0] << 11) + (address & 0x07FF)] = value;
}
else if(address < 0x0900)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)] = value;
}
else
myImage[(myCurrentSlice[address >> 11] << 11) + (address & 0x07FF)] = value;
return myBankChanged = true;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

8
src/emucore/CartEFSC.cxx
View File

@ -178,16 +178,12 @@ bool CartridgeEFSC::patch(uInt16 address, uInt8 value)
{
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
myRAM[address & 0x007F] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;

8
src/emucore/CartF4SC.cxx
View File

@ -181,16 +181,12 @@ bool CartridgeF4SC::patch(uInt16 address, uInt8 value)
{
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
myRAM[address & 0x007F] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;

8
src/emucore/CartF6SC.cxx
View File

@ -224,16 +224,12 @@ bool CartridgeF6SC::patch(uInt16 address, uInt8 value)
{
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
myRAM[address & 0x007F] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;

8
src/emucore/CartF8SC.cxx
View File

@ -204,16 +204,12 @@ bool CartridgeF8SC::patch(uInt16 address, uInt8 value)
{
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
myRAM[address & 0x007F] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;

8
src/emucore/CartFA.cxx
View File

@ -214,16 +214,12 @@ bool CartridgeFA::patch(uInt16 address, uInt8 value)
{
address &= 0x0FFF;
if(address < 0x0100)
{
myRAM[address] = value;
}
else if(address < 0x0200)
if(address < 0x0200)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x100] = value;
myRAM[address & 0x00FF] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;