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3.0.1-5664-2df3434

AndroidRelease7

Project64-3.0.0-5632-f83bee9

v2.2

v2.3

v2.3.1

v2.3.2

Mono Color

• 0cadbe0f70 RSP: Add clamp16 zilmar 2023-09-07 11:31:31 +0930
• af1c0c2b55 RSP: Add Vmulq zilmar 2023-09-07 11:30:15 +0930
• d468b863c2 Rsp: add vnop for vnull zilmar 2023-09-07 11:29:16 +0930
• 8b71ef3bc1 RSP: Add RSP_Vector_Reserved zilmar 2023-09-07 11:23:35 +0930
• ab67374c8a RSP: Update the display of RSP opcodes in debugger zilmar 2023-09-07 11:19:44 +0930
• 4f74dc4bb0 Rsp: Update display of vector in debugger zilmar 2023-09-07 11:17:08 +0930
• ab03916a70 Core: let the stack pointer equal end of rdram zilmar 2023-09-07 11:13:54 +0930
• 7199096748 Core: Merge CheckFPUException into CheckFPUResult64 zilmar 2023-08-31 18:52:34 +0930
• 91d1c6e237 Core: Add fpu exceptions to COP1_S_MUL zilmar 2023-08-31 11:09:48 +0930
• 2f7a35613f Core: Add exception to COP1_S_SUB zilmar 2023-08-31 10:54:41 +0930
• c28c6bb4a1 Core: Add fpu exceptions to COP1_S_ADD zilmar 2023-08-31 10:08:49 +0930
• 416c85ecda Core: some code clean up of Load_FPR_ToTop zilmar 2023-08-31 09:30:05 +0930
• 2dcfcf250d Core: Do not force unmapping of fpr registers before CX86RegInfo::BeforeCallDirect(void) zilmar 2023-08-31 09:28:23 +0930
• e49438cdab Core: Add exit reason exception zilmar 2023-08-30 12:16:07 +0930
• 703ad4049a PluginRSP: declare windows.h before asset.h zilmar 2023-08-30 12:15:36 +0930
• 41fa1fd5dd Core: use m_TLB_WriteMap not m_TLB_ReadMap for NonMemory zilmar 2023-08-30 11:35:53 +0930
• 625f532d73 RSP: use __debugbreak not DebugBreak zilmar 2023-08-24 10:44:45 +0930
• 47f14016e6 RSP: Set RSP_JumpTo before register in JALR, BLTZAL, BGEZAL zilmar 2023-08-24 10:35:51 +0930
• ae9912b068 RSP: Clean up VCR zilmar 2023-08-24 10:31:26 +0930
• 7db5876927 RSP: Clean up VCL zilmar 2023-08-24 10:07:05 +0930
• 9dab3481ae RSP: Add class to wrap around RSP flag zilmar 2023-08-24 08:00:29 +0930
• 0cb43e0c33 RSP: Remove flag to swap vector register endian zilmar 2023-08-24 07:04:35 +0930
• b8fff5d116
  Corrects Internal names for many Japanese roms (#2384) Squall Leonhart 2023-08-19 15:18:07 +1000
• df791603e3
  Corrects Internal names for many Japanese roms Squall Leonhart 2023-08-19 14:41:45 +1000
• d300dc002a Core: remove exception catch around RSP zilmar 2023-08-17 15:27:18 +0930
• 6884c8d2c9 Core: fix up how recompiler handles rounding zilmar 2023-08-17 15:24:57 +0930
• a80860605d RSP: fix up usage of Indx in recompiler zilmar 2023-08-17 14:38:51 +0930
• 3394be733f RSP: Fix up AccurateEmulation for interpreter zilmar 2023-08-17 14:22:54 +0930
• 54be4d8135 Rsp: Add a rsp AccurateEmulation flag for new rsp work zilmar 2023-08-17 12:04:06 +0930
• 09ef426ac6 Rsp: Fix memory allocation of recompiler memory zilmar 2023-08-17 11:37:03 +0930
• 6b30c1ae6a Rsp: Move Recompiler in to rsp-core zilmar 2023-08-17 08:59:22 +0930
• 1f0151e067 RSP: fix up clang formatting zilmar 2023-08-10 21:50:01 +0930
• 6bdc898248 RSP: fix LPV zilmar 2023-08-10 20:52:50 +0930
• c6c0a4a6d2 RSP: fix LDV zilmar 2023-08-10 16:06:38 +0930
• 1d492262fd RSP: use std::min for length calculation zilmar 2023-08-10 14:24:33 +0930
• 60192a7f33 RSP: Move more functionality in to rsp-core zilmar 2023-08-10 14:16:57 +0930
• 25e48405c5 RSP: Start to split out RSP in to core and UI for plugin zilmar 2023-08-10 10:27:11 +0930
• bb5a16aaa2 RSP: Change RSP Registers to be an enum not define zilmar 2023-08-10 09:47:53 +0930
• 34d75780bf Rsp: Update the element order in LSV, LLV, LRV zilmar 2023-08-03 17:32:40 +0930
• a18f78679e Rsp: Change the order of EleSpec zilmar 2023-08-03 17:29:55 +0930
• 05cd3a846b Rsp: Update vmov zilmar 2023-08-03 17:27:58 +0930
• b5db44c12d Core: Get CheckFPUInput64Conv to return true on exception zilmar 2023-08-03 17:25:03 +0930
• 5ff45c43c4 Core: Get R4300iOp::CheckFPUInput64 to return true on exception zilmar 2023-08-03 17:11:56 +0930
• bc1b027c94 Core: get CheckFPUInput32Conv to return true on exception zilmar 2023-08-03 16:24:54 +0930
• 930e463bbc Core: Move TriggerException(EXC_FPE) into R4300iOp::CheckFPUInput32 zilmar 2023-08-03 15:38:07 +0930
• 822b75c734
  changes this callback back to BOOL so it works again. (#2378) Squall Leonhart 2023-07-28 07:27:31 +1000
• b258edc2da changes this callback back to BOOL so it works again. Squall-Leonhart 2023-07-27 21:56:45 +1000
• bbe603c758 RSP: fix up lbv zilmar 2023-07-27 16:01:03 +0930
• 52e77bc4e0 RSP: Some clean up to lqv zilmar 2023-07-27 15:11:31 +0930
• e1854e1589 RSP: Inline memory functions in to the opcodes zilmar 2023-07-27 13:23:53 +0930
• 562d4d4e56
  Make the FPU Register Caching checkbox functional (#2377) Squall Leonhart 2023-07-27 09:37:14 +1000
• b807e6769b Make the FPU Register Caching checkbox functional Squall-Leonhart 2023-07-27 08:11:06 +1000
• 5c65bebe9e RSP: Update VAdd code (SQV/LQV order changed as well) zilmar 2023-07-21 07:25:17 +0930
• 2cf740565e RSP: Add dummy vsut zilmar 2023-07-20 09:40:42 +0930
• e88e827d64 RSP Add dummy LWV zilmar 2023-07-20 08:59:36 +0930
• cf7628cc1d RSP: Update RSP_LRV_DMEM zilmar 2023-07-18 10:05:25 +0930
• 4265bdfb43 RSP: Add lwu zilmar 2023-07-18 10:04:54 +0930
• bd357c65b0 RSP: fix vmov zilmar 2023-07-18 09:56:31 +0930
• 6e03d6ad7b RSP: Add method to get element specifier index from the Vector zilmar 2023-07-18 07:55:06 +0930
• 97fccb1c36 RSP: Change EleSpec to be 16 and use .e instead of rs zilmar 2023-07-18 07:36:25 +0930
• 97fbbffee8 RSP: A little clean up of VABS zilmar 2023-07-18 07:27:49 +0930
• ee452143ff RSP: Change the name of the opcode that register ops use zilmar 2023-07-18 07:22:27 +0930
• b7d7884e22 RSP: Make a class for the RSP Vector zilmar 2023-07-13 21:09:18 +0930
• 1b9fc67b5b
  Update Brazilian Portuguese.pj.Lang Dark 2023-07-08 21:54:03 -0300
• 1b8fc1dc1b
  Update Brazilian Portuguese.pj.Lang Dark 2023-07-08 17:07:45 -0300
• 28fd4a033c
  Update Brazilian Portuguese.pj.Lang Dark 2023-07-08 17:05:47 -0300
• 353ef5ed89 RSP: When command window is entered, always step commands zilmar 2023-07-06 20:56:00 +0930
• 115881524b RSP: Better handling on unaligned SH and SW zilmar 2023-07-06 20:55:02 +0930
• fbb388fa0f Rsp: Fix capitalization in rsp_UnknownOpcode zilmar 2023-07-06 20:51:17 +0930
• 07cf94bde3 RSP: only look at SP_STATUS_HALT when seeing if the RSP should run zilmar 2023-07-06 20:49:14 +0930
• 7dc30b1d6d RSP: Update dissam of load/store vector ops zilmar 2023-07-06 17:49:15 +0930
• f8f9688386 RSP: get RSP_LH_DMEM and RSP_LW_DMEM to handle end of memory roll over zilmar 2023-06-29 14:52:46 +0930
• cfc63532dd RSP: move p_func from RspTypes.h to Cpu.h zilmar 2023-06-29 12:31:25 +0930
• 02da0ccad1 RSP: Use bool instead of Boolean zilmar 2023-06-29 12:29:07 +0930
• 2ce9eaa667 RSP: Rename Types.h to RspTypes.h zilmar 2023-06-29 11:03:55 +0930
• 1c61f15ea9 RSP: Update display of vector ops zilmar 2023-06-29 10:59:54 +0930
• ef30fc7fb8 Project64: Improve flexibility of advanced mode settings toggle CEnnis91 2023-06-23 14:24:07 -0400
• 080a3b69ac RSP: Create a RSP instruction for decoding the RSP op zilmar 2023-06-15 21:09:44 +0930
• df215c1cc5 RSP: Fix up rename of filters file zilmar 2023-06-15 14:48:07 +0930
• ef24ec11d8 Rename RSP to Project64-rsp zilmar 2023-06-15 14:45:27 +0930
• 187bd64915 Core: Update how exceptions are handled with the recompiler zilmar 2023-06-08 16:25:05 +0930
• 18a712ce6a
  Update Interface.cpp (#2367) Nayla 2023-06-02 17:41:57 -0400
• 7e2fd1fe0d
  Update Interface.cpp Nayla 2023-06-02 15:23:14 -0400
• f4459fe143 RSP: Update RSP name in package_zip.cmd zilmar 2023-06-02 10:52:10 +0930
• 98b96a60cb RSP: Get the code to conform to clang-format zilmar 2023-06-01 21:16:23 +0930
• 90fefed579 RSP: Fix text when adding tab to registers zilmar 2023-06-01 19:40:53 +0930
• 1522f17b9c RSP: Convert base code to be compiled as c++ instead of C zilmar 2023-06-01 17:11:26 +0930
• a39ebe7d37 Core: Create InitFpuOperation zilmar 2023-05-27 10:01:19 +0930
• b5532fcabb RSP VSUB element sub result clamp signed issue correction C-Eddard 2023-05-24 17:05:25 -0400
• d7ce2a48a3 RSP VADD element sum result clamp signed issue correction C-Eddard 2023-05-24 17:00:50 -0400
• e2eebe566d Core: fix up for clang zilmar 2023-05-18 18:05:54 +0930
• b438fddf2e Core: Add CP2 handling zilmar 2023-05-18 18:04:41 +0930
• 3b8dfce64a Core: Convert DoBreakException to TriggerException zilmar 2023-05-18 11:47:00 +0930
• b2c2a03a2e Core: convert DoFloatingPointException to TriggerException zilmar 2023-05-18 11:41:20 +0930
• 0dfab78c88 Core: Convert DoCopUnusableException to TriggerException zilmar 2023-05-18 11:26:36 +0930
• 456f25eb6b Core: Get DoIntrException to use TriggerException zilmar 2023-05-18 11:19:26 +0930
• 252f629e14 Core: Convert DoIllegalInstructionException to TriggerException zilmar 2023-05-18 11:13:22 +0930
• 59a1277bed Core: Convert GenerateOverflowException to TriggerException zilmar 2023-05-18 11:05:27 +0930
• 69fd74ba56 Core: Convert DoSysCallException to TriggerException zilmar 2023-05-18 10:56:06 +0930
• 17df17805d Core: convert DoTrapException to TriggerException zilmar 2023-05-18 10:49:58 +0930