zilmar
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8bb5e6a240
|
[Android] Add store check to ShiftRightUnsignImmed
|
2017-05-07 08:27:27 +10:00 |
|
zilmar
|
e48c54518e
|
[Project64] Some Code clean up
|
2017-05-06 19:27:06 +10:00 |
|
zilmar
|
ffbe446c79
|
[Android] Keep stack aligned
|
2017-01-20 08:43:38 +11:00 |
|
zilmar
|
bafffcbf41
|
[Android] Add LastStoreReg exception to CompareArmRegToConst
|
2017-01-19 17:50:59 +11:00 |
|
zilmar
|
e098aacf0c
|
[Android] Add LastStoreReg exception to AddConstToArmReg
|
2017-01-19 17:48:16 +11:00 |
|
zilmar
|
8cf62142b5
|
[Android] Track push/pops
|
2017-01-10 18:25:18 +11:00 |
|
zilmar
|
20fe044b7d
|
[Android] Add PushPopRegisterList
|
2017-01-10 18:13:13 +11:00 |
|
zilmar
|
ec380bfe0d
|
[Project64] Record function end location
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2017-01-10 18:01:59 +11:00 |
|
zilmar
|
5febae4ec9
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[Android] Rename some variable names in ArmOps.h
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2017-01-10 17:54:11 +11:00 |
|
zilmar
|
c408ba9c17
|
[Android] Cleanup/fixup CArmOps::MoveConstToArmReg
|
2016-11-28 07:40:57 +11:00 |
|
zilmar
|
10ae0da041
|
[Android] Fix bug in CArmOps::ThumbCompressConst and add another case
|
2016-11-25 17:34:01 +11:00 |
|
zilmar
|
bceb4792ed
|
[Project64] Add pre op check before an op
|
2016-11-23 18:34:32 +11:00 |
|
zilmar
|
5ea6c2c0c5
|
[Projec64] Fix CArmOps::MoveConstToArmReg to use compress value
|
2016-11-22 21:09:10 +11:00 |
|
zilmar
|
4053bc2286
|
[Project64] Fix CArmOps::SetJump20 for negative
|
2016-11-22 21:07:44 +11:00 |
|
zilmar
|
a5a1547131
|
[Project64] Get CArmOps::MoveConstToArmReg to work in IT block
|
2016-11-22 20:56:36 +11:00 |
|
zilmar
|
3704300b44
|
[Project64] Update CArmOps::SubConstFromArmReg to have source and dest reg
|
2016-11-22 20:41:19 +11:00 |
|
zilmar
|
e5b260b078
|
[Project64] Add ArmBreakPoint
|
2016-11-22 18:09:37 +11:00 |
|
zilmar
|
28e4ba2e8c
|
[Project64] Add CArmOps::ProgressItBlock
|
2016-11-22 18:06:50 +11:00 |
|
zilmar
|
88fc1130c8
|
[Project64] Add comment to StoreArmRegToArmRegPointer
|
2016-11-22 18:04:17 +11:00 |
|
zilmar
|
b046831771
|
[Project64] Add CArmOps::SubArmRegFromArmReg
|
2016-11-22 18:02:53 +11:00 |
|
zilmar
|
abb764d0c4
|
[Project64] Add CArmOps::StoreArmRegToArmRegPointer
|
2016-11-22 18:00:45 +11:00 |
|
zilmar
|
7ea5418168
|
[Project64] Add CArmOps::OrConstToVariable
|
2016-11-22 17:59:04 +11:00 |
|
zilmar
|
e1e82546bb
|
[Project64] Add CArmOps::OrConstToArmReg
|
2016-11-22 17:57:54 +11:00 |
|
zilmar
|
b672cfa21b
|
[Project64] Add CArmOps::MoveArmRegToVariable
|
2016-11-22 17:56:23 +11:00 |
|
zilmar
|
86d7fbd4b8
|
[Project64] Add comment to LoadArmRegPointerToArmReg
|
2016-11-22 17:54:46 +11:00 |
|
zilmar
|
4686ce7127
|
[Project64] Add LoadArmRegPointerByteToArmReg
|
2016-11-22 17:53:10 +11:00 |
|
zilmar
|
e42cb0f2c7
|
[Project64] Fix up usage of AndArmRegToArmReg
|
2016-11-22 17:52:04 +11:00 |
|
zilmar
|
afd92fc562
|
[Project64] Add second source to AndArmRegToArmReg
|
2016-11-22 17:48:03 +11:00 |
|
zilmar
|
beea1d8c27
|
[Project64] Add AndConstToArmReg
|
2016-11-22 17:45:07 +11:00 |
|
zilmar
|
0b53e3e584
|
[Projec64] Add AndConstToVariable
|
2016-11-22 17:43:59 +11:00 |
|
zilmar
|
ae27b59621
|
[Project64] Rename ArmBranchCompare to ArmCompareType
|
2016-11-22 17:41:46 +11:00 |
|
zilmar
|
dff480d6dc
|
[Android] Add CArmOps::IfBlock
|
2016-11-22 17:34:47 +11:00 |
|
zilmar
|
cb29d3b98e
|
[Android] Add another case to ThumbCompressConst
|
2016-11-22 07:51:08 +11:00 |
|
zilmar
|
0cc9ae52b2
|
[Android] fix accident tempo
|
2016-10-01 11:45:06 +10:00 |
|
zilmar
|
1a16d46368
|
[Android] Get TestVariable to use temp registers
|
2016-10-01 11:44:21 +10:00 |
|
zilmar
|
5e7b18700d
|
[Android] Get SubConstFromVariable to use temp registers
|
2016-10-01 11:42:26 +10:00 |
|
zilmar
|
05e19ef139
|
[Android] Fix StoreArmRegToArmRegPointer
|
2016-10-01 11:41:25 +10:00 |
|
zilmar
|
5367ffe728
|
[Android] Get PopArmReg to handle the other registers
|
2016-10-01 11:40:25 +10:00 |
|
zilmar
|
b0f9a7773d
|
[Android] Get PushArmReg to handle the rest of the registers
|
2016-10-01 11:37:50 +10:00 |
|
zilmar
|
f41484339d
|
[Android] Get MoveConstToVariable to use map temp
|
2016-10-01 11:33:28 +10:00 |
|
zilmar
|
fbe89fd614
|
[Android] Get CompareArmReg to handle larger registers
|
2016-10-01 11:32:29 +10:00 |
|
zilmar
|
f90c3d76e1
|
[Android] Add XorArmRegToArmReg
|
2016-10-01 10:54:23 +10:00 |
|
zilmar
|
338881c4ab
|
[Android] Add XorArmRegToArmReg
|
2016-10-01 10:43:31 +10:00 |
|
zilmar
|
25954e657e
|
[Android] Add XorConstToArmReg
|
2016-10-01 10:36:40 +10:00 |
|
zilmar
|
25e2125a63
|
[Android[ Add StoreArmRegToArmRegPointer
|
2016-10-01 10:35:31 +10:00 |
|
zilmar
|
f9cf02ada0
|
[Android] Add SignExtendByte
|
2016-10-01 10:34:14 +10:00 |
|
zilmar
|
cdba209aea
|
]Android] Add ShiftLeftImmed
|
2016-10-01 10:21:54 +10:00 |
|
zilmar
|
5f787d8540
|
[Android] Add ShiftRightUnsignImmed
|
2016-10-01 10:16:25 +10:00 |
|
zilmar
|
4174ec153b
|
[Android] Add MulF32
|
2016-10-01 09:32:32 +10:00 |
|
zilmar
|
c0802d11c7
|
[Android] Add OrArmRegToArmReg
|
2016-10-01 09:26:52 +10:00 |