zilmar
|
8e94b3086b
|
Core: Change recompiler to use asmjit
|
2022-11-23 14:46:55 +10:30 |
|
zilmar
|
2a6d3cd519
|
Core: remove #ifdef toremove block in CX86RecompilerOps::SPECIAL_DMULTU()
|
2022-11-21 08:55:51 +10:30 |
|
zilmar
|
9743f12b1d
|
Core: Remvoe #ifdef LinkBlocks code block
|
2022-11-21 08:52:19 +10:30 |
|
zilmar
|
989827cb77
|
Core: Do not set m_MemoryReadMap/m_MemoryWriteMap if tlb mapping is outside rdram
|
2022-11-14 21:20:28 +10:30 |
|
zilmar
|
97e3f50007
|
Core: Update mask of registers in CRegisters::Cop0_MT
|
2022-11-14 20:56:21 +10:30 |
|
zilmar
|
cabcd2cc95
|
Core: Handle masking of random in CSystemTimer::UpdateTimers
|
2022-11-14 11:19:02 +10:30 |
|
zilmar
|
48da86bea1
|
Core: if Rom is larger than ISViewerHandler, then use rom handler
|
2022-11-08 10:54:01 +10:30 |
|
zilmar
|
529812fdca
|
Core: Switch to use asmjit registers in recompiler
|
2022-11-07 21:03:32 +10:30 |
|
zilmar
|
a4c49a3567
|
Core: rearrange XorVariableToX86reg parameters
|
2022-11-07 16:30:09 +10:30 |
|
zilmar
|
2fcce6cdd5
|
Cote: TestVariable rearrange parameters
|
2022-11-07 16:25:54 +10:30 |
|
zilmar
|
fe1f99ae1c
|
Core: rearrange TestConstToX86Reg parameters
|
2022-11-07 16:22:51 +10:30 |
|
zilmar
|
ce939100c5
|
Core: rearrange OrVariableToX86Reg parameters
|
2022-11-07 16:18:54 +10:30 |
|
zilmar
|
697397f1dd
|
Core: Rearrange OrConstToX86Reg parameters
|
2022-11-07 16:03:45 +10:30 |
|
zilmar
|
40259d01ca
|
Core: rearrange OrConstToVariable parameters
|
2022-11-07 15:55:19 +10:30 |
|
zilmar
|
c95aae8e38
|
Core: rearrange MoveZxVariableToX86regHalf parameters
|
2022-11-07 15:48:39 +10:30 |
|
zilmar
|
96eed54a1d
|
Core: rearrange MoveZxVariableToX86regByte parameters
|
2022-11-07 15:44:10 +10:30 |
|
zilmar
|
4570d9eab5
|
Core: rearrange MoveZxHalfX86regPointerToX86reg variables
|
2022-11-07 15:40:01 +10:30 |
|
zilmar
|
8a2197707b
|
Core: rearrange MoveZxByteX86regPointerToX86reg parameters
|
2022-11-07 15:38:36 +10:30 |
|
zilmar
|
59892a266b
|
Core: rearrange MoveX86regToVariable parameters
|
2022-11-07 15:30:25 +10:30 |
|
zilmar
|
91a192cead
|
Core: rearrange MoveX86regToMemory parameters
|
2022-11-07 14:40:28 +10:30 |
|
zilmar
|
891d487fdd
|
Core: rearrange MoveX86regPointerToX86regDisp8 parameters
|
2022-11-07 14:38:34 +10:30 |
|
zilmar
|
d74694d16f
|
Core: rearrange MoveX86regPointerToX86reg parameters
|
2022-11-07 14:36:11 +10:30 |
|
zilmar
|
ebca0854d7
|
Core: rearrange MoveX86regHalfToX86regPointer parameters
|
2022-11-07 14:29:33 +10:30 |
|
zilmar
|
efac334136
|
Rearrange MoveX86regHalfToVariable parameters
|
2022-11-07 14:26:06 +10:30 |
|
zilmar
|
1966b842f3
|
Core: rearrange MoveX86regByteToX86regPointer parameters
|
2022-11-07 14:24:22 +10:30 |
|
zilmar
|
bb51c3d11d
|
Core: rearrange MoveX86regByteToVariable parameters
|
2022-11-07 14:23:09 +10:30 |
|
zilmar
|
d19fc10f0c
|
Core: remove MoveVariableToX86regByte, MoveVariableToX86regHalf, MoveX86regByteToN64Mem
|
2022-11-07 14:21:26 +10:30 |
|
zilmar
|
8702e6b67c
|
core: Rearrange MoveVariableDispToX86Reg parmeters
|
2022-11-07 14:18:15 +10:30 |
|
zilmar
|
10dd2c662a
|
Core: rearrange MoveSxVariableToX86regHalf parameters
|
2022-11-07 14:08:23 +10:30 |
|
zilmar
|
eb5d0ce363
|
Core: rearrange MoveSxVariableToX86regByte parameters
|
2022-11-07 14:05:08 +10:30 |
|
zilmar
|
1584d25cd9
|
Core: Rearrange MoveSxHalfX86regPointerToX86reg parameters
|
2022-11-07 13:41:49 +10:30 |
|
zilmar
|
fe7b8afa92
|
Core: Rearrange MoveSxByteX86regPointerToX86reg parameters
|
2022-11-07 13:37:29 +10:30 |
|
zilmar
|
288fe4d222
|
Core: reorder MoveConstToX86regPointer parameters
|
2022-11-07 11:35:11 +10:30 |
|
zilmar
|
b68caed6c4
|
Core: reorder MoveConstByteToX86regPointer parameters
|
2022-11-07 11:32:46 +10:30 |
|
zilmar
|
eb0aa05a48
|
Core: remove x86 functions referencing n64mem
|
2022-11-07 11:30:51 +10:30 |
|
zilmar
|
40456f12db
|
Core: Change order of MoveConstToVariable
|
2022-11-07 11:26:17 +10:30 |
|
zilmar
|
5c7390324a
|
Core: reorder MoveConstToMemoryDisp parameters
|
2022-11-07 10:45:28 +10:30 |
|
zilmar
|
8272d18aa6
|
Reorder MoveConstHalfToX86regPointer parameters
|
2022-11-07 10:43:27 +10:30 |
|
zilmar
|
0123100233
|
Core: reorder MoveConstHalfToVariable parameters
|
2022-11-07 10:37:29 +10:30 |
|
zilmar
|
bdb2d040f9
|
Core: reorder MoveConstByteToVariable parameters
|
2022-11-07 10:34:25 +10:30 |
|
zilmar
|
eb8b36603b
|
Core: remove MoveConstByteToN64Mem, MoveConstHalfToN64Mem, MoveConstToN64Mem, MoveConstToN64MemDisp
|
2022-11-07 10:27:22 +10:30 |
|
zilmar
|
9dd2df36d4
|
Core: remove CX86Ops::CompVariableToX86reg
|
2022-11-07 10:18:55 +10:30 |
|
zilmar
|
09fb90117e
|
Core: reorder CompConstToVariable parameters
|
2022-11-07 10:11:55 +10:30 |
|
zilmar
|
ade6787e6d
|
Core: Reorder AndVariableToX86Reg parameters
|
2022-11-07 10:00:35 +10:30 |
|
zilmar
|
513ca57f46
|
Core: Reorder parameters for AndVariableDispToX86Reg
|
2022-11-07 09:51:41 +10:30 |
|
zilmar
|
897fd39a0e
|
Core: reorder AndConstToVariable parameters
|
2022-11-07 09:40:12 +10:30 |
|
zilmar
|
c13080d7c3
|
Core: Reorder AddX86regToVariable parameters
|
2022-11-07 09:34:34 +10:30 |
|
zilmar
|
c7ac150b91
|
Core: Capitalize Reg in x86ops
|
2022-11-07 09:31:37 +10:30 |
|
zilmar
|
dbd20dd993
|
Core: Reorder AddConstToVariable parameters
|
2022-11-07 09:29:06 +10:30 |
|
zilmar
|
6a69e2e86a
|
Core: remove CX86Ops::AdcX86regToVariable
|
2022-11-07 09:25:31 +10:30 |
|
zilmar
|
b3c6858b69
|
Core: Change COP0 registers to use an enum
|
2022-11-07 09:24:58 +10:30 |
|
zilmar
|
fd71b2dfcb
|
Core: Handle branch/jump in a delay slot in the Interpreter
|
2022-11-01 08:59:15 +10:30 |
|
zilmar
|
94247ce1a6
|
Core: handle better CX86RecompilerOps::ResetMemoryStack
|
2022-10-28 16:41:24 +10:30 |
|
zilmar
|
6c9237f603
|
Core: Get recompiler to handle RESERVED31
|
2022-10-24 16:50:12 +10:30 |
|
zilmar
|
d06d1526d9
|
Core: Change the order of MoveVariableToX86reg parameters
|
2022-10-24 16:05:19 +10:30 |
|
zilmar
|
af3c31b0ff
|
Core: Change the order of MoveConstToX86Pointer
|
2022-10-24 15:09:24 +10:30 |
|
zilmar
|
538933e0a5
|
Core: reoder MoveConstToX86reg parameters
|
2022-10-24 15:05:31 +10:30 |
|
zilmar
|
dd61a4351d
|
Core: Reorder the order of MoveX86regToX86regPointer
|
2022-10-24 12:56:38 +10:30 |
|
zilmar
|
fdbc31961f
|
Core: Change the order of MoveX86RegToX86Reg
|
2022-10-24 12:48:51 +10:30 |
|
zilmar
|
8713878994
|
Core: Change order of MoveX86regToX86Pointer parameters
|
2022-10-24 12:13:48 +10:30 |
|
zilmar
|
ef8067cf12
|
Android: Make a skeleton for arm to start over arm recompiler
|
2022-10-24 11:15:46 +10:30 |
|
zilmar
|
ae6157427f
|
Recompiler: Handle stack if it is in IMEM/DMEM
|
2022-10-21 10:03:33 +10:30 |
|
zilmar
|
4525e8b6f3
|
Core: Move IMEM/DMEM into SPRegistersHandler
|
2022-10-17 17:29:05 +10:30 |
|
zilmar
|
96244cd6fd
|
Core: Update NonMemory Access to pifram
|
2022-10-17 11:31:54 +10:30 |
|
zilmar
|
53e00b8023
|
Core: Clean up masking of COP0 registers
|
2022-10-17 09:06:22 +10:30 |
|
zilmar
|
9186dcab39
|
Core: Allow reading from ISViewerHandler
|
2022-10-17 08:59:26 +10:30 |
|
zilmar
|
305648f02f
|
Core: Do not allow byte aligned blocks after the first block
|
2022-10-17 08:53:41 +10:30 |
|
zilmar
|
60969607c8
|
Core: Ignore EverDrive - 64 X7 Serial Registers in PI_DMA_READ
|
2022-10-17 08:48:30 +10:30 |
|
zilmar
|
65bbc375b9
|
Core: Fix R4300iOp::LWC1 to have 64bit address
|
2022-10-17 08:36:17 +10:30 |
|
zilmar
|
c16307ec0f
|
Core: Move Pifram code into PifRamHandler
|
2022-10-17 08:27:52 +10:30 |
|
zilmar
|
315231d439
|
Core: Writing to 0x0410000C was not calling AfterCallDirect()
|
2022-10-11 17:31:28 +10:30 |
|
zilmar
|
2199c9cd1f
|
Core: Inherit STATE_CONST_64 in CX86RecompilerOps::InheritParentInfo
|
2022-10-11 17:24:06 +10:30 |
|
zilmar
|
801a3e29fc
|
Core: Handle more with LW and invalid addresses
|
2022-10-10 20:25:16 +10:30 |
|
zilmar
|
082ec9c22e
|
Core: Handle unaligned LH
|
2022-10-10 17:17:56 +10:30 |
|
zilmar
|
ca037abf2b
|
Core: Update counters when updating wired
|
2022-10-10 15:44:52 +10:30 |
|
zilmar
|
29e1468338
|
Core: Ignore next targeting branch if last op in block
|
2022-10-10 14:30:20 +10:30 |
|
zilmar
|
0848bab003
|
Core: do not predefine temp reg
|
2022-10-10 13:57:10 +10:30 |
|
zilmar
|
46dcf967e1
|
Core: Change StackPos to be a reference
|
2022-10-10 13:42:52 +10:30 |
|
zilmar
|
6044222be0
|
Core: Remove temp usage of Name
|
2022-10-10 13:38:43 +10:30 |
|
zilmar
|
0ffaf43418
|
Core: fix CX86RecompilerOps::LD when rt==base
|
2022-10-10 12:41:12 +10:30 |
|
zilmar
|
96cece6cd9
|
Core: Update timing around exception in DADD/DSUB
|
2022-10-10 12:34:11 +10:30 |
|
zilmar
|
3a87c3c5ad
|
Core: Update timing around exception in ADD/SUB
|
2022-10-10 12:28:06 +10:30 |
|
zilmar
|
3b57424b86
|
Core: DMTC/MT should not be updating registers
|
2022-10-10 12:16:27 +10:30 |
|
zilmar
|
481f1c50c8
|
Core: Add break op to recompiler
|
2022-10-10 12:07:04 +10:30 |
|
zilmar
|
fc247fd953
|
Core: Get recompiler to handle DADDI/DADDIU
|
2022-10-10 11:53:30 +10:30 |
|
zilmar
|
a8add093d1
|
Core: Add CPO_DMF/CPO_DMT to recompiler
|
2022-10-10 11:38:55 +10:30 |
|
zilmar
|
761a1ee52a
|
Code clean up
|
2022-10-10 10:52:17 +10:30 |
|
zilmar
|
0d7f25138c
|
Core: Do not check sign extension in 32bit core
|
2022-10-04 09:47:45 +10:30 |
|
zilmar
|
8391cdafde
|
Core: Fix masking of context
|
2022-10-03 21:48:09 +10:30 |
|
zilmar
|
da138bf38b
|
Project64: Exception when address not sign extended
|
2022-10-03 18:35:50 +10:30 |
|
zilmar
|
82d9027374
|
Core: Fix up XContext
|
2022-10-03 11:29:21 +10:30 |
|
zilmar
|
42cc34964b
|
Core: Sign extend cop0
|
2022-10-03 09:34:13 +10:30 |
|
zilmar
|
0c078049c0
|
Android: Update android build
|
2022-09-26 12:53:14 +09:30 |
|
zilmar
|
179282043f
|
Project64: Code cleanup
|
2022-09-26 12:01:54 +09:30 |
|
zilmar
|
a2981ff4d8
|
Core: Make Load/Store use 64bit vaddr
|
2022-09-19 21:36:36 +09:30 |
|
zilmar
|
1c77f6f0fd
|
Core: Make Cop0 64bit
|
2022-09-19 16:36:44 +09:30 |
|
zilmar
|
21b193152a
|
Core: Fix CMipsMemoryVM::MemoryValue64 for sdl/sdr
|
2022-09-19 12:13:19 +09:30 |
|
zilmar
|
05d46c9487
|
Core: Handle reserve instruction 31
|
2022-09-19 12:12:08 +09:30 |
|
zilmar
|
a79a8a9276
|
Core: Clean up arm recompiler changes
|
2022-09-12 22:44:42 +09:30 |
|
zilmar
|
457937f039
|
Core: Map temp pass in flag for 8 bit register
|
2022-09-12 06:01:43 +09:30 |