zilmar
|
115881524b
|
RSP: Better handling on unaligned SH and SW
|
2023-07-06 20:55:02 +09:30 |
|
zilmar
|
fbb388fa0f
|
Rsp: Fix capitalization in rsp_UnknownOpcode
|
2023-07-06 20:51:17 +09:30 |
|
zilmar
|
07cf94bde3
|
RSP: only look at SP_STATUS_HALT when seeing if the RSP should run
|
2023-07-06 20:49:14 +09:30 |
|
zilmar
|
7dc30b1d6d
|
RSP: Update dissam of load/store vector ops
|
2023-07-06 17:49:15 +09:30 |
|
zilmar
|
f8f9688386
|
RSP: get RSP_LH_DMEM and RSP_LW_DMEM to handle end of memory roll over
|
2023-06-29 14:52:46 +09:30 |
|
zilmar
|
cfc63532dd
|
RSP: move p_func from RspTypes.h to Cpu.h
|
2023-06-29 12:31:25 +09:30 |
|
zilmar
|
02da0ccad1
|
RSP: Use bool instead of Boolean
|
2023-06-29 12:29:07 +09:30 |
|
zilmar
|
2ce9eaa667
|
RSP: Rename Types.h to RspTypes.h
|
2023-06-29 11:03:55 +09:30 |
|
zilmar
|
1c61f15ea9
|
RSP: Update display of vector ops
|
2023-06-29 10:59:54 +09:30 |
|
zilmar
|
080a3b69ac
|
RSP: Create a RSP instruction for decoding the RSP op
|
2023-06-15 21:09:44 +09:30 |
|
zilmar
|
df215c1cc5
|
RSP: Fix up rename of filters file
|
2023-06-15 14:48:07 +09:30 |
|
zilmar
|
ef24ec11d8
|
Rename RSP to Project64-rsp
|
2023-06-15 14:45:27 +09:30 |
|
zilmar
|
187bd64915
|
Core: Update how exceptions are handled with the recompiler
|
2023-06-08 16:25:05 +09:30 |
|
Nayla
|
18a712ce6a
|
Update Interface.cpp (#2367)
|
2023-06-03 07:11:57 +09:30 |
|
zilmar
|
f4459fe143
|
RSP: Update RSP name in package_zip.cmd
|
2023-06-02 10:52:10 +09:30 |
|
zilmar
|
98b96a60cb
|
RSP: Get the code to conform to clang-format
|
2023-06-01 21:16:23 +09:30 |
|
zilmar
|
90fefed579
|
RSP: Fix text when adding tab to registers
|
2023-06-01 19:40:53 +09:30 |
|
zilmar
|
1522f17b9c
|
RSP: Convert base code to be compiled as c++ instead of C
|
2023-06-01 17:11:26 +09:30 |
|
zilmar
|
a39ebe7d37
|
Core: Create InitFpuOperation
|
2023-05-27 10:01:19 +09:30 |
|
zilmar
|
e2eebe566d
|
Core: fix up for clang
|
2023-05-18 18:05:54 +09:30 |
|
zilmar
|
b438fddf2e
|
Core: Add CP2 handling
|
2023-05-18 18:04:41 +09:30 |
|
zilmar
|
3b8dfce64a
|
Core: Convert DoBreakException to TriggerException
|
2023-05-18 11:47:00 +09:30 |
|
zilmar
|
b2c2a03a2e
|
Core: convert DoFloatingPointException to TriggerException
|
2023-05-18 11:41:20 +09:30 |
|
zilmar
|
0dfab78c88
|
Core: Convert DoCopUnusableException to TriggerException
|
2023-05-18 11:26:36 +09:30 |
|
zilmar
|
456f25eb6b
|
Core: Get DoIntrException to use TriggerException
|
2023-05-18 11:19:26 +09:30 |
|
zilmar
|
252f629e14
|
Core: Convert DoIllegalInstructionException to TriggerException
|
2023-05-18 11:13:22 +09:30 |
|
zilmar
|
59a1277bed
|
Core: Convert GenerateOverflowException to TriggerException
|
2023-05-18 11:05:27 +09:30 |
|
zilmar
|
69fd74ba56
|
Core: Convert DoSysCallException to TriggerException
|
2023-05-18 10:56:06 +09:30 |
|
zilmar
|
17df17805d
|
Core: convert DoTrapException to TriggerException
|
2023-05-18 10:49:58 +09:30 |
|
zilmar
|
74912ca8c2
|
Core: handle jump to unaligned addresses
|
2023-05-18 10:33:57 +09:30 |
|
zilmar
|
6e58edb076
|
Core: Merge CheckFPUException into CheckFPUResult32
|
2023-05-15 23:16:54 +09:30 |
|
zilmar
|
62b29622ca
|
Core: remove usage of fpclassify in CheckFPUInput32 and CheckFPUResult32
|
2023-05-15 22:57:13 +09:30 |
|
zilmar
|
0ddeb6b981
|
Core: remove exception out of R4300iOp::CheckFPUInput32
|
2023-05-15 20:56:56 +09:30 |
|
zilmar
|
fdc637516f
|
Core: remove Double_RoundToInteger64
|
2023-05-09 13:05:58 +09:30 |
|
zilmar
|
5a23f48629
|
Core: remove Double_RoundToInteger32
|
2023-05-09 12:57:08 +09:30 |
|
zilmar
|
e5b1a9469a
|
Core: remove Float_RoundToInteger64
|
2023-05-09 12:50:23 +09:30 |
|
zilmar
|
2c19c2c362
|
Core: Handle CPO1 unimplemented op
|
2023-05-09 11:28:59 +09:30 |
|
zilmar
|
85f4f147a1
|
Core: Remove Float_RoundToInteger32
|
2023-05-09 09:40:10 +09:30 |
|
zilmar
|
49a385e743
|
Core: Split CheckFPUException into CheckFPUException and CheckFPUInvalidException
|
2023-05-09 08:06:15 +09:30 |
|
zilmar
|
fa25b6d2af
|
Core: clear FPU StatusReg cause in CX86RecompilerOps::COP1_S_ADD
|
2023-05-02 11:12:13 +09:30 |
|
zilmar
|
02a48566c0
|
Core: Remove helper functions from x86 Recompiler Ops
|
2023-05-02 10:50:49 +09:30 |
|
zilmar
|
5cfb80fcfc
|
Core: Improve R4300iOp::COP1_S_CVT_W
|
2023-04-24 19:02:00 +09:30 |
|
zilmar
|
71ef28fd55
|
Core: Add R4300iOp::COP1_W_CVT_W
|
2023-04-24 18:55:06 +09:30 |
|
zilmar
|
ab8b004b71
|
Core: Add a setting for fpu reg caching
|
2023-04-17 18:47:33 +09:30 |
|
zilmar
|
cba01b2063
|
Core: Improve R4300iOp::COP1_L_CVT_D
|
2023-04-17 18:08:51 +09:30 |
|
zilmar
|
d9e69fee65
|
Core: Improve R4300iOp::COP1_D_CMP
|
2023-04-17 18:07:58 +09:30 |
|
zilmar
|
0cc6d21ad1
|
Core: Improve R4300iOp::COP1_S_CMP
|
2023-04-17 18:06:42 +09:30 |
|
zilmar
|
9297b1c4b8
|
Core: Improve COP1_S_CVT_D, COP1_W_CVT_D, COP1_D_CVT_S, COP1_W_CVT_S, COP1_L_CVT_S,
|
2023-04-11 16:20:24 +09:30 |
|
zilmar
|
9a04293a67
|
Update arm/arm64 to use asmjit
|
2023-04-05 10:16:21 +09:30 |
|
zilmar
|
2c40d47a34
|
Start to look at x64 recompiler
|
2023-04-04 17:44:42 +09:30 |
|
zilmar
|
fe35d950f3
|
x64: Change MemoryStackPos to be a pointer
|
2023-04-03 09:08:43 +09:30 |
|
zilmar
|
422a42cae3
|
Core: More work improve the accuracy of cop1
|
2023-03-28 13:12:59 +10:30 |
|
zilmar
|
ce69324dbe
|
Core: Update R4300iOp::COP1_S_MUL to handle exceptions
|
2023-03-21 10:49:49 +10:30 |
|
zilmar
|
cbf67cede4
|
Core: Update sub.d to handle exceptions
|
2023-03-20 17:17:31 +10:30 |
|
zilmar
|
96787690c7
|
Core: Fix CoprocessorUnitNumber on exception
|
2023-03-20 12:09:06 +10:30 |
|
zilmar
|
7f7aee7232
|
Core: remove FAKE_CAUSE_REGISTER
|
2023-03-14 12:14:10 +10:30 |
|
David Benepe
|
96792b18c8
|
Fixed DPI scaling issue in some debugger windows (#2353)
|
2023-03-12 16:58:32 +10:30 |
|
zilmar
|
9093b42d47
|
Core: improve the accuracy of COP1_S_SUB
|
2023-03-06 20:58:47 +10:30 |
|
zilmar
|
306f21b5fa
|
Core: Improve accuracy of add.d
|
2023-03-06 18:28:32 +10:30 |
|
zilmar
|
a25e5ca4c0
|
x64: Fix rom browser showing columns
|
2023-03-04 07:19:35 +10:30 |
|
Matando
|
f048fb26e2
|
Fix MBC30 transferpak support in nrage input plugin (#2292)
|
2023-03-03 09:58:24 +10:30 |
|
zilmar
|
ea70218d1c
|
Clean up warnings
|
2023-02-28 10:09:08 +10:30 |
|
zilmar
|
cb124b7009
|
x64: Get PluginRSP to build for x64
|
2023-02-27 11:25:22 +10:30 |
|
zilmar
|
0e5b6cd0e8
|
Common: update stdstr::Replace with the version of replace being used
|
2023-02-27 11:02:25 +10:30 |
|
zilmar
|
1864adcb35
|
Core: improve the accuracy of COP1_S_ADD
|
2023-02-21 14:54:22 +10:30 |
|
jarupxx
|
3aef396007
|
Add editbox to choose directory dialog (#2340)
|
2023-02-14 08:12:38 +10:30 |
|
zilmar
|
3acd56ae61
|
Core Fix up clang formatting
|
2023-02-14 08:05:40 +10:30 |
|
zilmar
|
2db5c81af5
|
Core: Change Project64.rdb so it use 1's and 0's instead of "Yes" or "No"
|
2023-02-13 21:05:57 +10:30 |
|
zilmar
|
e14e10f4b0
|
Core: Fix handling of R4300iOp::COP1_S_CMP and R4300iOp::COP1_D_CMP
|
2023-02-13 16:22:50 +10:30 |
|
zilmar
|
baa5dbe257
|
Core: Add some error message when failing to load rom
|
2023-02-13 12:04:31 +10:30 |
|
zilmar
|
4390a0926c
|
Remove _Pairib usage
|
2023-02-13 08:55:56 +10:30 |
|
zilmar
|
a8a553b316
|
Core: fix code to make clang happy
|
2023-01-31 07:54:47 +10:30 |
|
zilmar
|
83a7d9e3f2
|
Core: Start to improve the accuracy of R4300iOp::COP1_S_ADD
|
2023-01-30 20:36:58 +10:30 |
|
zilmar
|
7affd514c0
|
Core: Convert TEST_COP1_USABLE_EXCEPTION from a macro to a function
|
2023-01-30 11:40:03 +10:30 |
|
zilmar
|
f802b18cdc
|
Core: Change to using fenv.h instead of including the code directly
|
2023-01-30 10:07:51 +10:30 |
|
zilmar
|
fb6bda321c
|
Core: SW_Register needs to protect the register
|
2023-01-23 15:30:39 +10:30 |
|
zilmar
|
0e52bfb185
|
Core: Fix the allocation of rdram size if set in the rdb
|
2023-01-23 08:30:13 +10:30 |
|
zilmar
|
210ebd42de
|
Core: have an option for rdram to be different between known and unknown roms
|
2023-01-16 20:53:48 +10:30 |
|
zilmar
|
dbd360f676
|
Core: Handle exception of mov word ptr ds:[E01F4F52h],ax
|
2023-01-09 17:53:16 +10:30 |
|
zilmar
|
531a7df959
|
Core: Improve StoreInstruc
|
2023-01-09 14:26:35 +10:30 |
|
zilmar
|
ccae22afc5
|
Core: Revert SPECIAL_SRA and SPECIAL_SRAV to old version when running as 32bit
|
2023-01-09 13:47:41 +10:30 |
|
zilmar
|
b6629ac1d3
|
Android: Fix build warning with CX86Ops::CallThis
|
2023-01-03 14:49:35 +10:30 |
|
zilmar
|
e0373025ef
|
Core: Have user rom settings in Project64.rdb.user
|
2023-01-03 13:08:00 +10:30 |
|
zilmar
|
80aecdc5e3
|
Core: Improve R4300iOp::COP1_CT
|
2023-01-02 19:49:19 +10:30 |
|
zilmar
|
3c73c06b01
|
Update Project files to remove some headers that no longer exist
|
2023-01-02 17:56:12 +10:30 |
|
zilmar
|
811aaf9d36
|
Core: Fix up SPECIAL_SRAV for 64bit copy
|
2022-12-26 18:34:53 +10:30 |
|
zilmar
|
c619b71b26
|
Core: get sra to handle 64bit shift
|
2022-12-26 18:13:45 +10:30 |
|
zilmar
|
b217428fee
|
Core: fix up masking in CX86RecompilerOps::COP1_CT
|
2022-12-26 17:35:58 +10:30 |
|
zilmar
|
0cc7ede816
|
Core: Fix up BGEZALL in recompiler
|
2022-12-26 17:19:32 +10:30 |
|
zilmar
|
2c6d3429b7
|
Core: Fix handling of BGEZAL ra in recompiler
|
2022-12-26 16:14:05 +10:30 |
|
zilmar
|
f6e4443dda
|
Core: Revert Unaligned DMA to fix some hacks
|
2022-12-26 15:15:28 +10:30 |
|
zilmar
|
f380d326fe
|
Core: Start to handle jump in delay slot
|
2022-12-26 12:54:04 +10:30 |
|
zilmar
|
620aabcf9e
|
Core: Add clang script and check on building release
|
2022-12-19 15:51:02 +10:30 |
|
zilmar
|
bd1b1b4dbb
|
Core: Missed file for code clean up
|
2022-12-19 15:36:08 +10:30 |
|
zilmar
|
c0341bb759
|
Core: Code clean up for clang
|
2022-12-19 15:35:17 +10:30 |
|
zilmar
|
ae62981aef
|
Core: Remove unaligned dma
|
2022-12-19 10:15:31 +10:30 |
|
zilmar
|
cbacddb65e
|
Core: Make 32bit CPU recompiler only setting
|
2022-12-19 09:07:26 +10:30 |
|
zilmar
|
6c154f6547
|
Core: Add Cop2/Cop3 handling exception
|
2022-12-12 21:29:16 +10:30 |
|
zilmar
|
c8bb04b6b0
|
Core: Mask COP1_CT reg 31
|
2022-12-12 19:04:03 +10:30 |
|
zilmar
|
d3afe97d38
|
Core: Initialize FPR_Ctrl[Revision] to 0xA00
|
2022-12-12 15:27:07 +10:30 |