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6,157 Commits 3 Branches 7 Tags 87 MiB
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1033 Commits

Author SHA1 Message Date
zilmar f802b18cdc Core: Change to using fenv.h instead of including the code directly 2023-01-30 10:07:51 +10:30
zilmar fb6bda321c Core: SW_Register needs to protect the register 2023-01-23 15:30:39 +10:30
zilmar 0e52bfb185 Core: Fix the allocation of rdram size if set in the rdb 2023-01-23 08:30:13 +10:30
zilmar 210ebd42de Core: have an option for rdram to be different between known and unknown roms 2023-01-16 20:53:48 +10:30
zilmar 531a7df959 Core: Improve StoreInstruc 2023-01-09 14:26:35 +10:30
zilmar ccae22afc5 Core: Revert SPECIAL_SRA and SPECIAL_SRAV to old version when running as 32bit 2023-01-09 13:47:41 +10:30
zilmar b6629ac1d3 Android: Fix build warning with CX86Ops::CallThis 2023-01-03 14:49:35 +10:30
zilmar e0373025ef Core: Have user rom settings in Project64.rdb.user 2023-01-03 13:08:00 +10:30
zilmar 80aecdc5e3 Core: Improve R4300iOp::COP1_CT 2023-01-02 19:49:19 +10:30
zilmar 811aaf9d36 Core: Fix up SPECIAL_SRAV for 64bit copy 2022-12-26 18:34:53 +10:30
zilmar c619b71b26 Core: get sra to handle 64bit shift 2022-12-26 18:13:45 +10:30
zilmar b217428fee Core: fix up masking in CX86RecompilerOps::COP1_CT 2022-12-26 17:35:58 +10:30
zilmar 0cc7ede816 Core: Fix up BGEZALL in recompiler 2022-12-26 17:19:32 +10:30
zilmar 2c6d3429b7 Core: Fix handling of BGEZAL ra in recompiler 2022-12-26 16:14:05 +10:30
zilmar f6e4443dda Core: Revert Unaligned DMA to fix some hacks 2022-12-26 15:15:28 +10:30
zilmar f380d326fe Core: Start to handle jump in delay slot 2022-12-26 12:54:04 +10:30
zilmar 620aabcf9e Core: Add clang script and check on building release 2022-12-19 15:51:02 +10:30
zilmar bd1b1b4dbb Core: Missed file for code clean up 2022-12-19 15:36:08 +10:30
zilmar c0341bb759 Core: Code clean up for clang 2022-12-19 15:35:17 +10:30
zilmar ae62981aef Core: Remove unaligned dma 2022-12-19 10:15:31 +10:30
zilmar cbacddb65e Core: Make 32bit CPU recompiler only setting 2022-12-19 09:07:26 +10:30
zilmar 6c154f6547 Core: Add Cop2/Cop3 handling exception 2022-12-12 21:29:16 +10:30
zilmar c8bb04b6b0 Core: Mask COP1_CT reg 31 2022-12-12 19:04:03 +10:30
zilmar d3afe97d38 Core: Initialize FPR_Ctrl[Revision] to 0xA00 2022-12-12 15:27:07 +10:30
zilmar ff56992542 Android: Some more core changes for asmjit 2022-12-07 09:04:55 +10:30
zilmar 6b04b908bf Core: Handle bgezal ra in the recompiler 2022-12-05 14:09:03 +10:30
zilmar d35d2e6abe Core: Move ReadsGPR, WritesGPR, ReadsHI(), ReadsLO(), WritesHI(), WritesLO() out of OpInfo and into R4300iInstruction 2022-12-05 12:23:09 +10:30
zilmar 138868d9ac Core: Get x64 compiling 2022-11-30 17:19:15 +10:30
zilmar ed357e5d97 Core: Get recompiler to call PifRamHandler when in pif address space 2022-11-27 11:07:28 +10:30
zilmar 1e3fff2b41 Core: ignore memory stack pointer when stack pointer is reset 2022-11-25 09:34:54 +10:30
zilmar 1f2fe96d76 Merge branch 'develop' of https://github.com/project64/project64 into develop 2022-11-24 09:10:50 +10:30
zilmar 79d749e33d Core: fix bug in CX86Ops::CallFunc when not logging opcodes 2022-11-24 09:10:15 +10:30
Squall Leonhart 8eecb0c823
Extend mempak Index Table to the intended 256 bytes, so that the default checksum is actually correct, and include the backup of that data. (#2304) 
* just a test to see what happens

* duplicate the full 256 bytes.

* Didn't need to duplicate it after all.

The index table wasn't actually 256 bytes as intended, so the checksum was invalid.

Cruis'n'USA 1.0 didn't like this one bit.

* fully duplicate it after all just in case of a rare case

where a game breaks without the backup of the checksum and table.

* this looks properly duplicated now.

perhaps
 2022-11-24 07:49:48 +10:30
zilmar e3aa2514c1 Core: Fix bug in CX86RecompilerOps::SPECIAL_DIV 2022-11-23 20:16:38 +10:30
zilmar 8e94b3086b Core: Change recompiler to use asmjit 2022-11-23 14:46:55 +10:30
zilmar 2a6d3cd519 Core: remove #ifdef toremove block in CX86RecompilerOps::SPECIAL_DMULTU() 2022-11-21 08:55:51 +10:30
zilmar 9743f12b1d Core: Remvoe #ifdef LinkBlocks code block 2022-11-21 08:52:19 +10:30
zilmar 989827cb77 Core: Do not set m_MemoryReadMap/m_MemoryWriteMap if tlb mapping is outside rdram 2022-11-14 21:20:28 +10:30
zilmar 97e3f50007 Core: Update mask of registers in CRegisters::Cop0_MT 2022-11-14 20:56:21 +10:30
zilmar cabcd2cc95 Core: Handle masking of random in CSystemTimer::UpdateTimers 2022-11-14 11:19:02 +10:30
zilmar 48da86bea1 Core: if Rom is larger than ISViewerHandler, then use rom handler 2022-11-08 10:54:01 +10:30
zilmar 529812fdca Core: Switch to use asmjit registers in recompiler 2022-11-07 21:03:32 +10:30
zilmar a4c49a3567 Core: rearrange XorVariableToX86reg parameters 2022-11-07 16:30:09 +10:30
zilmar 2fcce6cdd5 Cote: TestVariable rearrange parameters 2022-11-07 16:25:54 +10:30
zilmar fe1f99ae1c Core: rearrange TestConstToX86Reg parameters 2022-11-07 16:22:51 +10:30
zilmar ce939100c5 Core: rearrange OrVariableToX86Reg parameters 2022-11-07 16:18:54 +10:30
zilmar 697397f1dd Core: Rearrange OrConstToX86Reg parameters 2022-11-07 16:03:45 +10:30
zilmar 40259d01ca Core: rearrange OrConstToVariable parameters 2022-11-07 15:55:19 +10:30
zilmar c95aae8e38 Core: rearrange MoveZxVariableToX86regHalf parameters 2022-11-07 15:48:39 +10:30
zilmar 96eed54a1d Core: rearrange MoveZxVariableToX86regByte parameters 2022-11-07 15:44:10 +10:30
zilmar 4570d9eab5 Core: rearrange MoveZxHalfX86regPointerToX86reg variables 2022-11-07 15:40:01 +10:30
zilmar 8a2197707b Core: rearrange MoveZxByteX86regPointerToX86reg parameters 2022-11-07 15:38:36 +10:30
zilmar 59892a266b Core: rearrange MoveX86regToVariable parameters 2022-11-07 15:30:25 +10:30
zilmar 91a192cead Core: rearrange MoveX86regToMemory parameters 2022-11-07 14:40:28 +10:30
zilmar 891d487fdd Core: rearrange MoveX86regPointerToX86regDisp8 parameters 2022-11-07 14:38:34 +10:30
zilmar d74694d16f Core: rearrange MoveX86regPointerToX86reg parameters 2022-11-07 14:36:11 +10:30
zilmar ebca0854d7 Core: rearrange MoveX86regHalfToX86regPointer parameters 2022-11-07 14:29:33 +10:30
zilmar efac334136 Rearrange MoveX86regHalfToVariable parameters 2022-11-07 14:26:06 +10:30
zilmar 1966b842f3 Core: rearrange MoveX86regByteToX86regPointer parameters 2022-11-07 14:24:22 +10:30
zilmar bb51c3d11d Core: rearrange MoveX86regByteToVariable parameters 2022-11-07 14:23:09 +10:30
zilmar d19fc10f0c Core: remove MoveVariableToX86regByte, MoveVariableToX86regHalf, MoveX86regByteToN64Mem 2022-11-07 14:21:26 +10:30
zilmar 8702e6b67c core: Rearrange MoveVariableDispToX86Reg parmeters 2022-11-07 14:18:15 +10:30
zilmar 10dd2c662a Core: rearrange MoveSxVariableToX86regHalf parameters 2022-11-07 14:08:23 +10:30
zilmar eb5d0ce363 Core: rearrange MoveSxVariableToX86regByte parameters 2022-11-07 14:05:08 +10:30
zilmar 1584d25cd9 Core: Rearrange MoveSxHalfX86regPointerToX86reg parameters 2022-11-07 13:41:49 +10:30
zilmar fe7b8afa92 Core: Rearrange MoveSxByteX86regPointerToX86reg parameters 2022-11-07 13:37:29 +10:30
zilmar 288fe4d222 Core: reorder MoveConstToX86regPointer parameters 2022-11-07 11:35:11 +10:30
zilmar b68caed6c4 Core: reorder MoveConstByteToX86regPointer parameters 2022-11-07 11:32:46 +10:30
zilmar eb0aa05a48 Core: remove x86 functions referencing n64mem 2022-11-07 11:30:51 +10:30
zilmar 40456f12db Core: Change order of MoveConstToVariable 2022-11-07 11:26:17 +10:30
zilmar 5c7390324a Core: reorder MoveConstToMemoryDisp parameters 2022-11-07 10:45:28 +10:30
zilmar 8272d18aa6 Reorder MoveConstHalfToX86regPointer parameters 2022-11-07 10:43:27 +10:30
zilmar 0123100233 Core: reorder MoveConstHalfToVariable parameters 2022-11-07 10:37:29 +10:30
zilmar bdb2d040f9 Core: reorder MoveConstByteToVariable parameters 2022-11-07 10:34:25 +10:30
zilmar eb8b36603b Core: remove MoveConstByteToN64Mem, MoveConstHalfToN64Mem, MoveConstToN64Mem, MoveConstToN64MemDisp 2022-11-07 10:27:22 +10:30
zilmar 9dd2df36d4 Core: remove CX86Ops::CompVariableToX86reg 2022-11-07 10:18:55 +10:30
zilmar 09fb90117e Core: reorder CompConstToVariable parameters 2022-11-07 10:11:55 +10:30
zilmar ade6787e6d Core: Reorder AndVariableToX86Reg parameters 2022-11-07 10:00:35 +10:30
zilmar 513ca57f46 Core: Reorder parameters for AndVariableDispToX86Reg 2022-11-07 09:51:41 +10:30
zilmar 897fd39a0e Core: reorder AndConstToVariable parameters 2022-11-07 09:40:12 +10:30
zilmar c13080d7c3 Core: Reorder AddX86regToVariable parameters 2022-11-07 09:34:34 +10:30
zilmar c7ac150b91 Core: Capitalize Reg in x86ops 2022-11-07 09:31:37 +10:30
zilmar dbd20dd993 Core: Reorder AddConstToVariable parameters 2022-11-07 09:29:06 +10:30
zilmar 6a69e2e86a Core: remove CX86Ops::AdcX86regToVariable 2022-11-07 09:25:31 +10:30
zilmar b3c6858b69 Core: Change COP0 registers to use an enum 2022-11-07 09:24:58 +10:30
zilmar fd71b2dfcb Core: Handle branch/jump in a delay slot in the Interpreter 2022-11-01 08:59:15 +10:30
zilmar 94247ce1a6 Core: handle better CX86RecompilerOps::ResetMemoryStack 2022-10-28 16:41:24 +10:30
zilmar 6c9237f603 Core: Get recompiler to handle RESERVED31 2022-10-24 16:50:12 +10:30
zilmar d06d1526d9 Core: Change the order of MoveVariableToX86reg parameters 2022-10-24 16:05:19 +10:30
zilmar af3c31b0ff Core: Change the order of MoveConstToX86Pointer 2022-10-24 15:09:24 +10:30
zilmar 538933e0a5 Core: reoder MoveConstToX86reg parameters 2022-10-24 15:05:31 +10:30
zilmar dd61a4351d Core: Reorder the order of MoveX86regToX86regPointer 2022-10-24 12:56:38 +10:30
zilmar fdbc31961f Core: Change the order of MoveX86RegToX86Reg 2022-10-24 12:48:51 +10:30
zilmar 8713878994 Core: Change order of MoveX86regToX86Pointer parameters 2022-10-24 12:13:48 +10:30
zilmar ef8067cf12 Android: Make a skeleton for arm to start over arm recompiler 2022-10-24 11:15:46 +10:30
zilmar ae6157427f Recompiler: Handle stack if it is in IMEM/DMEM 2022-10-21 10:03:33 +10:30
zilmar 4525e8b6f3 Core: Move IMEM/DMEM into SPRegistersHandler 2022-10-17 17:29:05 +10:30
zilmar 96244cd6fd Core: Update NonMemory Access to pifram 2022-10-17 11:31:54 +10:30
zilmar 53e00b8023 Core: Clean up masking of COP0 registers 2022-10-17 09:06:22 +10:30
zilmar 9186dcab39 Core: Allow reading from ISViewerHandler 2022-10-17 08:59:26 +10:30