zilmar
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187bd64915
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Core: Update how exceptions are handled with the recompiler
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2023-06-08 16:25:05 +09:30 |
|
zilmar
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a39ebe7d37
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Core: Create InitFpuOperation
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2023-05-27 10:01:19 +09:30 |
|
zilmar
|
b438fddf2e
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Core: Add CP2 handling
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2023-05-18 18:04:41 +09:30 |
|
zilmar
|
3b8dfce64a
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Core: Convert DoBreakException to TriggerException
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2023-05-18 11:47:00 +09:30 |
|
zilmar
|
b2c2a03a2e
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Core: convert DoFloatingPointException to TriggerException
|
2023-05-18 11:41:20 +09:30 |
|
zilmar
|
0dfab78c88
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Core: Convert DoCopUnusableException to TriggerException
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2023-05-18 11:26:36 +09:30 |
|
zilmar
|
252f629e14
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Core: Convert DoIllegalInstructionException to TriggerException
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2023-05-18 11:13:22 +09:30 |
|
zilmar
|
59a1277bed
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Core: Convert GenerateOverflowException to TriggerException
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2023-05-18 11:05:27 +09:30 |
|
zilmar
|
69fd74ba56
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Core: Convert DoSysCallException to TriggerException
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2023-05-18 10:56:06 +09:30 |
|
zilmar
|
17df17805d
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Core: convert DoTrapException to TriggerException
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2023-05-18 10:49:58 +09:30 |
|
zilmar
|
74912ca8c2
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Core: handle jump to unaligned addresses
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2023-05-18 10:33:57 +09:30 |
|
zilmar
|
6e58edb076
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Core: Merge CheckFPUException into CheckFPUResult32
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2023-05-15 23:16:54 +09:30 |
|
zilmar
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62b29622ca
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Core: remove usage of fpclassify in CheckFPUInput32 and CheckFPUResult32
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2023-05-15 22:57:13 +09:30 |
|
zilmar
|
0ddeb6b981
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Core: remove exception out of R4300iOp::CheckFPUInput32
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2023-05-15 20:56:56 +09:30 |
|
zilmar
|
fdc637516f
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Core: remove Double_RoundToInteger64
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2023-05-09 13:05:58 +09:30 |
|
zilmar
|
5a23f48629
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Core: remove Double_RoundToInteger32
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2023-05-09 12:57:08 +09:30 |
|
zilmar
|
e5b1a9469a
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Core: remove Float_RoundToInteger64
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2023-05-09 12:50:23 +09:30 |
|
zilmar
|
2c19c2c362
|
Core: Handle CPO1 unimplemented op
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2023-05-09 11:28:59 +09:30 |
|
zilmar
|
85f4f147a1
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Core: Remove Float_RoundToInteger32
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2023-05-09 09:40:10 +09:30 |
|
zilmar
|
49a385e743
|
Core: Split CheckFPUException into CheckFPUException and CheckFPUInvalidException
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2023-05-09 08:06:15 +09:30 |
|
zilmar
|
5cfb80fcfc
|
Core: Improve R4300iOp::COP1_S_CVT_W
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2023-04-24 19:02:00 +09:30 |
|
zilmar
|
71ef28fd55
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Core: Add R4300iOp::COP1_W_CVT_W
|
2023-04-24 18:55:06 +09:30 |
|
zilmar
|
ab8b004b71
|
Core: Add a setting for fpu reg caching
|
2023-04-17 18:47:33 +09:30 |
|
zilmar
|
cba01b2063
|
Core: Improve R4300iOp::COP1_L_CVT_D
|
2023-04-17 18:08:51 +09:30 |
|
zilmar
|
d9e69fee65
|
Core: Improve R4300iOp::COP1_D_CMP
|
2023-04-17 18:07:58 +09:30 |
|
zilmar
|
0cc6d21ad1
|
Core: Improve R4300iOp::COP1_S_CMP
|
2023-04-17 18:06:42 +09:30 |
|
zilmar
|
9297b1c4b8
|
Core: Improve COP1_S_CVT_D, COP1_W_CVT_D, COP1_D_CVT_S, COP1_W_CVT_S, COP1_L_CVT_S,
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2023-04-11 16:20:24 +09:30 |
|
zilmar
|
9a04293a67
|
Update arm/arm64 to use asmjit
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2023-04-05 10:16:21 +09:30 |
|
zilmar
|
2c40d47a34
|
Start to look at x64 recompiler
|
2023-04-04 17:44:42 +09:30 |
|
zilmar
|
422a42cae3
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Core: More work improve the accuracy of cop1
|
2023-03-28 13:12:59 +10:30 |
|
zilmar
|
ce69324dbe
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Core: Update R4300iOp::COP1_S_MUL to handle exceptions
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2023-03-21 10:49:49 +10:30 |
|
zilmar
|
cbf67cede4
|
Core: Update sub.d to handle exceptions
|
2023-03-20 17:17:31 +10:30 |
|
zilmar
|
9093b42d47
|
Core: improve the accuracy of COP1_S_SUB
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2023-03-06 20:58:47 +10:30 |
|
zilmar
|
306f21b5fa
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Core: Improve accuracy of add.d
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2023-03-06 18:28:32 +10:30 |
|
zilmar
|
1864adcb35
|
Core: improve the accuracy of COP1_S_ADD
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2023-02-21 14:54:22 +10:30 |
|
zilmar
|
3acd56ae61
|
Core Fix up clang formatting
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2023-02-14 08:05:40 +10:30 |
|
zilmar
|
e14e10f4b0
|
Core: Fix handling of R4300iOp::COP1_S_CMP and R4300iOp::COP1_D_CMP
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2023-02-13 16:22:50 +10:30 |
|
zilmar
|
a8a553b316
|
Core: fix code to make clang happy
|
2023-01-31 07:54:47 +10:30 |
|
zilmar
|
83a7d9e3f2
|
Core: Start to improve the accuracy of R4300iOp::COP1_S_ADD
|
2023-01-30 20:36:58 +10:30 |
|
zilmar
|
7affd514c0
|
Core: Convert TEST_COP1_USABLE_EXCEPTION from a macro to a function
|
2023-01-30 11:40:03 +10:30 |
|
zilmar
|
f802b18cdc
|
Core: Change to using fenv.h instead of including the code directly
|
2023-01-30 10:07:51 +10:30 |
|
zilmar
|
80aecdc5e3
|
Core: Improve R4300iOp::COP1_CT
|
2023-01-02 19:49:19 +10:30 |
|
zilmar
|
cbacddb65e
|
Core: Make 32bit CPU recompiler only setting
|
2022-12-19 09:07:26 +10:30 |
|
zilmar
|
6c154f6547
|
Core: Add Cop2/Cop3 handling exception
|
2022-12-12 21:29:16 +10:30 |
|
zilmar
|
c8bb04b6b0
|
Core: Mask COP1_CT reg 31
|
2022-12-12 19:04:03 +10:30 |
|
zilmar
|
b3c6858b69
|
Core: Change COP0 registers to use an enum
|
2022-11-07 09:24:58 +10:30 |
|
zilmar
|
fd71b2dfcb
|
Core: Handle branch/jump in a delay slot in the Interpreter
|
2022-11-01 08:59:15 +10:30 |
|
zilmar
|
65bbc375b9
|
Core: Fix R4300iOp::LWC1 to have 64bit address
|
2022-10-17 08:36:17 +10:30 |
|
zilmar
|
761a1ee52a
|
Code clean up
|
2022-10-10 10:52:17 +10:30 |
|
zilmar
|
179282043f
|
Project64: Code cleanup
|
2022-09-26 12:01:54 +09:30 |