Commit Graph

4107 Commits

Author SHA1 Message Date
Gregory Hainaut c2229e3c0b gsdx-ogl: add a texture offset uniform parameter to vertex shader
It would be used for a new implementation of the half pixel offset hack

Hopefully it doesn't badly impact the perf on low end iGPU
2016-11-29 17:22:02 +01:00
Gregory Hainaut f6cad2235b gsdx: defer GSScanlineConstantData init
Avoid AVX instruction in the middle

Issue #1677
2016-11-28 19:40:25 +01:00
Gregory Hainaut c9db1c6c4b vtune: plug PCSX2 core + add missing profiling (VU/VIF/TLB)
Doesn't fully work yet
* Unknown stack frame
* Outside any known module

Potential root cause:
* Nvidia driver
* VU code as ebp is required for emulation so likely no frame
2016-11-28 19:07:04 +01:00
Gregory Hainaut e4516ac9b8 cmake: add extra SSE4 and AVX2 build of GSdx when DISABLE_ADVANCE_SIMD is enabled
It will provide a speed boost on distribution that only enable SSE2
2016-11-25 16:35:40 +01:00
Gregory Hainaut 8431299b92 gsdx sw: port code to the new constant object 2016-11-24 23:03:26 +01:00
Gregory Hainaut 3b5bc9c38d gsdx sw: create a constant buffer
* Use POD type to avoid SSE/AVX compilation dependency
* global object to reduce cache miss
* dynamically object so give a chance to allocate below 2GB (allow x64
  optimization)
2016-11-24 23:03:26 +01:00
Gregory Hainaut 0f5529be18 gsdx sw: s/g_cpu/m_cpu/ 2016-11-24 23:03:25 +01:00
Gregory Hainaut c3e38e46c7 gsdx sw x64: disable mipmap support on AVX
Until it is implemented (might never happen)
2016-11-24 23:03:25 +01:00
Gregory Hainaut 608bb5ccb2 gsdx sw x64: add AVX2 implementation for VS
FS was copied from 32 bits (require massive update)
2016-11-24 23:03:25 +01:00
Gregory Hainaut 15220c386a gsdx sw x64: setup prim miss some optimizations 2016-11-24 23:03:25 +01:00
Gregory Hainaut e3bfa2be88 gsdx sw: factorize common draw scanline code
Ymm inherite from Xmm so it is useless to duplicate the code

Add a parameter to alltrue to test the good register
2016-11-24 23:03:25 +01:00
Gregory Hainaut 211c7745de gsdx: don't try to correct depth in primitive trace
Avoid to go above the maximum size allowed by the format

Issue #1674
2016-11-24 22:24:00 +01:00
FlatOutPS2 417d0a3606 GSdx Merge Circuit: Fix regressions
Fixes screen shaking in Tenchu: Wrath Of Heaven, and graphical issues in
NASCAR 09.
2016-11-23 22:14:44 +01:00
Jonathan Li 483b3d6368 cdvdgigaherz: Avoid holding lock during thread sleep
Fixes Coverity CID 127721: Program hangs

Change the sleep to a condition variable wait, which has the added
benefit of allowing the plugin to close ever so slightly faster if
there's no disc in the drive.
2016-11-22 21:26:41 +01:00
Jonathan Li 29c2ccb310 cdvdgigaherz: Use a queue to manage sector requests
Fixes a data race.

Also avoid copying from the cache when it's unnecessary to do so.
2016-11-22 21:26:41 +01:00
Jonathan Li 3919a32dc3 cdvdgigaherz: Avoid race condition by reading from cache/disk
Instead of reading from a buffer shared by multiple threads, just read
the correct data from the cache or disk instead.
2016-11-22 21:26:41 +01:00
Jonathan Li 31b0b53394 cdvdgigaherz: Read correct sector type in keepalive thread
It'll prevent errors messages when raw sector reading is used.
2016-11-22 21:26:41 +01:00
Jonathan Li a34942c882 cdvdgigaherz: Only update cache if the read succeeds 2016-11-22 21:26:41 +01:00
Jonathan Li bb25ce1c6a cdvdgigaherz: Add cache entry check function
Useful when you don't actually want the cached data.
2016-11-22 21:26:41 +01:00
Jonathan Li 23f48e07ed cdvdgigaherz: Change signs
Avoid some unnecessary casting.
2016-11-22 21:26:41 +01:00
Jonathan Li 008fea5d89 common|cdvdgigaherz: Fix API sign mismatch
The typedef and function declaration don't quite match.
2016-11-22 21:26:41 +01:00
Gregory Hainaut 0d275868a5 gsdx x64: quick fix for windows
Until we got a full implementation
2016-11-21 18:18:09 +01:00
Gregory Hainaut 37379d5d1d gsdx sw x64: shuffle memory allocation
tex address is a3
vm address is a1

Could help to avoid REX prefix
Reduce prologue/epilogue register copy

Byte code size 41893 => 38912 (on my testcase)
2016-11-20 20:19:13 +01:00
Gregory Hainaut b76305a0d2 gsdx sw x64: keep the copy of top in the stack for dthe
An extra stack access by pixel won't impact perf (only 16 bits game with dithering)
Allow to save 2 registers (a1/a3)
2016-11-20 20:19:13 +01:00
Gregory Hainaut 994274623b gsdx sw x64: use rip addressing on draw scan line
byte code 41997 => 41893

However it will allow to save 2 registers as future optimization
2016-11-20 20:19:12 +01:00
Gregory Hainaut 7c06e87d59 gsdx sw x64: use rip addressing on setup prim
byte code: 9017 => 8736

Save a register
2016-11-20 20:19:12 +01:00
Gregory Hainaut 923c297dfc gsdx sw: vinsert128 opcode require an XMM register
Reported as an error on lastest Xbyak
2016-11-20 20:19:12 +01:00
Gregory Hainaut e674518c4e Update from xbyak 4.84 to 5.11
* bin2hex.h is removed
* vptest/vpblendvb YMM support integrated upsteam
* better support of rip for 64 bits
* AVX512 support (only miss the CPU now)

Local change: add BSD3 clause
2016-11-20 13:21:11 +01:00
Gregory Hainaut 681c09f25c gsdx sw: catch xbyak exception 2016-11-20 12:58:07 +01:00
Gregory Hainaut 0fd5346860 gsdx x64 linux: only mmap in lower 2GB code segment
Allow to use rip addressing
2016-11-20 10:38:15 +01:00
Gregory Hainaut 2252ba1bb7 gsdx: add the detected ISA on the name
As a SSE build could potentially uses AVX operations.
2016-11-20 10:38:15 +01:00
Jonathan Li ef25502491 gsdx build: don't exclude AVX files.
Thanks for the patch :)
2016-11-19 17:01:36 +01:00
Gregory Hainaut cc6d193e1d gsdx: Relax SSE/AVX constraint on 64 bits
The JIT will automatically select the best ISA (only AVX1 so far)
2016-11-19 17:01:29 +01:00
Gregory Hainaut 8fd46e96aa gsdx sw JIT: dynamically select ISA for SetupPrim 2016-11-19 17:00:33 +01:00
Gregory Hainaut 574a2c774e gsdx sw JIT: dynamically select between AVX1 and SSE code path (scanline) 2016-11-19 17:00:33 +01:00
Gregory Hainaut 6b78b8f9ce gsdx sw JIT: dynamically select SSE41 at runtime even on SSE2 build (scanline)
It won't give the full SSE41 speed boost but it is better than nothing
2016-11-19 17:00:33 +01:00
Gregory Hainaut 322473c295 gsdx sw: add a code example for gather instruction
It will requires a generic (register naming) linear interpolation to use it properly
Gather instruction requires an extra mask register therefore all registers name will be shuffled

Perf wise, initial haswell implementation seems to be microcode emulated.
2016-11-19 17:00:33 +01:00
Gregory Hainaut 2e20693583 gsdx sw x64: restore read texel optimization 2016-11-19 17:00:33 +01:00
Gregory Hainaut e728a14c19 gsdx sw: factorize color split in split16_2x8 2016-11-19 17:00:33 +01:00
Gregory Hainaut d58e43edbf gsdx linux: plug vtune as Windows 2016-11-19 17:00:32 +01:00
Gregory Hainaut 8abf242e2c gsdx: small x64 printf warning fixes 2016-11-19 17:00:32 +01:00
Gregory Hainaut 051c5c4bf7 gsdx sw x64: small stack optimization on linux
mov with the stack pointer require less bytecode
2016-11-19 17:00:32 +01:00
Gregory Hainaut 141c9e9c86 gsdx sw x64: prefer faster 32 bits operation when possible 2016-11-19 17:00:32 +01:00
Gregory Hainaut a281bda9a6 gsdx sw x64: port the scanline generator on AVX
Based on Gabest's work.

* Miss mipmap

Note: dithering info
It is a bit tricky as a2 on linux was rdx register which overlap with fzm (dh/dl)
It might require dedicated windows code
2016-11-19 17:00:32 +01:00
Gregory Hainaut 8e29e09943 gsdx sw x64: update setup prim generator x64 SSE&AVX 2016-11-19 17:00:32 +01:00
Gregory Hainaut 4a47224ac1 gsdx: define the linux x64 ABI 2016-11-19 17:00:32 +01:00
Gregory Hainaut e31ce87bb3 gsdx: SW JIT debug helper
Allow to compare 32/64 bits (and all ISAs too)
Allow to breakpoint (int3)
Print selector info
Print size of buffer and start (disabled by default)
2016-11-19 17:00:32 +01:00
Gregory Hainaut 633f7a1db9 xbyak: add int3 instruction
Very useful to stop the JIT
2016-11-19 17:00:32 +01:00
Gregory Hainaut 43b4cfc215 gsdx: separate dump directory for 32/64 bits 2016-11-19 17:00:32 +01:00
Gregory Hainaut 82d12691e1 gsdx: properly check SSE support
1/ Check all "levels"
2/ requires AVX for 64 bits
2016-11-19 17:00:32 +01:00