598ea65c16
Android: use boolean prefs when possible. OSX build fix
...
Use jboolean instead of jint
Fix crash when navigating UI with popup keyboard's next button
Remove unused UI (PVR rendering)
OSX fixes
2019-02-06 22:28:04 +01:00
1802c022fd
UI with ImGui
2019-02-06 19:57:13 +01:00
78fd92f95a
No custom textures if no threads
2019-02-06 18:50:56 +01:00
a9b62164c5
No network if no threads
2019-02-06 18:42:45 +01:00
a7a5618442
evdev: too much logging
2019-02-06 15:00:40 +01:00
13daefca41
Fix Naomi/Atomiswave builds
2019-02-04 11:23:26 +01:00
91fb92264d
x64 dynarec: do not use RSQRTSS as it lacks precision
...
RSQRTSS error is:
|Relative Error| <= 1.5 ∗ 2^-12
whereas SH4's FSRRA abs error is <= 2^-21
Fixes loop issues is Sonic Adventure 1 and 2
Issue #1489
2019-02-04 10:48:22 +01:00
51c77b248b
Enable RTT to vram for Skies of Arcadia
2019-02-03 18:11:04 +01:00
4b78e24753
allocate mem based on state file size instead of current state size
2019-02-03 17:56:43 +01:00
1a2eeef849
Load libretro savestates (dreamcast only)
2019-02-03 17:54:11 +01:00
2ff6d1b819
Fix render to texture buffer alpha channel for 1555
...
Saturate alpha when strictly greater than threshold, not >=
Don't put rendered texture in cache if rendering to texture buffer
(VRAM)
Fixes Skies of Arcadia start menu
Restore VRAM lock if null
2019-02-03 17:53:02 +01:00
19bddc942a
android: add cue files to string res
2019-02-03 14:04:54 +01:00
d567ae67f7
redump.org cuesheet support
2019-02-03 13:48:55 +01:00
63c4a16459
preliminary support for CUE files
2019-01-30 18:28:49 +01:00
90ad16317f
arm64 dsp: fix stack order
2019-01-25 15:38:55 +01:00
fca6f3cecb
dsp arm64: fix crash when VIXL_DEBUG is off
2019-01-24 21:47:55 +01:00
08473d765a
android build fix
2019-01-24 09:58:13 +01:00
91cfd4b2f7
Reserve and allocate maximum RAM/VRAM/ARAM in all cases
...
Reserve enough virtual memory space for DC and Naomi
Allocate dynarec entry point tables for max possible ram
Free mem and release vmem on exit
2019-01-24 09:48:58 +01:00
0cce6cc5a5
Clean up and comments. No functional change
2019-01-24 09:40:14 +01:00
1501e2273d
Don't enable the dsp interpreter if using the dynarec
2019-01-23 22:59:00 +01:00
8c7f9105a1
dsp dynarec: missing commit
2019-01-23 22:46:05 +01:00
3a064cd068
DSP dynarec for arm64
2019-01-23 21:14:51 +01:00
91b76f0c16
arm64 dynarec: missing edits
2019-01-22 18:40:36 +01:00
75a04d6d28
arm64 dynarec: implement tail calling and block linking
2019-01-22 18:37:04 +01:00
eb37dacadb
x64: disable the use of AVX instructions because of rounding issues
2019-01-22 16:17:25 +01:00
9f3f13eef1
aica arm dynarec for arm64
2019-01-21 13:08:53 +01:00
a3682e7b22
arm64 dynarec: revert to non-explode spans and minor optimizations
...
Added some profiling
2019-01-21 12:54:29 +01:00
da07d88b03
No need to save the RTC value anymore
2019-01-19 16:49:00 +01:00
cd4e4cbdc9
x64 dynarec: check if extension is supported by cpu. seh on win32
...
Check if FMA/AVX/SSE3 is supported before using it
fully naked main loop in win32 with proper seh directives
win32: more xmm regs to allocate and no need to save them when calling
out
2019-01-18 17:02:50 +01:00
573f285f3b
arm64 dynarec: save x29 and x30 in ngen_mainloop prologue
2019-01-18 00:06:33 +01:00
ed3f866835
win32 build fix
2019-01-16 17:42:36 +01:00
f852480b88
OSX: build fix
2019-01-16 14:44:40 +01:00
05d7cf2c72
x64 dynarec: implement immediate address ram read. OSX fix
2019-01-16 13:39:52 +01:00
cb8e81d473
arm64: direct memory access and jit rewrite
...
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
2019-01-16 13:04:16 +01:00
c2a048e8d8
arm64: use explode_spans to allocate regs for V2 and F64 params
2019-01-15 08:47:07 +01:00
e241613b8f
x64 dynarec: implemented swaplb, fipr, ftrv, frswap and other fixes
...
native implementations for swaplb, fipr, ftrv and frswap
use explode_spans to map 2V and F64 to registers
save xmm registers when calling subroutine
2019-01-14 21:15:36 +01:00
b465f744ba
dynarec: flush fpu regs before FTRV
...
fixes issue with tokyo xtreme racer (x64)
might need to flush before other ops
2019-01-13 23:21:58 +01:00
31163b8d7e
x64 dynarec: various fixes and optimizations
...
implemented fsca
fixed fsetgt and cvtf2i
2019-01-13 12:27:02 +01:00
523b110412
arm64: dynarec fixes
2019-01-13 11:32:28 +01:00
a2cd9d7af1
x64 dynarec: use register alloc spans, implement native opcodes
2019-01-12 23:48:48 +01:00
fc05727538
dynarecs clean-up
...
move GetRegPtr and ngen_FailedToFindBlock to sh4/dyna
2019-01-11 23:52:20 +01:00
e5ee48efa9
arm64: implement swaplb and pref. Various optimizations
2019-01-11 15:58:48 +01:00
ec7787c56a
vixl: enable debug log on android
2019-01-11 15:57:37 +01:00
0f026552c9
fix comments
2019-01-11 15:54:03 +01:00
1c80207879
arm64: implement ftrv and frswap
2019-01-10 21:22:53 +01:00
18a16f83ac
arm64: more native opcodes implemented
2019-01-10 18:58:29 +01:00
a9a2aad8f6
arm64: use register spans allocation. Implement some opcodes natively
2019-01-09 16:35:23 +01:00
3d8b01c515
arm64: Use x28 as sh4 regs base pointer. Reg cache to avoid fetches.
...
Block check optimization
2019-01-08 13:29:08 +01:00
67a4eb8f1f
arm64 dynarec using vixl
2019-01-07 21:50:46 +01:00
bed7a83b77
Check CDI version to avoid loading any crap as a CDI image and crashing
...
Less console spam, better error reporting
2019-01-02 16:43:36 +01:00
Flyinghead