Connor McLaughlin
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4d38213f23
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GPU: Implement VRAM-to-VRAM copies
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2019-09-18 00:58:30 +10:00 |
|
Connor McLaughlin
|
ff83f15abe
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dep: Add missing file
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2019-09-18 00:30:26 +10:00 |
|
Connor McLaughlin
|
0a8bce8936
|
GPU: Hook up vblank interrupt
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2019-09-18 00:22:41 +10:00 |
|
Connor McLaughlin
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a84b3d7a2b
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CPU: Fix interrupts in branch delay slots messing up PC
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2019-09-18 00:22:17 +10:00 |
|
Connor McLaughlin
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4025d6e4a6
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GTE: Stub and register read/write function
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2019-09-17 23:38:04 +10:00 |
|
Connor McLaughlin
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6df8d42480
|
CDROM: Add missing fields to save state
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2019-09-17 23:04:00 +10:00 |
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Connor McLaughlin
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e3c6035152
|
CDROM: Implement get version and getstat commands
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2019-09-17 22:18:58 +10:00 |
|
Connor McLaughlin
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b951f27381
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CDROM: Stub implementation
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2019-09-17 21:07:56 +10:00 |
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Connor McLaughlin
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a0e7dff37c
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common: Add a FIFOQueue helper class
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2019-09-17 19:22:23 +10:00 |
|
Connor McLaughlin
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2128a2984b
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Add interrupt controller emulation
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2019-09-17 16:26:00 +10:00 |
|
Connor McLaughlin
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c615e007c0
|
GPU: Serialization for CRTC state
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2019-09-17 14:40:23 +10:00 |
|
Connor McLaughlin
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f47688b61f
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System: Basic timings for GPU scanout
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2019-09-17 14:25:25 +10:00 |
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Connor McLaughlin
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9475c281bd
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Build: Set /MP on projects which are missing it
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2019-09-17 14:25:17 +10:00 |
|
Connor McLaughlin
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540f282213
|
CPU: Fix incorrect exception vector for break
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2019-09-15 12:43:54 +10:00 |
|
Connor McLaughlin
|
5babc076f5
|
Bitfield: Fix incorrect shift in operator<<=
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2019-09-15 12:42:43 +10:00 |
|
Connor McLaughlin
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d58dbe04c0
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CPU: Fix load delay register reads for same register in delay slot
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2019-09-15 12:16:51 +10:00 |
|
Connor McLaughlin
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1bb794dd39
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GPU: Use max vertex count based on buffer size
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2019-09-15 01:18:58 +10:00 |
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Connor McLaughlin
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a58b687352
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GPU: Cap batch sizes at 1024 vertices, flush if exceeded
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2019-09-15 01:13:23 +10:00 |
|
Connor McLaughlin
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4ca3b4b570
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CPU: Fix alignment exception on register indirect branch
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2019-09-15 01:13:11 +10:00 |
|
Connor McLaughlin
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bea727bbe4
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CPU: Fix BGEZAL with rs == ra
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2019-09-15 01:02:35 +10:00 |
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Connor McLaughlin
|
273f010d17
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GPU: Use degenerate triangles to split strips and batch them
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2019-09-15 00:17:43 +10:00 |
|
Connor McLaughlin
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1c8e326624
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GPU: Fix off-by-one in rectangle rendering
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2019-09-14 23:50:34 +10:00 |
|
Connor McLaughlin
|
77b15d156d
|
System: Periodically flush GPU
Needs real timings...
|
2019-09-14 23:50:24 +10:00 |
|
Connor McLaughlin
|
03bd135060
|
SDL: Make GL debug output less noisy in Release
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2019-09-14 23:49:21 +10:00 |
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Connor McLaughlin
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b5d51f47cd
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GPU: Use texel fetch for creating page textures
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2019-09-14 23:48:32 +10:00 |
|
Connor McLaughlin
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19d9322e67
|
GPU: Fix texture coordinates when rendering paletted textures
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2019-09-14 23:05:10 +10:00 |
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Connor McLaughlin
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e40393fec4
|
GPU: Use scissor test for drawing area
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2019-09-14 21:54:58 +10:00 |
|
Connor McLaughlin
|
3d6b8e485e
|
Interface: Support loading filenames on command line
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2019-09-14 21:54:46 +10:00 |
|
Connor McLaughlin
|
363d62e5c1
|
GPU: Various HW renderer fixes
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2019-09-14 21:34:55 +10:00 |
|
Connor McLaughlin
|
d94d608ad7
|
GPU: Implment actual data copy of VRAM->CPU readbacks
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2019-09-14 20:48:15 +10:00 |
|
Connor McLaughlin
|
f6ef3f7ba6
|
GPU: Saving/loading of VRAM
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2019-09-14 20:45:26 +10:00 |
|
Connor McLaughlin
|
2560efbebd
|
Save state support
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2019-09-14 20:28:47 +10:00 |
|
Connor McLaughlin
|
851ef67814
|
GPU: Implement fill VRAM command
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2019-09-14 16:43:53 +10:00 |
|
Connor McLaughlin
|
46870c6a7a
|
GPU: Implement basic rectangle rendering
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2019-09-14 16:27:24 +10:00 |
|
Connor McLaughlin
|
f47d44c151
|
CPU: Implement break instruction
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2019-09-14 14:41:41 +10:00 |
|
Connor McLaughlin
|
32a36ef1bc
|
CPU: Implement alignment (memory) exception
|
2019-09-14 14:29:23 +10:00 |
|
Connor McLaughlin
|
0726095f00
|
CPU: Implement fixed dcache/scratchpad
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2019-09-14 14:18:42 +10:00 |
|
Connor McLaughlin
|
ced3038e73
|
CPU: Implement sub instruction
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2019-09-14 13:39:36 +10:00 |
|
Connor McLaughlin
|
1afa02d475
|
CPU: Fix overflowed register written back in add instruction
|
2019-09-14 13:33:29 +10:00 |
|
Connor McLaughlin
|
459db392e7
|
CPU: Add missing cop0 register reads
|
2019-09-14 13:31:44 +10:00 |
|
Connor McLaughlin
|
9f36384752
|
System: Support sideloading EXE files via BIOS patch
|
2019-09-14 13:22:34 +10:00 |
|
Connor McLaughlin
|
ae43cc838b
|
GPU: Partially implemented texture support
|
2019-09-14 02:07:31 +10:00 |
|
Connor McLaughlin
|
cfe361c1a6
|
GPU: Basic/hacky CPU->VRAM transfers
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2019-09-13 01:10:08 +10:00 |
|
Connor McLaughlin
|
52b619facc
|
DMA: Implement block transfers
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2019-09-13 01:09:44 +10:00 |
|
Connor McLaughlin
|
aea7a18ac2
|
GPU: More work on OpenGL renderer
|
2019-09-13 01:09:07 +10:00 |
|
Connor McLaughlin
|
4706a906d5
|
GPU: Base work for hardware renderer
|
2019-09-12 12:53:04 +10:00 |
|
Connor McLaughlin
|
c0853de6a6
|
GPU: Partial render polygon command processing
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2019-09-11 16:04:31 +10:00 |
|
Connor McLaughlin
|
162f94337e
|
DMA: Implement linked list mode
|
2019-09-11 15:02:22 +10:00 |
|
Connor McLaughlin
|
27913cd20a
|
Partial implementation of DMA controller and GPU stubs
|
2019-09-11 14:01:19 +10:00 |
|
Connor McLaughlin
|
2149ab4d69
|
Initial commit
|
2019-09-11 14:00:42 +10:00 |