Triang3l
12ff951972
[Base] More flexible Xenos float16 conversion functions
2022-04-26 22:35:37 +03:00
Joel Linn
e3dd873892
[Base] Fix wait for callback return
...
- If wait item has disarmed itself and is then disarmed by another
thread, still wait for the callback to return to meet guaratees
2022-04-26 13:56:11 -05:00
Joel Linn
3b4dc7da3b
[Base] Use disruptorplus spin wait
...
- Attempt to fix deadlocks when using valgrind on CI
2022-04-26 13:56:11 -05:00
Joel Linn
e59a0e1206
[Base] Relax some timing constraints.
...
- Because setting the timer is scheduled by us but the wait on POSIX is
currently scheduled by pthreads, this solves issues on overprovisioned
CIs
2022-04-26 13:56:11 -05:00
Joel Linn
bc25e77e20
Update catch
2022-04-26 13:56:11 -05:00
Joel Linn
4a36a7962c
[Base] Remove unneeded delay scheduler
2022-04-26 13:56:11 -05:00
Joel Linn
15950eec37
[Base] Use chrono APIs for Timers
2022-04-26 13:56:11 -05:00
Joel Linn
1478be14c7
[Base] Add chrono tests
2022-04-26 13:56:11 -05:00
Joel Linn
23eef94984
[Base] Add chrono support
...
- WinSystemClock is a FILETIME clock without scaling, can convert to
system_time
- XSystemClock is a FILTETIME clock with scaling applied, can only
convert to WinSystemClock
2022-04-26 13:56:11 -05:00
Joel Linn
9b4168cce9
[Base] Make HighResolutionTimer platform agnostic
2022-04-26 13:56:11 -05:00
Joel Linn
75357caeaf
[Base] Add TimerQueue
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- Cross platform functionality similar to Windows' `CreateTimerQueue`
with `WT_EXECUTEINTIMERTHREAD`
2022-04-26 13:56:11 -05:00
Joel Linn
a85fc25040
[Base] Add more tests for HighResolutionTimer
2022-04-26 13:56:11 -05:00
Joel Linn
dbbcd46711
Update date
2022-04-26 13:56:11 -05:00
Joel Linn
d5de8f3394
Update disruptorplus
2022-04-26 13:56:11 -05:00
Wunkolo
be8b9c512f
[x64] Add GFNI optimization for SPLAT(int8)
...
`pxor` is a zero-uop register-rename and `gf2p8affineqb dest, zero, int8`
is a very quick single-instruction way to use affine galois
transformations to fill a register with an immediate byte without
touching memory.
2022-04-26 13:46:46 -05:00
Gliniak
3a115ae6a0
[Kernel] Restored usage of: log_string_format_kernel_calls
2022-04-14 13:48:24 -05:00
Triang3l
ef8a60e011
[GPU] Round tessellation patch vertex count up (by @deaklajos #2007 )
...
Also move the clamping of the guest index count to the index buffer size to the place before it's read in calculations
2022-04-14 21:19:12 +03:00
Triang3l
38aca269e1
[GPU] Offset and clamp tessellation patch index ( #2008 , thanks @deaklajos)
2022-04-14 13:04:34 +03:00
Triang3l
fea430f1f9
[GPU] Fix scalar c[#+aL], shader docs/refactoring
2022-04-13 23:08:19 +03:00
Triang3l
1f324bebcd
[GPU] Norm16 > float16 texture load shaders
2022-04-09 23:34:50 +03:00
Triang3l
744767f549
[D3D12] Compile all built-in shaders with the same FXC version
2022-04-09 23:24:28 +03:00
Triang3l
72f3eead63
[GPU] Texture load shader style (alignment) cleanup
2022-04-09 23:23:54 +03:00
Alex Messier
53320d7ef2
Add descriptive error message when pkg-config fails
...
The pkg_config helper for premake was not checking for errors. When it
failed to run, either when it is not installed or the queried package is
not found, a cryptic error message would be printed:
"Error: .../xenia/third_party/premake-core/src/base/string.lua:36: attempt to index a nil value (upvalue 's')"
Fix this by checking the return status when calling pkg-config and
printing a descriptive error message.
2022-04-05 00:11:54 -05:00
DESKTOP-F0UGBP9\deakl
8d02c5ab21
[GPU] Fixed size 0 point sprites enlarged to default
2022-04-05 02:25:24 +03:00
Triang3l
47799163bd
Merge branch 'master' into vulkan
2022-04-04 22:02:46 +03:00
Triang3l
3d48fde5ca
[GPU] XeSL texture load shaders + minor XeSL cleanup
2022-04-04 21:48:27 +03:00
Triang3l
0acb97d383
[Vulkan] EDRAM range ownership transfers, resolve clears, 2x-as-4x MSAA
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Transfers are functional on a D3D12-like level, but need additional work so fallbacks are used when multisampled integer sampled images are not supported, and to eliminate transfers between render targets within Vulkan format compatibility classes by using different views directly.
2022-04-03 16:40:29 +03:00
Triang3l
85fc7036b8
Merge branch 'master' into vulkan
2022-04-02 22:45:23 +03:00
Triang3l
c4eae232f1
[D3D12] Fixes/cleanup for render targets and barriers
2022-04-02 22:44:10 +03:00
Triang3l
1131dff705
Merge branch 'master' into vulkan
2022-03-28 21:58:34 +03:00
Triang3l
0f3207d019
[Vulkan] Fix basePipelineIndex signedness
2022-03-28 21:57:44 +03:00
Triang3l
52d61fc94c
Merge branch 'master' into vulkan
2022-03-27 16:20:21 +03:00
Triang3l
3a07559df9
[GPU] XeSL host depth store and VS passthrough shaders
2022-03-27 16:15:53 +03:00
Triang3l
328aa11283
Merge branch 'master' into vulkan
2022-03-27 00:11:45 +03:00
Triang3l
2cd6c31998
[Vulkan] Samplerless texelFetch
2022-03-27 00:09:44 +03:00
Gliniak
67a0ccb7c0
[CPU] Unified assertions for unimplemented opcodes
2022-03-23 11:41:49 -05:00
Margen67
6142013ee8
Mention VS2022 bug in BUILDING.md
2022-03-23 11:41:10 -05:00
Triang3l
7048baaf21
Merge branch 'master' into vulkan
2022-03-22 21:54:34 +03:00
Triang3l
fa62d395fd
[Vulkan] InitializeSubresourceRange: Use return, not reference
2022-03-22 21:51:02 +03:00
Triang3l
32ab1a2df1
[D3D12] Minor RT code style/comments cleanup
2022-03-22 21:48:26 +03:00
Triang3l
ee8e71cea8
[D3D12] RT dump: Fix r# allocation
2022-03-22 21:41:44 +03:00
Triang3l
920704c71a
[D3D12] RT transfer: Same front/back stencil ops
2022-03-22 21:39:06 +03:00
Triang3l
1259c9f7a2
[Vulkan] Pipeline barrier merging
2022-03-21 23:02:51 +03:00
Triang3l
acc4fd6846
[Vulkan] Rectangle list geometry shader
2022-03-21 22:53:19 +03:00
Triang3l
c47b874a4d
Merge branch 'master' into vulkan
2022-03-21 20:57:02 +03:00
Triang3l
82c1fb87aa
[App] Do all fullscreen entry logic for --fullscreen=true ( fixes #1999 )
2022-03-14 20:42:52 +03:00
Wunkolo
c1de37f381
[x64] Remove usage of `xbyak_bin2hex.h`
...
C++ has had binary-literals since C++14. There is no need for these
binary enum values from xbyak.
2022-03-08 12:18:58 -06:00
Wunkolo
f356cf5df8
[x64] Add `VECTOR_ROTATE_LEFT_I32` overflow-test
...
Edit one of the lanes in this unit-test to be larger than the width of
the element-size to ensure that this case is handled correctly.
It should only mask the lower `log2(32)=5` bits of the input, causing
`33`(`100001`) to be `1`(`000001`).
2022-03-08 12:18:58 -06:00
Wunkolo
337f0b2948
[x64] Add AVX512 optimization for `VECTOR_ROTATE_LEFT(Int32)`
...
`vprolvd` is an almost 1:1 analog with this opcode and can be
conditionally emitted when the host supports AVX512{F,VL}.
Altivec docs say that `vrl{bhw}` masks the lower log2(n) bits of the
element-size.
[vprold](https://www.felixcloutier.com/x86/vprold:vprolvd:vprolq:vprolvq )
modulos the shift-value by the element size in bits, which is the same
as masking the lower log2(n) bits. So `vrlw` maps exactly to `vprold`.
2022-03-08 12:18:58 -06:00
Joel Linn
7e894d10a7
[kernel] Correct status for looked up objects
...
- The guest will check for 0x40000000 and replace it with
0xb7 (ERROR_ALREADY_EXISTS), which is the correct return value.
For example, see:
https://docs.microsoft.com/en-us/windows/win32/api/synchapi/nf-synchapi-createmutexa
2022-03-08 12:17:57 -06:00