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118 Commits

Author SHA1 Message Date
Richard Henderson ebbbec9216 target/sparc: Use tcg_gen_qemu_{ld,st}_i128 for GET_ASI_DTWINX 
Perform one atomic 16-byte operation.
The atomicity is required for the LDTXA instructions.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson c03a0fd15c target/sparc: Split out ldst functions with asi pre-computed 
As an intermediate step in decodetree conversion, create
new functions passing in DisasASI and not insn.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson a76779ee3b target/sparc: Drop ifdef around get_asi and friends 
Mark some of the functions as unused, temporarily.
Fix up some tl vs i64 issues revealed in the process.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 811cc0b0ce target/sparc: Split out resolve_asi 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 8f75b8a4eb target/sparc: Move DONE, RETRY to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson d382580031 target/sparc: Move FLUSH, SAVE, RESTORE to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 86b82fe021 target/sparc: Move JMPL, RETT, RETURN to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson d3c7e8ad74 target/sparc: Convert remaining v8 coproc insns to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 9c6ec5bcad target/sparc: Move POPC to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson fb4ed7aad4 target/sparc: Move MOVcc, MOVR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 5fc546ee35 target/sparc: Move SLL, SRL, SRA to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson a9aba13dae target/sparc: Move TADD, TSUB, MULS to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson c26368532d target/sparc: Move UDIV, SDIV to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 4ee85ea94b target/sparc: Move UDIVX, SDIVX to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson dfebb950da target/sparc: Move SUBC to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson b5372650e2 target/sparc: Move UMUL, SMUL to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 22188d7da8 target/sparc: Move MULX to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 420a187d80 target/sparc: Move ADDC to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 428881deba target/sparc: Move basic arithmetic to decodetree 
Move ADD, AND, OR, XOR, SUB, ANDN, ORN, XORN.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 2da789ded5 target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver 
Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 577efa4557 target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr 
Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson cd6269f7c9 target/sparc: Remove cpu_wim 
Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson bb97f2f5d7 target/sparc: Move WRTBR, WRHPR to decodetree 
Implement htstate in the obvious way.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 9422278ef8 target/sparc: Move WRWIM, WRPR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 25524734c6 target/sparc: Move WRPSR, SAVED, RESTORED to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 0faef01b39 target/sparc: Move WRASR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson e8325dc02d target/sparc: Move RDTBR, FLUSHW to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 5d617bfba0 target/sparc: Move RDWIM, RDPR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 668bb9b755 target/sparc: Move RDPSR, RDHPR to decodetree 
Implement htstate in the obvious way.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/847
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson af25071c1d target/sparc: Move RDASR, STBAR, MEMBAR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 3037663616 target/sparc: Move Tcc to decodetree 
Use the new delay_exceptionv function in the implementation.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 6d2a076842 target/sparc: Move SETHI to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 9d4e2bc761 target/sparc: Pass DisasCompare to advance_jump_cond 
Fold the condition into the branch or movcond when possible.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson 6b3e4cc685 target/sparc: Merge gen_branch_[an] with only caller 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson d547193616 target/sparc: Merge gen_fcond with only caller 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 1ea9c62a5e target/sparc: Merge gen_cond with only caller 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 45196ea4f4 target/sparc: Move FBPfcc and FBfcc to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson ab9ffe988a target/sparc: Move BPr to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 276567aaf6 target/sparc: Move BPcc and Bicc to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 23ada1b16f target/sparc: Move CALL to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson b1bc09ea6b target/sparc: Define AM_CHECK for sparc32 
Define as false, which allows some ifdef removal.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 878cc6773a target/sparc: Add decodetree infrastructure 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 5f25b383a8 target/sparc: Remove sparcv7 cpu features 
The oldest supported cpu is the microsparc 1; all other cpus
use CPU_DEFAULT_FEATURES.  Remove the features that must always
be present for sparcv7: FLOAT, SWAP, FLUSH, FSQRT, FMUL.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 186e78905a target/sparc: Implement check_align inline 
Emit the exception at the end of the translation block,
so that the non-exception case can fall through.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson 930f1865cc target/sparc: Clear may_lookup for npc == DYNAMIC_PC 
With pairs of jmp+rett, pc == DYNAMIC_PC_LOOKUP and
npc == DYNAMIC_PC.  Make sure that we exit for interrupts.

Cc: qemu-stable@nongnu.org
Fixes: 633c42834c ("target/sparc: Introduce DYNAMIC_PC_LOOKUP")
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson b77af26e97 accel/tcg: Replace CPUState.env_ptr with cpu_env() 
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-04 11:03:54 -07:00
Richard Henderson ad75a51e84 tcg: Rename cpu_env to tcg_env 
Allow the name 'cpu_env' to be used for something else.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-03 08:01:02 -07:00
Philippe Mathieu-Daudé 026ad97e07 target/translate: Remove unnecessary 'exec/cpu_ldst.h' header 
All these files only access the translator_ld/st API declared
in "exec/translator.h". The CPU ld/st API from declared in
"exec/cpu_ldst.h" is not used, remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230828221314.18435-5-philmd@linaro.org>
 2023-08-31 19:47:43 +02:00
Richard Henderson e3ebbade58 target/sparc: Use tcg_gen_movcond_i64 in gen_edge 
The setcond + neg + or sequence is a complex method of
performing a conditional move.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-08-24 11:22:42 -07:00
Richard Henderson 44a7c2ecd4 target/sparc: Use tcg_gen_lookup_and_goto_ptr for v9 WRASI 
We incorporate %asi into tb->flags so that we may generate
inline code for the many ASIs for which it is easy to do so.
Setting %asi is common for e.g. memcpy and memset performing
block copy and clear, so it is worth noticing this case.

We must end the TB but do not need to return to the main loop.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230628071202.230991-9-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
 2023-06-28 10:53:57 +01:00