Commit Graph

6421 Commits

Author SHA1 Message Date
zilmar 9e73771815 Core: Use the new COP1_S_CVT in COP1_D_ROUND_L, COP1_D_TRUNC_L, COP1_D_CEIL_L, COP1_D_FLOOR_L 2024-04-18 16:51:53 +09:30
zilmar fe87142657 Core: CX86RecompilerOps::COP1_S_CMP should allocate eax before calling CompileInitFpuOperation 2024-04-18 16:42:48 +09:30
zilmar 4071b52810 Core: CX86RegInfo::UnMap_X86reg should fail on a protected register 2024-04-18 16:41:03 +09:30
zilmar 79f7aa9927 Core: CX86RegInfo::UnMap_FPStatusReg should unprotect register before trying to free it 2024-04-18 16:34:49 +09:30
zilmar 0cf4c7dc11 Core: get COP1_D_CMP to work in recompiler 2024-04-11 18:14:44 +09:30
zilmar 9272ac05f6 Core: refactor S opcodes to one central function 2024-04-11 18:09:30 +09:30
zilmar e7178dbdec Core: Fix CX86RecompilerOps::COP1_D_CVT_S 2024-03-28 20:05:27 +10:30
zilmar 8bb2445263 Core: Have CX86RecompilerOps::CompileCheckFPUResult32 write to the high word 2024-03-28 20:02:24 +10:30
François Berder 560c49ba2d
Core: Fix N64 disk IPL load address check (#2401)
The IPL load address check always evaluated to false due
to a wrong operator.

Signed-off-by: Francois Berder <fberder@outlook.fr>
2024-03-21 17:52:09 +10:30
zilmar 45fb2ad965 Core: In X86RecompilerOps::CompileCheckFPUResult64 make sure RegPointer is protected 2024-03-21 17:44:53 +10:30
zilmar 2811b63ff0 Core: Update CX86RecompilerOps::COP1_D_CVT_S and CX86RecompilerOps::COP1_D_CVT_W 2024-03-21 17:41:29 +10:30
zilmar 33d2722841 Core: fix up CX86RecompilerOps::COP1_D_FLOOR_W 2024-03-21 17:40:14 +10:30
zilmar 9a9c2e5439 Core: Update CX86RecompilerOps::COP1_D_CEIL_W 2024-03-21 17:32:12 +10:30
zilmar 401efae0d9 Core: fix up CX86RecompilerOps::COP1_D_ROUND_W 2024-03-21 17:28:16 +10:30
zilmar 772a20f07d Core: Update CX86RecompilerOps::COP1_D_SQRT 2024-03-21 17:15:10 +10:30
zilmar 87c732b65d Core: update CX86RecompilerOps::COP1_D_NEG 2024-03-21 17:14:00 +10:30
zilmar ece5e30a80 Core: create a function to handle .d recompiler opcodes that use fd and fs 2024-03-21 17:13:16 +10:30
zilmar 5133d47502 Core: Make the FPU double ops to be modularized so it is a simple function call for an opcode 2024-03-14 18:12:58 +10:30
Hugo Carvalho 10b41dfef0
Update Portuguese translation (#2412) 2024-03-07 21:13:58 +10:30
zilmar 98b1bddc64 Core: Get COP1_D_ADD, COP1_D_SUB, COP1_D_DIV, COP1_D_ABS, COP1_D_SQRT 2024-03-07 21:12:57 +10:30
zilmar 97ec1f533b Core: Make sure precision is set to 53bit 2024-03-07 20:52:24 +10:30
zilmar 290040d945 Merge branch 'develop' of https://github.com/project64/project64 into develop 2024-02-29 16:07:32 +10:30
zilmar 190c408019 Core: Fix clang formatting in x86/x86RecompilerOps.cpp 2024-02-29 16:06:56 +10:30
Derek "Turtle" Roe 565d45de8a
Update minimum requirements for Project64 (#2409)
* Fix typo in support window

* Fix the typo for real

* Update minimum requirements

* Change minimum to supported
2024-02-29 15:18:28 +10:30
jeremie-78 1bde8589e9
Cheat (#2410)
* Update The Legend of Zelda - Majora's Mask (E) (M4) (V1.0).cht

Added Time control cheat

* Update The Legend of Zelda - Majora's Mask (E) (M4) (V1.1).cht

Added Time control

* Update The Legend of Zelda - Majora's Mask (U).cht

Added Time control cheat

* Update The Legend of Zelda - Majora's Mask - Collector's Edition (E) (GC Version).cht

Added Time control cheat

* Update The Legend of Zelda - Majora's Mask - Collector's Edition (U) (GC).cht

Added Time control cheat

* Update Zelda no Densetsu - Mujura no Kamen (J) (V1.0).cht

Added Time control cheat

* Update Zelda no Densetsu - Mujura no Kamen (J) (V1.1).cht

Added Time control cheat

* Update Zelda no Densetsu - Mujura no Kamen - Zelda Collection Version (J) (GC).cht

Added Time control cheat
2024-02-29 15:17:48 +10:30
zilmar f7aa6ef6cb Core: Fix up CX86RecompilerOps::COP1_D_MUL so it can work with exceptions 2024-02-29 15:16:29 +10:30
zilmar 25dc3ed36f Core: CRegisters::TriggerAddressException should only generate a TLB_MOD on writes 2024-02-29 15:13:14 +10:30
zilmar d2649f7a13 Core: Some clean up recompiler ops 2024-02-22 19:56:23 +10:30
zilmar fae0b81e21 Core: Have CX86RegInfo::Map_TempReg generate a BreakPoint if it mapping a protected register 2024-02-22 19:41:10 +10:30
zilmar e082cd55df Core: Get COP1_D_TRUNC_W to work in recompiler 2024-02-15 21:08:49 +10:30
zilmar 2559d23592 Core: Make sure CX86RecompilerOps::CompileInitFpuOperation clears flag for FE_INVALID 2024-02-15 21:02:27 +10:30
zilmar 46f6fae40f Core: get CompileCheckFPUInput to be able to handle 32bit and 64bit 2024-02-15 21:00:12 +10:30
zilmar 2014237ed6 Core: Update Round.w.s, trunc.w.s, ceil.w.s, floor.w.s to work with exceptions in the recompiler 2024-02-08 19:34:14 +10:30
zilmar ad1a2a2d9a Core: Update neg.s for the recompiler 2024-02-01 18:17:03 +10:30
zilmar b6671adf5d Core: Update abs.s for recompiler 2024-02-01 18:15:33 +10:30
zilmar bc3fe0fe16 Core: Handle FP Status Reg being mapped better 2024-01-25 18:46:39 +10:30
zilmar 7707f9c7b2 Core: Fix up mov.s and mov.d for correct behaviour in the recompiler 2024-01-25 16:25:06 +10:30
zilmar 272144dc37 Core: check timer on cop1 unusable 2024-01-25 16:23:03 +10:30
zilmar f0f44c67f4 Core: Make mov.s the same as mov.d 2024-01-25 15:32:56 +10:30
zilmar 7ed94b653e Core: Get CX86RecompilerOps::COP1_S_CVT_D to be able to work with exceptions 2024-01-18 17:09:27 +10:30
zilmar 2231e8d6c0 Core: Remove usage of fpclassify from R4300iOp::CheckFPUResult64 2024-01-18 16:53:14 +10:30
zilmar 71067ccdc4 Rsp: Change how SP_SEMAPHORE_REG to how it use to be before adding multithread RSP 2024-01-11 18:17:05 +10:30
zilmar 5c56f9df83 RSP: Update the size of the skip in the length for DMA 2024-01-11 17:50:23 +10:30
zilmar 4dc3e35bb4 Core: Update CX86RecompilerOps::COP1_S_SQRT to work with fpu exceptions 2024-01-04 16:51:11 +10:30
zilmar f8089f565e Core: Unmap FPU_Float with writing to m_FPR_UDW 2024-01-04 14:40:42 +10:30
zilmar 552b8f744a Core: update Format_Name to match FPU_STATE 2024-01-04 13:11:21 +10:30
zilmar 6ca8333d39 Core: Get CX86RecompilerOps::COP1_S_CMP to work with exceptions 2024-01-04 12:39:51 +10:30
zilmar c9d2bbd221 Core: CX86RecompilerOps::COP1_CF should be able use the mapped FPStatusReg if is mapped 2024-01-04 12:37:06 +10:30
zilmar 0998f0ff0e Core: Add being able to get FPU_FloatLow from CX86RegInfo::FPRValuePointer 2024-01-04 12:32:55 +10:30
zilmar 23cff4d7c5 Core: Add x86 asm opcode Jnp 2024-01-04 12:31:26 +10:30