Core: Fix up CX86RecompilerOps::COP1_D_MUL so it can work with exceptions
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@ -8353,21 +8353,47 @@ void CX86RecompilerOps::COP1_D_MUL()
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uint32_t Reg1 = m_Opcode.ft == m_Opcode.fd ? m_Opcode.ft : m_Opcode.fs;
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uint32_t Reg2 = m_Opcode.ft == m_Opcode.fd ? m_Opcode.fs : m_Opcode.ft;
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CompileCop1Test();
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m_RegWorkingSet.FixRoundModel(CRegInfo::RoundDefault);
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, Reg1, CRegInfo::FPU_Double);
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if (m_RegWorkingSet.RegInStack(Reg2, CRegInfo::FPU_Double))
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if (FpuExceptionInRecompiler())
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{
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m_Assembler.fmul(asmjit::x86::st0, m_RegWorkingSet.StackPosition(Reg2));
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CompileInitFpuOperation(CRegInfo::RoundDefault);
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if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Any) ||
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m_RegWorkingSet.RegInStack(m_Opcode.ft, CRegInfo::FPU_Any) ||
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m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Any))
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(Reg1, CRegInfo::FPU_Double);
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CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
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m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
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TempReg = m_RegWorkingSet.FPRValuePointer(Reg2, CRegInfo::FPU_Double);
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CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
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m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, Reg1, CRegInfo::FPU_Double);
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m_Assembler.fmul(asmjit::x86::qword_ptr(TempReg));
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m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
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m_Assembler.mov(TempReg, (uint64_t)&m_TempValue64);
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m_Assembler.fpuStoreQwordFromX86Reg(m_RegWorkingSet.StackTopPos(), TempReg, false);
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CompileCheckFPUResult64(TempReg);
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m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
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}
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else
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{
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m_RegWorkingSet.UnMap_FPR(Reg2, true);
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Double);
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asmjit::x86::Gp TempReg = m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&m_Reg.m_FPR_D[Reg2], stdstr_f("_FPR_D[%d]", Reg2).c_str());
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m_Assembler.fmul(asmjit::x86::qword_ptr(TempReg));
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CompileCop1Test();
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m_RegWorkingSet.FixRoundModel(CRegInfo::RoundDefault);
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, Reg1, CRegInfo::FPU_Double);
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if (m_RegWorkingSet.RegInStack(Reg2, CRegInfo::FPU_Double))
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{
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m_Assembler.fmul(asmjit::x86::st0, m_RegWorkingSet.StackPosition(Reg2));
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}
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else
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{
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m_RegWorkingSet.UnMap_FPR(Reg2, true);
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Double);
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asmjit::x86::Gp TempReg = m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&m_Reg.m_FPR_D[Reg2], stdstr_f("_FPR_D[%d]", Reg2).c_str());
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m_Assembler.fmul(asmjit::x86::qword_ptr(TempReg));
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}
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}
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}
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@ -9068,21 +9094,24 @@ void CX86RecompilerOps::CompileCheckFPUResult64(asmjit::x86::Gp RegPointer)
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m_Assembler.mov(RegPointerValue, RegPointer);
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RegPointer = RegPointerValue;
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}
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asmjit::x86::Gp TempReg2 = m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.fnstsw(asmjit::x86::ax);
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m_Assembler.and_(asmjit::x86::ax, 0x3D);
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m_Assembler.cmp(asmjit::x86::ax, 0);
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asmjit::Label FpuExceptionJump = m_Assembler.newLabel();
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m_Assembler.JnzLabel("FpuException", FpuExceptionJump);
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m_Assembler.mov(TempReg, asmjit::x86::dword_ptr(RegPointer, 4));
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m_Assembler.and_(TempReg, 0x7FF00000);
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m_Assembler.mov(TempReg2, asmjit::x86::dword_ptr(RegPointer, 4));
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m_Assembler.and_(TempReg2, 0x7FF00000);
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asmjit::Label isSubNormal = m_Assembler.newLabel();
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m_Assembler.JzLabel("isSubNormal", isSubNormal);
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m_Assembler.cmp(TempReg, 0x7FF00000);
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m_Assembler.cmp(TempReg2, 0x7FF00000);
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asmjit::Label DoNoModify = m_Assembler.newLabel();
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m_Assembler.JneLabel("DoNotModify", DoNoModify);
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m_Assembler.bind(isSubNormal);
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m_Assembler.bind(FpuExceptionJump);
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m_Assembler.mov(TempReg, asmjit::x86::dword_ptr(RegPointer, 4));
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m_Assembler.mov(TempReg2, asmjit::x86::dword_ptr(RegPointer));
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m_RegWorkingSet.BeforeCallDirect();
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if (m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT)
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{
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@ -9100,6 +9129,24 @@ void CX86RecompilerOps::CompileCheckFPUResult64(asmjit::x86::Gp RegPointer)
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{
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m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", PIPELINE_STAGE_NORMAL);
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}
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asmjit::Label ValueDiffernt = m_Assembler.newLabel();
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asmjit::Label ValueSame = m_Assembler.newLabel();
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m_Assembler.cmp(TempReg, asmjit::x86::dword_ptr((uint64_t)((uint8_t *)&m_TempValue64 + 4)));
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m_Assembler.jne(ValueDiffernt);
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m_Assembler.cmp(TempReg2, asmjit::x86::dword_ptr((uint64_t)&m_TempValue64));
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m_Assembler.je(ValueSame);
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m_Assembler.bind(ValueDiffernt);
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ExitRegSet = m_RegWorkingSet;
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m_Assembler.mov(TempReg2, asmjit::x86::dword_ptr(RegPointer));
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m_Assembler.mov(TempReg, asmjit::x86::dword_ptr(RegPointer, 4));
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asmjit::x86::Gp TempRegFPR_D = ExitRegSet.Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(TempRegFPR_D, &m_Reg.m_FPR_D[m_Opcode.fd], stdstr_f("m_FPR_D[%d]", m_Opcode.fd).c_str());
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m_Assembler.mov(asmjit::x86::dword_ptr(TempRegFPR_D), TempReg2);
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m_Assembler.mov(asmjit::x86::dword_ptr(TempRegFPR_D, 4), TempReg);
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ExitRegSet.SetBlockCycleCount(ExitRegSet.GetBlockCycleCount() + g_System->CountPerOp());
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CompileExit(m_CompilePC + 4, m_CompilePC + 4, ExitRegSet, ExitReason_Normal, false, &CX86Ops::JmpLabel);
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m_Assembler.bind(ValueSame);
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m_Assembler.bind(DoNoModify);
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}
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