Denis Kopyrin
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7d5c867bfd
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Core: Fixed recompiler memory overrun for m_TestTimer (#2480)
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2025-05-29 15:43:40 +09:30 |
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zilmar
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7eaf1c4ba3
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Core: do not write back rt in CX86RecompilerOps::CompileLoadMemoryValue on exception
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2025-02-21 11:13:54 +10:30 |
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zilmar
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5d21bf80b9
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core: fix up missing exception check in CX86RecompilerOps::SPECIAL_DIV
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2025-02-21 06:15:07 +10:30 |
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zilmar
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fa57ce7fb8
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core: make CX86RecompilerOps::SPECIAL_JALR handle 64bit PC
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2025-02-20 13:25:44 +10:30 |
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zilmar
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5e029ecf6a
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Core: CX86RecompilerOps::CompileLoadMemoryValue some work on it generating an exception from invalid load address
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2025-02-13 22:20:00 +10:30 |
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zilmar
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bd38e7f2d6
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Core: In CX86RecompilerOps::SPECIAL_JR store PC as 64bit
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2025-02-13 22:15:20 +10:30 |
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zilmar
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9d28d9cf28
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core: More work in making sure the Compiler sets 64bit PC
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2025-02-13 16:29:25 +10:30 |
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zilmar
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1debcd1ca5
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Core: In CX86RecompilerOps::CompileExit, make sure writing 64bit PC
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2025-02-13 16:08:11 +10:30 |
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zilmar
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20f3e5e123
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Core: In CX86RecompilerOps::COP1_S_CVT, CX86RecompilerOps::CompileCheckFPUResult32 set softfloat_exceptionFlags to the FPU exception value
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2025-02-13 15:55:16 +10:30 |
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zilmar
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a07f6eaf90
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Core: In CX86RecompilerOps::COP0_MT update the count register when writing to Count
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2025-02-13 12:24:20 +10:30 |
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zilmar
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c7d8a70a4d
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Core: fix jump in CX86RecompilerOps::CompileSystemCheck
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2024-12-27 09:02:37 +10:30 |
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zilmar
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bfa3788562
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Core: CX86RecompilerOps::COP1_D_Opcode fix return type of floating point register
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2024-12-26 14:29:52 +10:30 |
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zilmar
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3c7e71adca
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Core: Fix up CX86RecompilerOps::COP1_D_Opcode for the registers it is using
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2024-12-26 14:16:26 +10:30 |
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zilmar
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fc79cb0344
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Core: Add DwordLower for cvt.w
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2024-12-26 09:35:07 +10:30 |
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zilmar
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7e74b98d5b
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Core: Fix up labels in CX86RecompilerOps::COP1_S_CVT
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2024-12-19 21:59:42 +10:30 |
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zilmar
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57f278416e
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core: better handling of fpu registers with COP1_S_Opcode
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2024-12-19 19:09:31 +10:30 |
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zilmar
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13a974e687
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Core: in CX86RecompilerOps::COP1_CT ignore write to other registers
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2024-12-19 09:58:30 +10:30 |
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zilmar
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fba1c4bc3b
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Core: Fix up bug in CX86RecompilerOps::SPECIAL_AND
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2024-12-19 09:57:25 +10:30 |
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zilmar
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473aeba2cf
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Core: Fix order of value in call to CMipsMemoryVM::SD_VAddr32 in recompiler
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2024-12-12 21:22:32 +10:30 |
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zilmar
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5d64b3d920
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Core: Better handling of Storing non 32bit values to non memory
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2024-12-12 16:50:36 +10:30 |
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zilmar
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3164caf2d0
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Core: allow Store/load ops be forced to 32bit version
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2024-12-08 11:15:39 +10:30 |
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zilmar
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77cd679756
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Core: Fix a bug in CX86RecompilerOps::SPECIAL_DIV
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2024-12-05 17:05:52 +10:30 |
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zilmar
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fc1210aac5
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Core: Do not allow CX86RecompilerOps::SPECIAL_DSRL32 and CX86RecompilerOps::SPECIAL_DSRA32 to write to R0
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2024-12-05 11:25:20 +10:30 |
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zilmar
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1e4ab04121
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Core: Fix up CX86RecompilerOps::SPECIAL_DSUB when rd == rt
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2024-12-05 11:06:42 +10:30 |
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zilmar
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04c1c3d024
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Core: Fix up CX86RecompilerOps::SPECIAL_DADD
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2024-12-05 10:03:45 +10:30 |
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zilmar
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1f3ef6d505
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Core: CX86RecompilerOps::SPECIAL_NOR Ignore write to r0
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2024-11-28 15:54:36 +10:30 |
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zilmar
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95015302d6
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Core: Have CX86RecompilerOps::SPECIAL_XOR treat R0 as 64bit constant
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2024-11-28 15:38:54 +10:30 |
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zilmar
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a3c777ed84
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Core: Have CX86RecompilerOps::SPECIAL_AND unmap the register on const write
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2024-11-28 15:14:26 +10:30 |
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zilmar
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0de0bea07a
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Core: Ignore write in CX86RecompilerOps::SPECIAL_OR
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2024-11-28 12:37:42 +10:30 |
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zilmar
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8d69671e93
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Core: CX86RecompilerOps::ADDIU should not ignore when not 32bit mapped
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2024-11-28 12:29:35 +10:30 |
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zilmar
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52d904702f
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Core: With CONST64 CX86RegInfo::WriteBackRegisters might not write the high 32bit correct
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2024-11-28 11:39:41 +10:30 |
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zilmar
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d5367d9291
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Core: Better handling of SW with address not sign extended
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2024-11-28 11:02:38 +10:30 |
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zilmar
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fd05d9f42f
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core: if lwl or lwr, in CX86RecompilerOps::CompileLoadMemoryValue, make sure that we are loading rt
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2024-11-21 21:33:42 +10:30 |
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zilmar
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5e1a40fffb
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Core: fix CX86RecompilerOps::CompileLoadMemoryValue Map_GPR_32bit when called from LWC1
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2024-11-21 11:10:01 +10:30 |
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zilmar
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2ec9ed08a4
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Core: Improve LW with address not sign extended test in recompiler
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2024-11-14 17:02:18 +10:30 |
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zilmar
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97b2579b4b
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Core: Have the recompiler just deal with the Program Counter as 32bit
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2024-11-07 17:05:16 +10:30 |
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zilmar
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e419508c2b
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Core: On ExitReason_CheckPCAlignment make sure CompileSystemCheck is called
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2024-11-07 12:13:28 +10:30 |
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zilmar
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d06212e766
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Core: CX86RecompilerOps::JAL stop double call to UpdateCounters
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2024-11-07 11:05:55 +10:30 |
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zilmar
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905254615d
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Core: Change the handling of symbols inside asmjit usage
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2024-10-31 06:50:17 +10:30 |
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zilmar
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17c501fa08
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Core: clean up some code related to CompileStoreMemoryValue, like the exit method being an exception
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2024-10-24 13:32:02 +10:30 |
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zilmar
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440894992a
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Core: remove the BreakPoint in handling ExitReason_CheckPCAlignment
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2024-10-24 11:58:53 +10:30 |
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zilmar
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65ede5e3e8
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Core: If jumping to an unaligned address then generate an exception
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2024-10-24 10:31:48 +10:30 |
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zilmar
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c39582b9ed
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Core: Make sure CX86RecompilerOps::SPECIAL_AND can not write to R0
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2024-10-17 18:42:45 +10:30 |
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zilmar
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45e52e1d2a
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Core: in SPECIAL_SYSCALL, SPECIAL_BREAK only exit the block is the stage is PIPELINE_STAGE_NORMAL
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2024-10-17 14:12:46 +10:30 |
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zilmar
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91f9cdaaa7
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Core: Change the Program counter to be 64bit
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2024-06-06 14:09:12 +09:30 |
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zilmar
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77ac4744a5
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Core: Make sure fpu stack is being cleared
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2024-05-23 11:52:58 +09:30 |
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zilmar
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ec714cd90d
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Core: in CX86RecompilerOps::CompileCheckFPUResult64 protect RegPointer before Map_TempReg(asmjit::x86::eax)
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2024-05-23 11:41:15 +09:30 |
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zilmar
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3baaa829de
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Core: Remove g_TLBLoadAddress, g_TLBStoreAddress global variables
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2024-05-16 16:34:17 +09:30 |
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zilmar
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13bd420b2a
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Core: Sync FP status register in advanced block linking
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2024-05-16 15:45:38 +09:30 |
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zilmar
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703a09d034
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Core: Remove protecting memory option
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2024-05-09 17:56:28 +09:30 |