zilmar
|
c16307ec0f
|
Core: Move Pifram code into PifRamHandler
|
2022-10-17 08:27:52 +10:30 |
|
zilmar
|
315231d439
|
Core: Writing to 0x0410000C was not calling AfterCallDirect()
|
2022-10-11 17:31:28 +10:30 |
|
zilmar
|
2199c9cd1f
|
Core: Inherit STATE_CONST_64 in CX86RecompilerOps::InheritParentInfo
|
2022-10-11 17:24:06 +10:30 |
|
zilmar
|
801a3e29fc
|
Core: Handle more with LW and invalid addresses
|
2022-10-10 20:25:16 +10:30 |
|
zilmar
|
082ec9c22e
|
Core: Handle unaligned LH
|
2022-10-10 17:17:56 +10:30 |
|
zilmar
|
ca037abf2b
|
Core: Update counters when updating wired
|
2022-10-10 15:44:52 +10:30 |
|
zilmar
|
29e1468338
|
Core: Ignore next targeting branch if last op in block
|
2022-10-10 14:30:20 +10:30 |
|
zilmar
|
0848bab003
|
Core: do not predefine temp reg
|
2022-10-10 13:57:10 +10:30 |
|
zilmar
|
46dcf967e1
|
Core: Change StackPos to be a reference
|
2022-10-10 13:42:52 +10:30 |
|
zilmar
|
6044222be0
|
Core: Remove temp usage of Name
|
2022-10-10 13:38:43 +10:30 |
|
zilmar
|
0ffaf43418
|
Core: fix CX86RecompilerOps::LD when rt==base
|
2022-10-10 12:41:12 +10:30 |
|
zilmar
|
96cece6cd9
|
Core: Update timing around exception in DADD/DSUB
|
2022-10-10 12:34:11 +10:30 |
|
zilmar
|
3a87c3c5ad
|
Core: Update timing around exception in ADD/SUB
|
2022-10-10 12:28:06 +10:30 |
|
zilmar
|
3b57424b86
|
Core: DMTC/MT should not be updating registers
|
2022-10-10 12:16:27 +10:30 |
|
zilmar
|
481f1c50c8
|
Core: Add break op to recompiler
|
2022-10-10 12:07:04 +10:30 |
|
zilmar
|
fc247fd953
|
Core: Get recompiler to handle DADDI/DADDIU
|
2022-10-10 11:53:30 +10:30 |
|
zilmar
|
a8add093d1
|
Core: Add CPO_DMF/CPO_DMT to recompiler
|
2022-10-10 11:38:55 +10:30 |
|
zilmar
|
761a1ee52a
|
Code clean up
|
2022-10-10 10:52:17 +10:30 |
|
zilmar
|
0d7f25138c
|
Core: Do not check sign extension in 32bit core
|
2022-10-04 09:47:45 +10:30 |
|
zilmar
|
8391cdafde
|
Core: Fix masking of context
|
2022-10-03 21:48:09 +10:30 |
|
zilmar
|
da138bf38b
|
Project64: Exception when address not sign extended
|
2022-10-03 18:35:50 +10:30 |
|
zilmar
|
82d9027374
|
Core: Fix up XContext
|
2022-10-03 11:29:21 +10:30 |
|
zilmar
|
42cc34964b
|
Core: Sign extend cop0
|
2022-10-03 09:34:13 +10:30 |
|
zilmar
|
0c078049c0
|
Android: Update android build
|
2022-09-26 12:53:14 +09:30 |
|
zilmar
|
179282043f
|
Project64: Code cleanup
|
2022-09-26 12:01:54 +09:30 |
|
zilmar
|
a2981ff4d8
|
Core: Make Load/Store use 64bit vaddr
|
2022-09-19 21:36:36 +09:30 |
|
zilmar
|
1c77f6f0fd
|
Core: Make Cop0 64bit
|
2022-09-19 16:36:44 +09:30 |
|
zilmar
|
21b193152a
|
Core: Fix CMipsMemoryVM::MemoryValue64 for sdl/sdr
|
2022-09-19 12:13:19 +09:30 |
|
zilmar
|
05d46c9487
|
Core: Handle reserve instruction 31
|
2022-09-19 12:12:08 +09:30 |
|
zilmar
|
a79a8a9276
|
Core: Clean up arm recompiler changes
|
2022-09-12 22:44:42 +09:30 |
|
zilmar
|
457937f039
|
Core: Map temp pass in flag for 8 bit register
|
2022-09-12 06:01:43 +09:30 |
|
zilmar
|
a640ecfbc0
|
Core: CMipsMemoryVM::SB_NonMemory should return false just on exception
|
2022-09-05 21:20:07 +09:30 |
|
zilmar
|
479e2e518c
|
Core: Syscall should increment cycle count
|
2022-09-05 20:00:28 +09:30 |
|
zilmar
|
43c89a517b
|
Core: Execute CPU should not trigger Loaded game state
|
2022-09-05 19:56:23 +09:30 |
|
zilmar
|
c380571d8b
|
Core: Update when branch goes to the opcode after the delay slot
|
2022-09-05 19:42:22 +09:30 |
|
zilmar
|
17b78bc705
|
Core: Clean up CExitInfo::EXIT_REASON enum
|
2022-09-05 17:42:41 +09:30 |
|
zilmar
|
524f56eda7
|
Core: fix srav in the interpter
|
2022-09-05 17:42:15 +09:30 |
|
zilmar
|
e171adfef6
|
Core: Clean up formatting of register names
|
2022-09-05 16:47:51 +09:30 |
|
zilmar
|
29526583a6
|
Core: Give cop0 registers names
|
2022-09-05 16:38:30 +09:30 |
|
zilmar
|
18b9892bc7
|
Core: Add handling of overflow exception
|
2022-09-05 16:35:13 +09:30 |
|
zilmar
|
0371c20d32
|
Core: Use BreakOnUnhandledMemory in SPRegistersHandler when breaking
|
2022-09-05 11:00:15 +09:30 |
|
zilmar
|
7d55fdca37
|
Core: Fix bug in CX86RegInfo::FreeX86Reg where x86RegIndex_Size was introduced
|
2022-09-05 10:42:49 +09:30 |
|
zilmar
|
a5c6f25ee3
|
Core: CX86RecompilerOps::BaseOffsetAddress should not unprotect unless it actually protected
|
2022-09-05 10:41:18 +09:30 |
|
zilmar
|
e8adf78e84
|
Core: Fix up that x64 files only build in x64
|
2022-08-29 20:52:15 +09:30 |
|
zilmar
|
f7b1891c91
|
Core: Add base 64bit Recompiler classes
|
2022-08-29 17:57:17 +09:30 |
|
zilmar
|
d82a370e59
|
Core: Create a x86RegIndex enum
|
2022-08-29 11:49:20 +09:30 |
|
zilmar
|
b88a1ccc1e
|
Core: Fix bug in div for recompiler
|
2022-08-29 08:33:13 +09:30 |
|
zilmar
|
6782599687
|
Core: Create a x86 call for calling this functions
|
2022-08-29 08:32:02 +09:30 |
|
zilmar
|
4218cbad23
|
Core: R4300iInstruction::DecodeSpecialName - Fix up SLL param
|
2022-08-29 08:27:47 +09:30 |
|
zilmar
|
52a30b78fb
|
Core: Handle div/0 better
|
2022-08-22 22:13:53 +09:30 |