zilmar
|
187bd64915
|
Core: Update how exceptions are handled with the recompiler
|
2023-06-08 16:25:05 +09:30 |
|
zilmar
|
e2eebe566d
|
Core: fix up for clang
|
2023-05-18 18:05:54 +09:30 |
|
zilmar
|
3b8dfce64a
|
Core: Convert DoBreakException to TriggerException
|
2023-05-18 11:47:00 +09:30 |
|
zilmar
|
0dfab78c88
|
Core: Convert DoCopUnusableException to TriggerException
|
2023-05-18 11:26:36 +09:30 |
|
zilmar
|
252f629e14
|
Core: Convert DoIllegalInstructionException to TriggerException
|
2023-05-18 11:13:22 +09:30 |
|
zilmar
|
59a1277bed
|
Core: Convert GenerateOverflowException to TriggerException
|
2023-05-18 11:05:27 +09:30 |
|
zilmar
|
69fd74ba56
|
Core: Convert DoSysCallException to TriggerException
|
2023-05-18 10:56:06 +09:30 |
|
zilmar
|
fa25b6d2af
|
Core: clear FPU StatusReg cause in CX86RecompilerOps::COP1_S_ADD
|
2023-05-02 11:12:13 +09:30 |
|
zilmar
|
02a48566c0
|
Core: Remove helper functions from x86 Recompiler Ops
|
2023-05-02 10:50:49 +09:30 |
|
zilmar
|
ab8b004b71
|
Core: Add a setting for fpu reg caching
|
2023-04-17 18:47:33 +09:30 |
|
zilmar
|
9a04293a67
|
Update arm/arm64 to use asmjit
|
2023-04-05 10:16:21 +09:30 |
|
zilmar
|
2c40d47a34
|
Start to look at x64 recompiler
|
2023-04-04 17:44:42 +09:30 |
|
zilmar
|
ea70218d1c
|
Clean up warnings
|
2023-02-28 10:09:08 +10:30 |
|
zilmar
|
f802b18cdc
|
Core: Change to using fenv.h instead of including the code directly
|
2023-01-30 10:07:51 +10:30 |
|
zilmar
|
fb6bda321c
|
Core: SW_Register needs to protect the register
|
2023-01-23 15:30:39 +10:30 |
|
zilmar
|
ccae22afc5
|
Core: Revert SPECIAL_SRA and SPECIAL_SRAV to old version when running as 32bit
|
2023-01-09 13:47:41 +10:30 |
|
zilmar
|
b6629ac1d3
|
Android: Fix build warning with CX86Ops::CallThis
|
2023-01-03 14:49:35 +10:30 |
|
zilmar
|
811aaf9d36
|
Core: Fix up SPECIAL_SRAV for 64bit copy
|
2022-12-26 18:34:53 +10:30 |
|
zilmar
|
c619b71b26
|
Core: get sra to handle 64bit shift
|
2022-12-26 18:13:45 +10:30 |
|
zilmar
|
b217428fee
|
Core: fix up masking in CX86RecompilerOps::COP1_CT
|
2022-12-26 17:35:58 +10:30 |
|
zilmar
|
0cc7ede816
|
Core: Fix up BGEZALL in recompiler
|
2022-12-26 17:19:32 +10:30 |
|
zilmar
|
2c6d3429b7
|
Core: Fix handling of BGEZAL ra in recompiler
|
2022-12-26 16:14:05 +10:30 |
|
zilmar
|
f380d326fe
|
Core: Start to handle jump in delay slot
|
2022-12-26 12:54:04 +10:30 |
|
zilmar
|
620aabcf9e
|
Core: Add clang script and check on building release
|
2022-12-19 15:51:02 +10:30 |
|
zilmar
|
bd1b1b4dbb
|
Core: Missed file for code clean up
|
2022-12-19 15:36:08 +10:30 |
|
zilmar
|
c0341bb759
|
Core: Code clean up for clang
|
2022-12-19 15:35:17 +10:30 |
|
zilmar
|
ff56992542
|
Android: Some more core changes for asmjit
|
2022-12-07 09:04:55 +10:30 |
|
zilmar
|
6b04b908bf
|
Core: Handle bgezal ra in the recompiler
|
2022-12-05 14:09:03 +10:30 |
|
zilmar
|
ed357e5d97
|
Core: Get recompiler to call PifRamHandler when in pif address space
|
2022-11-27 11:07:28 +10:30 |
|
zilmar
|
1e3fff2b41
|
Core: ignore memory stack pointer when stack pointer is reset
|
2022-11-25 09:34:54 +10:30 |
|
zilmar
|
79d749e33d
|
Core: fix bug in CX86Ops::CallFunc when not logging opcodes
|
2022-11-24 09:10:15 +10:30 |
|
zilmar
|
e3aa2514c1
|
Core: Fix bug in CX86RecompilerOps::SPECIAL_DIV
|
2022-11-23 20:16:38 +10:30 |
|
zilmar
|
8e94b3086b
|
Core: Change recompiler to use asmjit
|
2022-11-23 14:46:55 +10:30 |
|
zilmar
|
2a6d3cd519
|
Core: remove #ifdef toremove block in CX86RecompilerOps::SPECIAL_DMULTU()
|
2022-11-21 08:55:51 +10:30 |
|
zilmar
|
9743f12b1d
|
Core: Remvoe #ifdef LinkBlocks code block
|
2022-11-21 08:52:19 +10:30 |
|
zilmar
|
529812fdca
|
Core: Switch to use asmjit registers in recompiler
|
2022-11-07 21:03:32 +10:30 |
|
zilmar
|
a4c49a3567
|
Core: rearrange XorVariableToX86reg parameters
|
2022-11-07 16:30:09 +10:30 |
|
zilmar
|
2fcce6cdd5
|
Cote: TestVariable rearrange parameters
|
2022-11-07 16:25:54 +10:30 |
|
zilmar
|
fe1f99ae1c
|
Core: rearrange TestConstToX86Reg parameters
|
2022-11-07 16:22:51 +10:30 |
|
zilmar
|
ce939100c5
|
Core: rearrange OrVariableToX86Reg parameters
|
2022-11-07 16:18:54 +10:30 |
|
zilmar
|
697397f1dd
|
Core: Rearrange OrConstToX86Reg parameters
|
2022-11-07 16:03:45 +10:30 |
|
zilmar
|
40259d01ca
|
Core: rearrange OrConstToVariable parameters
|
2022-11-07 15:55:19 +10:30 |
|
zilmar
|
c95aae8e38
|
Core: rearrange MoveZxVariableToX86regHalf parameters
|
2022-11-07 15:48:39 +10:30 |
|
zilmar
|
96eed54a1d
|
Core: rearrange MoveZxVariableToX86regByte parameters
|
2022-11-07 15:44:10 +10:30 |
|
zilmar
|
4570d9eab5
|
Core: rearrange MoveZxHalfX86regPointerToX86reg variables
|
2022-11-07 15:40:01 +10:30 |
|
zilmar
|
8a2197707b
|
Core: rearrange MoveZxByteX86regPointerToX86reg parameters
|
2022-11-07 15:38:36 +10:30 |
|
zilmar
|
59892a266b
|
Core: rearrange MoveX86regToVariable parameters
|
2022-11-07 15:30:25 +10:30 |
|
zilmar
|
91a192cead
|
Core: rearrange MoveX86regToMemory parameters
|
2022-11-07 14:40:28 +10:30 |
|
zilmar
|
891d487fdd
|
Core: rearrange MoveX86regPointerToX86regDisp8 parameters
|
2022-11-07 14:38:34 +10:30 |
|
zilmar
|
d74694d16f
|
Core: rearrange MoveX86regPointerToX86reg parameters
|
2022-11-07 14:36:11 +10:30 |