Commit Graph

6271 Commits

Author SHA1 Message Date
zilmar f559aed2ad Core: Get CRegisters::DoAddressError, CRegisters::DoTLBReadMiss, CRegisters::DoTLBWriteMiss to use TriggerException function 2023-09-14 16:23:26 +09:30
zilmar ae4af8746b Core: replace GenerateTLBReadException and void GenerateTLBWriteException with CRegisters::DoTLBReadMiss/CRegisters::DoTLBWriteMiss 2023-09-14 13:09:11 +09:30
zilmar 8b14b6d7d1 Core: Move InitRegisters to register class 2023-09-14 12:01:16 +09:30
zilmar a5a4873e84 Core: Have CRegisters::DoAddressError to not directly modify program counter 2023-09-14 11:37:21 +09:30
zilmar 2d09178449 Core: Add calls to CPO1_UNIMPLEMENTED_OP for Cop1.w functions 2023-09-14 11:15:42 +09:30
zilmar 5da5dab3c5 Core: Have CRegisters::DoTLBReadMiss set the target pipe line to jump, not directly modify the PC 2023-09-14 11:09:28 +09:30
zilmar fcd7257adc Core: Change COP0 Status register to a struct breaking up the bits 2023-09-14 10:23:36 +09:30
zilmar 9ffd87168a Core: DisplayControlRegHandler::Read32 read more of the registers 2023-09-14 09:40:11 +09:30
zilmar 002f2e17c3 RSP: Clean up code for vector multiple ops 2023-09-07 11:54:36 +09:30
zilmar 4e9a692449 RSP: Add RSP_Vector_VRNDP 2023-09-07 11:41:17 +09:30
zilmar 0cadbe0f70 RSP: Add clamp16 2023-09-07 11:31:31 +09:30
zilmar af1c0c2b55 RSP: Add Vmulq 2023-09-07 11:30:15 +09:30
zilmar d468b863c2 Rsp: add vnop for vnull 2023-09-07 11:29:16 +09:30
zilmar 8b71ef3bc1 RSP: Add RSP_Vector_Reserved 2023-09-07 11:23:35 +09:30
zilmar ab67374c8a RSP: Update the display of RSP opcodes in debugger 2023-09-07 11:19:44 +09:30
zilmar 4f74dc4bb0 Rsp: Update display of vector in debugger 2023-09-07 11:17:08 +09:30
zilmar ab03916a70 Core: let the stack pointer equal end of rdram 2023-09-07 11:13:54 +09:30
zilmar 7199096748 Core: Merge CheckFPUException into CheckFPUResult64 2023-08-31 18:52:34 +09:30
zilmar 91d1c6e237 Core: Add fpu exceptions to COP1_S_MUL 2023-08-31 11:09:48 +09:30
zilmar 2f7a35613f Core: Add exception to COP1_S_SUB 2023-08-31 10:54:41 +09:30
zilmar c28c6bb4a1 Core: Add fpu exceptions to COP1_S_ADD 2023-08-31 10:08:49 +09:30
zilmar 416c85ecda Core: some code clean up of Load_FPR_ToTop 2023-08-31 09:30:05 +09:30
zilmar 2dcfcf250d Core: Do not force unmapping of fpr registers before CX86RegInfo::BeforeCallDirect(void) 2023-08-31 09:28:23 +09:30
zilmar e49438cdab Core: Add exit reason exception 2023-08-30 12:16:07 +09:30
zilmar 703ad4049a PluginRSP: declare windows.h before asset.h 2023-08-30 12:15:36 +09:30
zilmar 41fa1fd5dd Core: use m_TLB_WriteMap not m_TLB_ReadMap for NonMemory 2023-08-30 11:35:53 +09:30
zilmar 625f532d73 RSP: use __debugbreak not DebugBreak 2023-08-24 10:44:45 +09:30
zilmar 47f14016e6 RSP: Set RSP_JumpTo before register in JALR, BLTZAL, BGEZAL 2023-08-24 10:35:51 +09:30
zilmar ae9912b068 RSP: Clean up VCR 2023-08-24 10:31:26 +09:30
zilmar 7db5876927 RSP: Clean up VCL 2023-08-24 10:07:05 +09:30
zilmar 9dab3481ae RSP: Add class to wrap around RSP flag 2023-08-24 08:00:29 +09:30
zilmar 0cb43e0c33 RSP: Remove flag to swap vector register endian 2023-08-24 07:04:35 +09:30
Squall Leonhart b8fff5d116
Corrects Internal names for many Japanese roms (#2384)
And adds missing settings for Majora's mask M4 Debug
2023-08-19 14:48:07 +09:30
zilmar d300dc002a Core: remove exception catch around RSP 2023-08-17 15:27:18 +09:30
zilmar 6884c8d2c9 Core: fix up how recompiler handles rounding 2023-08-17 15:24:57 +09:30
zilmar a80860605d RSP: fix up usage of Indx in recompiler 2023-08-17 14:38:51 +09:30
zilmar 3394be733f RSP: Fix up AccurateEmulation for interpreter 2023-08-17 14:22:54 +09:30
zilmar 54be4d8135 Rsp: Add a rsp AccurateEmulation flag for new rsp work 2023-08-17 12:04:06 +09:30
zilmar 09ef426ac6 Rsp: Fix memory allocation of recompiler memory 2023-08-17 11:37:03 +09:30
zilmar 6b30c1ae6a Rsp: Move Recompiler in to rsp-core 2023-08-17 08:59:22 +09:30
zilmar 1f0151e067 RSP: fix up clang formatting 2023-08-10 21:50:01 +09:30
zilmar 6bdc898248 RSP: fix LPV 2023-08-10 20:52:50 +09:30
zilmar c6c0a4a6d2 RSP: fix LDV 2023-08-10 16:06:38 +09:30
zilmar 1d492262fd RSP: use std::min for length calculation 2023-08-10 14:24:33 +09:30
zilmar 60192a7f33 RSP: Move more functionality in to rsp-core 2023-08-10 14:16:57 +09:30
zilmar 25e48405c5 RSP: Start to split out RSP in to core and UI for plugin 2023-08-10 10:27:11 +09:30
zilmar bb5a16aaa2 RSP: Change RSP Registers to be an enum not define 2023-08-10 09:47:53 +09:30
zilmar 34d75780bf Rsp: Update the element order in LSV, LLV, LRV 2023-08-03 17:32:40 +09:30
zilmar a18f78679e Rsp: Change the order of EleSpec 2023-08-03 17:29:55 +09:30
zilmar 05cd3a846b Rsp: Update vmov 2023-08-03 17:27:58 +09:30