zilmar
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a045a4fcd4
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Core: fix accidental changes to UIResources.rc
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2024-12-06 11:37:42 +10:30 |
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zilmar
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c6b41da926
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Add Overclock modifier to Defaults panel
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2024-12-05 17:30:59 +10:30 |
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zilmar
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77cd679756
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Core: Fix a bug in CX86RecompilerOps::SPECIAL_DIV
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2024-12-05 17:05:52 +10:30 |
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zilmar
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fc1210aac5
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Core: Do not allow CX86RecompilerOps::SPECIAL_DSRL32 and CX86RecompilerOps::SPECIAL_DSRA32 to write to R0
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2024-12-05 11:25:20 +10:30 |
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zilmar
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1e4ab04121
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Core: Fix up CX86RecompilerOps::SPECIAL_DSUB when rd == rt
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2024-12-05 11:06:42 +10:30 |
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zilmar
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04c1c3d024
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Core: Fix up CX86RecompilerOps::SPECIAL_DADD
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2024-12-05 10:03:45 +10:30 |
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zilmar
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4366703f28
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Try to fix appveyor.yml
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2024-11-28 16:56:04 +10:30 |
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zilmar
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1f3ef6d505
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Core: CX86RecompilerOps::SPECIAL_NOR Ignore write to r0
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2024-11-28 15:54:36 +10:30 |
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zilmar
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95015302d6
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Core: Have CX86RecompilerOps::SPECIAL_XOR treat R0 as 64bit constant
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2024-11-28 15:38:54 +10:30 |
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zilmar
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a3c777ed84
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Core: Have CX86RecompilerOps::SPECIAL_AND unmap the register on const write
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2024-11-28 15:14:26 +10:30 |
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zilmar
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0de0bea07a
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Core: Ignore write in CX86RecompilerOps::SPECIAL_OR
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2024-11-28 12:37:42 +10:30 |
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zilmar
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8d69671e93
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Core: CX86RecompilerOps::ADDIU should not ignore when not 32bit mapped
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2024-11-28 12:29:35 +10:30 |
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zilmar
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52d904702f
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Core: With CONST64 CX86RegInfo::WriteBackRegisters might not write the high 32bit correct
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2024-11-28 11:39:41 +10:30 |
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zilmar
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d5367d9291
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Core: Better handling of SW with address not sign extended
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2024-11-28 11:02:38 +10:30 |
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zilmar
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fd05d9f42f
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core: if lwl or lwr, in CX86RecompilerOps::CompileLoadMemoryValue, make sure that we are loading rt
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2024-11-21 21:33:42 +10:30 |
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zilmar
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315d5b9e66
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Core: When running as recompiler in 32bit mode, if LW/SW are in delay slots on block boundaries use 32bit interpter functions
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2024-11-21 19:13:56 +10:30 |
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zilmar
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5e1a40fffb
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Core: fix CX86RecompilerOps::CompileLoadMemoryValue Map_GPR_32bit when called from LWC1
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2024-11-21 11:10:01 +10:30 |
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zilmar
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48b3e5a9a2
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Core: Zip load in CN64System::LoadState uses utf16 path
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2024-11-21 10:48:16 +10:30 |
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zilmar
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58a13b8e28
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Core: Get Zip files to use utf16 paths
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2024-11-21 10:43:56 +10:30 |
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zilmar
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2ec9ed08a4
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Core: Improve LW with address not sign extended test in recompiler
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2024-11-14 17:02:18 +10:30 |
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zilmar
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944dd0917a
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Core: Fix up logging id for label symbols
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2024-11-14 09:31:45 +10:30 |
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zilmar
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61aa53f1a5
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Core: In jump ops, Only add label symbol if logging
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2024-11-14 07:30:39 +10:30 |
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zilmar
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97b2579b4b
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Core: Have the recompiler just deal with the Program Counter as 32bit
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2024-11-07 17:05:16 +10:30 |
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zilmar
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f63244cfa4
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Core: Handle duplicate symbols in AddLabelSymbol
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2024-11-07 13:37:10 +10:30 |
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zilmar
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72e6ee1a2b
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Core: Normalize RomDatabase, VideoRDB, AudioRdb file paths
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2024-11-07 13:24:45 +10:30 |
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zilmar
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e419508c2b
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Core: On ExitReason_CheckPCAlignment make sure CompileSystemCheck is called
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2024-11-07 12:13:28 +10:30 |
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zilmar
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a46ac9f38d
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Core: in CX86Ops::_log better handle label symbols
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2024-11-07 12:12:44 +10:30 |
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zilmar
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d06212e766
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Core: CX86RecompilerOps::JAL stop double call to UpdateCounters
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2024-11-07 11:05:55 +10:30 |
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zilmar
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bfd181f33e
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Core: Fix up recompiler log including 0x in number symbols
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2024-11-07 09:22:56 +10:30 |
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zilmar
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f3a3d56c13
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Gliden64: Fix up x64 build with including UI
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2024-10-31 08:12:52 +10:30 |
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zilmar
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246934c0ab
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Core: Fix up default x64/Release config file
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2024-10-31 07:06:00 +10:30 |
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zilmar
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24d5a6bd65
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Core: fix up clang formatting
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2024-10-31 07:01:32 +10:30 |
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zilmar
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905254615d
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Core: Change the handling of symbols inside asmjit usage
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2024-10-31 06:50:17 +10:30 |
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zilmar
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17c501fa08
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Core: clean up some code related to CompileStoreMemoryValue, like the exit method being an exception
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2024-10-24 13:32:02 +10:30 |
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zilmar
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a8c8e751fc
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Core: log the block code to the asm log file
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2024-10-24 12:11:15 +10:30 |
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zilmar
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885d31f275
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Core: Update Map_MemoryStack to pass gp by reference
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2024-10-24 12:01:14 +10:30 |
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zilmar
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440894992a
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Core: remove the BreakPoint in handling ExitReason_CheckPCAlignment
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2024-10-24 11:58:53 +10:30 |
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zilmar
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65ede5e3e8
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Core: If jumping to an unaligned address then generate an exception
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2024-10-24 10:31:48 +10:30 |
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zilmar
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4a42466559
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Core: In compiling a block be able to trace the time to compile
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2024-10-24 10:04:45 +10:30 |
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zilmar
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5750d3df80
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Core: Have only one function to do what R4300iOp::ExecuteOps and R4300iOp::ExecuteCPU was doing
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2024-10-24 09:59:41 +10:30 |
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zilmar
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c39582b9ed
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Core: Make sure CX86RecompilerOps::SPECIAL_AND can not write to R0
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2024-10-17 18:42:45 +10:30 |
|
zilmar
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a38467cc19
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Core: Reset Memory Stack Pos In recompiler after running interpter code at non rdram location
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2024-10-17 18:40:37 +10:30 |
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zilmar
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f708e5c0b2
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Core: Check recompiler memory based on the function size
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2024-10-17 15:05:48 +10:30 |
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zilmar
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45e52e1d2a
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Core: in SPECIAL_SYSCALL, SPECIAL_BREAK only exit the block is the stage is PIPELINE_STAGE_NORMAL
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2024-10-17 14:12:46 +10:30 |
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zilmar
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ccf708751f
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Core: Fix up clang error
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2024-10-11 07:09:03 +10:30 |
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Squall Leonhart
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0d95a0cd7f
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quick dirty possible fix for MBC5 roms of 4 and 8MB size. (#2442)
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2024-10-10 18:04:31 +10:30 |
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zilmar
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a2e479a705
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Core: Handle paths with non-ASCII characters
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2024-10-10 18:01:10 +10:30 |
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zilmar
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7aa77a3840
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Merge branch 'develop' of https://github.com/project64/project64 into develop
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2024-10-10 18:00:12 +10:30 |
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zilmar
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c176f61aac
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Core: Normalize Plugin dir
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2024-10-10 10:12:53 +10:30 |
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Squall Leonhart
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fc23fca43e
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[RDB]Set SGB Emulator to 8MB (#2440)
since the defaults for rdram changed between 6058 and 6059, i had not accounted for this emulator rom actually needing 8MB
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2024-10-03 22:20:51 +09:30 |