zilmar
|
25e48405c5
|
RSP: Start to split out RSP in to core and UI for plugin
|
2023-08-10 10:27:11 +09:30 |
|
zilmar
|
bb5a16aaa2
|
RSP: Change RSP Registers to be an enum not define
|
2023-08-10 09:47:53 +09:30 |
|
zilmar
|
34d75780bf
|
Rsp: Update the element order in LSV, LLV, LRV
|
2023-08-03 17:32:40 +09:30 |
|
zilmar
|
05cd3a846b
|
Rsp: Update vmov
|
2023-08-03 17:27:58 +09:30 |
|
zilmar
|
bbe603c758
|
RSP: fix up lbv
|
2023-07-27 16:01:03 +09:30 |
|
zilmar
|
52e77bc4e0
|
RSP: Some clean up to lqv
|
2023-07-27 15:11:31 +09:30 |
|
zilmar
|
e1854e1589
|
RSP: Inline memory functions in to the opcodes
|
2023-07-27 13:23:53 +09:30 |
|
zilmar
|
5c65bebe9e
|
RSP: Update VAdd code (SQV/LQV order changed as well)
|
2023-07-21 07:25:17 +09:30 |
|
zilmar
|
2cf740565e
|
RSP: Add dummy vsut
|
2023-07-20 09:40:42 +09:30 |
|
zilmar
|
e88e827d64
|
RSP Add dummy LWV
|
2023-07-20 08:59:36 +09:30 |
|
zilmar
|
4265bdfb43
|
RSP: Add lwu
|
2023-07-18 10:04:54 +09:30 |
|
zilmar
|
bd357c65b0
|
RSP: fix vmov
|
2023-07-18 09:56:31 +09:30 |
|
zilmar
|
6e03d6ad7b
|
RSP: Add method to get element specifier index from the Vector
|
2023-07-18 07:55:06 +09:30 |
|
zilmar
|
97fccb1c36
|
RSP: Change EleSpec to be 16 and use .e instead of rs
|
2023-07-18 07:36:25 +09:30 |
|
zilmar
|
97fbbffee8
|
RSP: A little clean up of VABS
|
2023-07-18 07:27:49 +09:30 |
|
zilmar
|
ee452143ff
|
RSP: Change the name of the opcode that register ops use
|
2023-07-18 07:22:27 +09:30 |
|
zilmar
|
b7d7884e22
|
RSP: Make a class for the RSP Vector
|
2023-07-13 21:09:18 +09:30 |
|
zilmar
|
fbb388fa0f
|
Rsp: Fix capitalization in rsp_UnknownOpcode
|
2023-07-06 20:51:17 +09:30 |
|
zilmar
|
02da0ccad1
|
RSP: Use bool instead of Boolean
|
2023-06-29 12:29:07 +09:30 |
|
zilmar
|
2ce9eaa667
|
RSP: Rename Types.h to RspTypes.h
|
2023-06-29 11:03:55 +09:30 |
|
zilmar
|
080a3b69ac
|
RSP: Create a RSP instruction for decoding the RSP op
|
2023-06-15 21:09:44 +09:30 |
|
zilmar
|
ef24ec11d8
|
Rename RSP to Project64-rsp
|
2023-06-15 14:45:27 +09:30 |