zilmar
2014237ed6
Core: Update Round.w.s, trunc.w.s, ceil.w.s, floor.w.s to work with exceptions in the recompiler
2024-02-08 19:34:14 +10:30
zilmar
ad1a2a2d9a
Core: Update neg.s for the recompiler
2024-02-01 18:17:03 +10:30
zilmar
b6671adf5d
Core: Update abs.s for recompiler
2024-02-01 18:15:33 +10:30
zilmar
bc3fe0fe16
Core: Handle FP Status Reg being mapped better
2024-01-25 18:46:39 +10:30
zilmar
7707f9c7b2
Core: Fix up mov.s and mov.d for correct behaviour in the recompiler
2024-01-25 16:25:06 +10:30
zilmar
272144dc37
Core: check timer on cop1 unusable
2024-01-25 16:23:03 +10:30
zilmar
f0f44c67f4
Core: Make mov.s the same as mov.d
2024-01-25 15:32:56 +10:30
zilmar
7ed94b653e
Core: Get CX86RecompilerOps::COP1_S_CVT_D to be able to work with exceptions
2024-01-18 17:09:27 +10:30
zilmar
2231e8d6c0
Core: Remove usage of fpclassify from R4300iOp::CheckFPUResult64
2024-01-18 16:53:14 +10:30
zilmar
71067ccdc4
Rsp: Change how SP_SEMAPHORE_REG to how it use to be before adding multithread RSP
2024-01-11 18:17:05 +10:30
zilmar
5c56f9df83
RSP: Update the size of the skip in the length for DMA
2024-01-11 17:50:23 +10:30
zilmar
4dc3e35bb4
Core: Update CX86RecompilerOps::COP1_S_SQRT to work with fpu exceptions
2024-01-04 16:51:11 +10:30
zilmar
f8089f565e
Core: Unmap FPU_Float with writing to m_FPR_UDW
2024-01-04 14:40:42 +10:30
zilmar
552b8f744a
Core: update Format_Name to match FPU_STATE
2024-01-04 13:11:21 +10:30
zilmar
6ca8333d39
Core: Get CX86RecompilerOps::COP1_S_CMP to work with exceptions
2024-01-04 12:39:51 +10:30
zilmar
c9d2bbd221
Core: CX86RecompilerOps::COP1_CF should be able use the mapped FPStatusReg if is mapped
2024-01-04 12:37:06 +10:30
zilmar
0998f0ff0e
Core: Add being able to get FPU_FloatLow from CX86RegInfo::FPRValuePointer
2024-01-04 12:32:55 +10:30
zilmar
23cff4d7c5
Core: Add x86 asm opcode Jnp
2024-01-04 12:31:26 +10:30
zilmar
91a8a828d7
Core: CX86RegInfo::FPRValuePointer when the format is FPU_Dword it should be using m_FPR_UW
2024-01-04 12:01:21 +10:30
zilmar
320769d991
Core: CX86Ops::OrConstToVariable should be a dword_ptr not a word_ptr
2024-01-04 10:33:07 +10:30
zilmar
dafa1fb24d
Core: Have COP1_W_CVT_S handle the initialization of exceptions
2023-12-28 11:19:06 +10:30
zilmar
17288c90c0
Core: Reset pipeline in CX86RecompilerOps::CompileCheckFPUResult32
2023-12-28 10:23:18 +10:30
zilmar
e2306e3541
Core: Get COP1_S_CVT_W to handle inexact
2023-12-28 09:21:53 +10:30
zilmar
8399fdb893
Core: Clear the Divide-by-zero flag
2023-12-21 21:24:33 +10:30
zilmar
d14a639a62
Core: Implement COP1_S_DIV with fpu exceptions
2023-12-21 14:11:29 +10:30
zilmar
8e54ec8c8e
Core: CompileCheckFPUInput32 and CompileCheckFPUResult32 should not be updating esp since using callthis
2023-12-21 14:10:21 +10:30
zilmar
b263ee10b0
Core: In CX86RecompilerOps::CompileLoadMemoryValue instead of checking write to rt being 0 instead use WritesGPR() since LDC1 F0 rt is 0 but it is not writing to r0
2023-12-21 10:41:16 +10:30
zilmar
1810bfda5c
Core: Handle unaligned CX86RecompilerOps::CompileLoadMemoryValue for 64bit ops
2023-12-21 10:38:49 +10:30
zilmar
2c1610cfe2
Core: fix up some of the commented out debugging code in CX86RecompilerOps::PreCompileOpcode
2023-12-21 10:37:27 +10:30
zilmar
6610ae3058
Core: Have R4300iInstruction in CRecompilerOpsBase
2023-12-21 10:34:03 +10:30
zilmar
8e3fb3e302
Core: Have R4300iInstruction::WritesGPR return the register written to instead of passing a variable by reference
2023-12-21 10:26:10 +10:30
zilmar
c8e73ba18e
Core: Handle unaligned SW exception in the recompiler
2023-12-14 23:04:26 +10:30
zilmar
972943cff7
Core: Allow LW to R0 be able to generate an exception
2023-12-14 17:21:52 +10:30
zilmar
89a6eaf9d1
Core: Add RecordLLAddress for 32bit register pointer
2023-12-14 13:52:15 +10:30
zilmar
67f5e4f854
Core: in LL for recompiler handle storing the address in COP[17]
2023-12-14 13:10:20 +10:30
zilmar
d5a5f4cdac
Core: Have Store Instruc rdb and user rdb matching
2023-12-14 12:21:03 +10:30
zilmar
5fec3f8d31
Core: remove the global of g_TLB
2023-12-14 12:09:24 +10:30
zilmar
c67f3f0e97
Core: Have UpdateSyncCPU use its Sync cpu instead of passing a cpu to it
2023-12-14 11:18:07 +10:30
zilmar
236d618c20
Artwork: Add Project64 logo
2023-12-07 17:49:26 +10:30
zilmar
15175d3fe2
Core: Fix bug in not creating save state correctly
2023-12-07 17:43:48 +10:30
zilmar
10b550bb63
Android: Start to get controller working
2023-12-07 16:14:04 +10:30
zilmar
de1288bdca
Core: remove try/catch around Interpreter cpu
2023-11-30 21:15:14 +10:30
zilmar
df56964c96
Android: Remove unneeded log call
2023-11-30 21:13:27 +10:30
zilmar
5671f2b759
Android: Update how Addu cause android studio was not sign extending result
2023-11-30 21:12:53 +10:30
zilmar
da092545e6
Android: Add requestLegacyExternalStorage
2023-11-30 15:29:36 +10:30
zilmar
d0445eb5cc
Android: switch icons from png to svg
2023-11-30 14:03:38 +10:30
Dark
85f580950b
Update Brazilian Portuguese.pj.Lang ( #2373 )
...
* Update Brazilian Portuguese.pj.Lang
General cleanup, fixing some serious grammatical mistakes and incorrect terms from the previous commit. To name a few:
- Only proper nouns are capitalized, not all words.
- Save State is not a proper noun, so it must be translated.
- Screenshot is always translated to "captura de tela".
- Slot can be translated to "compartimento".
- "Pra" is not grammatically acceptable.
- Translating Resume to "resumir" is a rookie mistake.
* Update Brazilian Portuguese.pj.Lang
* Update Brazilian Portuguese.pj.Lang
2023-11-23 22:55:12 +10:30
Derek "Turtle" Roe
acbb8f85a8
Fix typo in support window code ( #2395 )
...
* Fix typo in support window
* Fix the typo for real
2023-11-23 22:54:19 +10:30
zilmar
ceaa05c317
Android: Change how PACKAGE_DIRECTORY is retrieved
2023-11-23 18:37:55 +10:30
zilmar
01673dac8d
Core: Change TriggerAddressException to SetVPN an R of entry hi in one call
2023-11-23 14:20:48 +10:30