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Core: Have R4300iInstruction::WritesGPR return the register written to instead of passing a variable by reference

This commit is contained in:
zilmar 2023-12-21 10:26:10 +10:30
parent c8e73ba18e
commit 8e3fb3e302
4 changed files with 10 additions and 18 deletions
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19
Source/Project64-core/N64System/Mips/R4300iInstruction.cpp
View File

@ -97,9 +97,8 @@ bool R4300iInstruction::DelaySlotEffectsCompare(uint32_t DelayInstruction) const
}
return false;
}
uint32_t WriteReg = 0, ReadReg1 = 0, ReadReg2 = 0;
uint32_t WriteReg = DelaySlot.WritesGPR(), ReadReg1 = 0, ReadReg2 = 0;
ReadsGPR(ReadReg1, ReadReg2);
DelaySlot.WritesGPR(WriteReg);
if (WriteReg != 0 && (WriteReg == ReadReg1 || WriteReg == ReadReg2))
{
return true;
@ -176,7 +175,7 @@ void R4300iInstruction::ReadsGPR(uint32_t & Reg1, uint32_t & Reg2) const
Reg2 = 0;
}
void R4300iInstruction::WritesGPR(uint32_t & nReg) const
uint32_t R4300iInstruction::WritesGPR(void) const
{
uint32_t op = m_Instruction.op;
if (op == R4300i_SPECIAL)
@ -184,30 +183,26 @@ void R4300iInstruction::WritesGPR(uint32_t & nReg) const
uint32_t fn = m_Instruction.funct;
if (fn >= R4300i_SPECIAL_SLL && fn <= R4300i_SPECIAL_SRAV || fn >= R4300i_SPECIAL_DSLLV && fn <= R4300i_SPECIAL_DSRAV || fn >= R4300i_SPECIAL_DIVU && fn <= R4300i_SPECIAL_DSUBU || fn >= R4300i_SPECIAL_DSLL && fn <= R4300i_SPECIAL_DSRA32 || fn == R4300i_SPECIAL_JALR || fn == R4300i_SPECIAL_MFLO || fn == R4300i_SPECIAL_MFHI)
{
nReg = m_Instruction.rd;
return;
return m_Instruction.rd;
}
}
else if (op == R4300i_REGIMM)
{
if (op >= R4300i_REGIMM_BLTZAL && op <= R4300i_REGIMM_BGEZALL)
{
nReg = 31; // RA
return;
return 31; // RA
}
}
else if (op >= R4300i_DADDI && op <= R4300i_LWU || op >= R4300i_ADDI && op <= R4300i_LUI || op == R4300i_LL || op == R4300i_LD || (op == R4300i_CP0 && m_Instruction.fmt == R4300i_COP0_MF) || (op == R4300i_CP1 && m_Instruction.fmt == R4300i_COP1_MF) || (op == R4300i_CP1 && m_Instruction.fmt == R4300i_COP1_CF))
{
nReg = m_Instruction.rt;
return;
return m_Instruction.rt;
}
if (op == R4300i_JAL)
{
nReg = 31; // RA
return;
return 31; // RA
}
nReg = 0;
return (uint32_t)-1;
}
bool R4300iInstruction::ReadsHI() const

2
Source/Project64-core/N64System/Mips/R4300iInstruction.h
View File

@ -14,7 +14,7 @@ public:
bool HasDelaySlot(void) const;
bool DelaySlotEffectsCompare(uint32_t DelayInstruction) const;
void ReadsGPR(uint32_t & Reg1, uint32_t & Reg2) const;
void WritesGPR(uint32_t & nReg) const;
uint32_t WritesGPR(void) const;
bool ReadsHI() const;
bool ReadsLO() const;
bool WritesHI() const;

3
Source/Project64/UserInterface/Debugger/Debugger-RegisterTabs.cpp
View File

@ -508,10 +508,9 @@ INT_PTR CALLBACK CRegisterTabs::TabProcGPR(HWND hDlg, UINT msg, WPARAM wParam, L
return (LRESULT)GetStockObject(DC_BRUSH);
}
uint32_t nRegRead1, nRegRead2, nRegWrite;
uint32_t nRegRead1, nRegRead2, nRegWrite = opInfo.WritesGPR();
opInfo.ReadsGPR(nRegRead1, nRegRead2);
opInfo.WritesGPR(nRegWrite);
bOpReads = ((uint32_t)nReg == nRegRead1) || ((uint32_t)nReg == nRegRead2);
bOpWrites = ((uint32_t)nReg == nRegWrite);

4
Source/Project64/UserInterface/Debugger/Debugger.cpp
View File

@ -643,9 +643,7 @@ void CDebuggerUI::CPUStepStarted()
if (m_Breakpoints->HaveAnyGPRWriteBP())
{
uint32_t nReg = 0;
opInfo.WritesGPR(nReg);
uint32_t nReg = opInfo.WritesGPR();
if (nReg != 0 && m_Breakpoints->HaveGPRWriteBP(nReg))
{
g_Settings->SaveBool(Debugger_SteppingOps, true);