zilmar
|
825f786c58
|
RSP: Add RspCodeBlock and update RSPInstruction
|
2025-06-12 21:22:54 +09:30 |
|
zilmar
|
d9c9973a0e
|
core: a little bit of code clean up
|
2025-05-15 11:52:39 +09:30 |
|
zilmar
|
6ba97eb4eb
|
Start to add AsmJitLite
|
2025-04-24 21:55:17 +09:30 |
|
zilmar
|
2c2060248d
|
RSP: Fix up profiling tasks
|
2025-04-17 17:06:17 +09:30 |
|
zilmar
|
8c751cc22f
|
rsp: fix up the code so it compiles on x86
|
2025-04-11 18:59:30 +09:30 |
|
zilmar
|
14f033bce4
|
Rsp: Start to work on x64 compiling tasks
|
2025-04-11 15:33:04 +09:30 |
|
zilmar
|
7d24088e8a
|
RSP: move isNop into RSPInstruction
|
2025-03-28 19:15:51 +10:30 |
|
zilmar
|
1a83c9b120
|
RSP: Move IsBranch into RSPInstruction
|
2025-03-28 12:43:38 +10:30 |
|
zilmar
|
0c0a46c1e0
|
RSP: Rename RspRecompilerCPU to RspRecompilerCPU-x86
|
2025-03-28 09:07:26 +10:30 |
|
zilmar
|
5e89701fdf
|
RSP: Remove recompiler from x64, and remove hle tasks from x86
|
2025-03-13 17:56:17 +10:30 |
|
zilmar
|
b9fe8e3657
|
Fix compile issues
|
2024-12-07 07:04:22 +10:30 |
|
zilmar
|
8392ea5c0f
|
Core fix up load states
|
2024-12-06 21:50:31 +10:30 |
|
zilmar
|
cd9fc5984a
|
RSP: Make sure m_SyncSystem is valid before checking m_SyncSystem->m_BaseSystem on shutdown
|
2024-09-26 06:50:48 +09:30 |
|
zilmar
|
c098a6a464
|
RSP: Be able to compile sections based off tasks
|
2024-09-19 12:15:11 +09:30 |
|
zilmar
|
df9b04bb5b
|
RSP: Change RunInterpreterCPU to ExecuteOps
|
2024-09-12 15:13:45 +09:30 |
|
zilmar
|
eb985de132
|
RSP: Start to add CPU style HLE
|
2024-08-29 15:37:52 +09:30 |
|
zilmar
|
5eac210197
|
RSP: Start to have a RSP Settings class
|
2024-08-29 11:26:53 +09:30 |
|
zilmar
|
96080bfdd2
|
RSP: change CRSPSystem::m_Recompiler from a pointer to a member and initialize it at creation of system
|
2024-08-29 07:49:40 +09:30 |
|
zilmar
|
2b7975280e
|
RSP: Have NextInstruction and JumpTo members of RSP System instead of a global variable
|
2024-08-22 19:44:07 +09:30 |
|
zilmar
|
29c49a2063
|
RSP: Remove PrgCount as a global
|
2024-08-22 17:32:05 +09:30 |
|
zilmar
|
d9ae43b69d
|
RSP: have RSPRegisterHandlerPlugin as part of RSP System instead of a global
|
2024-08-22 16:30:20 +09:30 |
|
zilmar
|
4681f07bf8
|
RSP: Move rdp logging in to it's own class
|
2024-08-15 13:43:56 +09:30 |
|
zilmar
|
6ed1c3edfb
|
RSP: internalize RSP information in to interpter ops
|
2024-08-15 07:36:53 +09:30 |
|
zilmar
|
9f98f4d4cd
|
Rsp: Change RSPOpC to be a class member
|
2024-08-08 12:55:54 +09:30 |
|
zilmar
|
762d1b1566
|
RSP: Create CRSPRecompiler
|
2024-08-08 09:39:45 +09:30 |
|
zilmar
|
f7ab608976
|
RSP: Create CRSPRegisters
|
2024-08-08 07:26:15 +09:30 |
|
zilmar
|
2904d3641d
|
RSP: Create RSP system class and move all interpter ops in to RSPOp class
|
2024-08-02 09:00:38 +09:30 |
|
zilmar
|
dab432e7bd
|
RSP: clean up LDV
|
2024-07-20 19:10:36 +09:30 |
|
zilmar
|
7b013c3deb
|
RSP: Reset secondary buffer to start on ResetJumpTables
|
2024-07-12 14:59:16 +09:30 |
|
zilmar
|
1af8570315
|
RSP: Set max log size as 300mb
|
2024-07-06 18:51:55 +09:30 |
|
zilmar
|
661ec98bb3
|
RSP: User crc32 for crc of imem
|
2024-06-27 16:25:13 +09:30 |
|
zilmar
|
71067ccdc4
|
Rsp: Change how SP_SEMAPHORE_REG to how it use to be before adding multithread RSP
|
2024-01-11 18:17:05 +10:30 |
|
zilmar
|
5c56f9df83
|
RSP: Update the size of the skip in the length for DMA
|
2024-01-11 17:50:23 +10:30 |
|
zilmar
|
0c8b10bbc7
|
Android: Get RSP core to compile on android
|
2023-11-09 11:53:06 +10:30 |
|
zilmar
|
6fbc5c0264
|
Android: Move hle audio code in to main rsp plugin
|
2023-11-02 20:06:58 +10:30 |
|
zilmar
|
a975af0e3c
|
Rsp: only use alignas for Visual Studio
|
2023-09-28 16:18:39 +09:30 |
|
zilmar
|
dd7ec63dd9
|
Rsp: Change usage of alignas to try and fix android build
|
2023-09-28 15:53:46 +09:30 |
|
zilmar
|
46e6e54f24
|
RSP: improve running RSP multithreaded
|
2023-09-28 14:46:36 +09:30 |
|
zilmar
|
15e6e460d2
|
Rsp: Clean up VRCP, VRCPL, VRCPH, VRSQ, VRSQL, VRSQH
|
2023-09-28 13:39:23 +09:30 |
|
zilmar
|
3c52d8e2e3
|
RSP: use vt instead of rt when using RSP_Vect
|
2023-09-28 11:57:29 +09:30 |
|
zilmar
|
0bd6a96118
|
RSP: fix display of VRCP instruction
|
2023-09-28 11:54:50 +09:30 |
|
zilmar
|
b1240072c6
|
RSP: move Enter_RSP_Register_Window & UpdateRSPRegistersScreen function definition out of RSP core
|
2023-09-28 11:53:57 +09:30 |
|
zilmar
|
ac3e0f83d1
|
Rsp: Use RSP Register Handler
|
2023-09-28 11:52:06 +09:30 |
|
zilmar
|
f817becf9c
|
Core: Create a handler for RSP registers that is accessible to the core and the RSP
|
2023-09-28 07:03:01 +09:30 |
|
zilmar
|
32ff820a03
|
RSP: clean up vector compare ops (VLT, VEQ, VNE, VGE, VCH)
|
2023-09-21 15:51:16 +09:30 |
|
zilmar
|
dc95d2f7a4
|
RSP: Clean up vector ops (VADD, VSUB, VABS, VSUBC, VMRG, VAND, VNAND, VOR, VNOR, VXOR, VNXOR)
|
2023-09-21 15:44:07 +09:30 |
|
zilmar
|
174e751a4a
|
RSP: Fix up load ops (LUV, LHV, LFV, LTV)
|
2023-09-21 15:30:07 +09:30 |
|
zilmar
|
bdaf8cf78c
|
RSP: Clean up store vector ops (SHV, SFV, STV, SWV)
|
2023-09-21 15:25:45 +09:30 |
|
zilmar
|
5dcc7e200f
|
Rsp: Move InitilizeRSPRegisters and InitilizeRSP into rsp-core
|
2023-09-21 15:16:26 +09:30 |
|
zilmar
|
002f2e17c3
|
RSP: Clean up code for vector multiple ops
|
2023-09-07 11:54:36 +09:30 |