zilmar
|
c098a6a464
|
RSP: Be able to compile sections based off tasks
|
2024-09-19 12:15:11 +09:30 |
|
zilmar
|
aaa6fc8082
|
Core: Add $(Platform) to the output directory
|
2024-09-05 17:54:58 +09:30 |
|
zilmar
|
eb985de132
|
RSP: Start to add CPU style HLE
|
2024-08-29 15:37:52 +09:30 |
|
zilmar
|
5eac210197
|
RSP: Start to have a RSP Settings class
|
2024-08-29 11:26:53 +09:30 |
|
zilmar
|
29c49a2063
|
RSP: Remove PrgCount as a global
|
2024-08-22 17:32:05 +09:30 |
|
zilmar
|
4681f07bf8
|
RSP: Move rdp logging in to it's own class
|
2024-08-15 13:43:56 +09:30 |
|
zilmar
|
9f98f4d4cd
|
Rsp: Change RSPOpC to be a class member
|
2024-08-08 12:55:54 +09:30 |
|
zilmar
|
f7ab608976
|
RSP: Create CRSPRegisters
|
2024-08-08 07:26:15 +09:30 |
|
zilmar
|
661ec98bb3
|
RSP: User crc32 for crc of imem
|
2024-06-27 16:25:13 +09:30 |
|
zilmar
|
6fbc5c0264
|
Android: Move hle audio code in to main rsp plugin
|
2023-11-02 20:06:58 +10:30 |
|
zilmar
|
7e249d22b1
|
Try to fix android build
|
2023-09-28 15:25:34 +09:30 |
|
zilmar
|
b1240072c6
|
RSP: move Enter_RSP_Register_Window & UpdateRSPRegistersScreen function definition out of RSP core
|
2023-09-28 11:53:57 +09:30 |
|
zilmar
|
ac3e0f83d1
|
Rsp: Use RSP Register Handler
|
2023-09-28 11:52:06 +09:30 |
|
zilmar
|
bd1ec4ff0f
|
Core: Create a setting for RDRAM Size that plugins can read
|
2023-09-28 07:29:11 +09:30 |
|
zilmar
|
5dcc7e200f
|
Rsp: Move InitilizeRSPRegisters and InitilizeRSP into rsp-core
|
2023-09-21 15:16:26 +09:30 |
|
zilmar
|
42a944c660
|
RSP: Setup option to run in a thread
|
2023-09-21 14:25:07 +09:30 |
|
zilmar
|
4f74dc4bb0
|
Rsp: Update display of vector in debugger
|
2023-09-07 11:17:08 +09:30 |
|
zilmar
|
0cb43e0c33
|
RSP: Remove flag to swap vector register endian
|
2023-08-24 07:04:35 +09:30 |
|
zilmar
|
54be4d8135
|
Rsp: Add a rsp AccurateEmulation flag for new rsp work
|
2023-08-17 12:04:06 +09:30 |
|
zilmar
|
6b30c1ae6a
|
Rsp: Move Recompiler in to rsp-core
|
2023-08-17 08:59:22 +09:30 |
|
zilmar
|
60192a7f33
|
RSP: Move more functionality in to rsp-core
|
2023-08-10 14:16:57 +09:30 |
|
zilmar
|
25e48405c5
|
RSP: Start to split out RSP in to core and UI for plugin
|
2023-08-10 10:27:11 +09:30 |
|
zilmar
|
bb5a16aaa2
|
RSP: Change RSP Registers to be an enum not define
|
2023-08-10 09:47:53 +09:30 |
|
zilmar
|
34d75780bf
|
Rsp: Update the element order in LSV, LLV, LRV
|
2023-08-03 17:32:40 +09:30 |
|
zilmar
|
a18f78679e
|
Rsp: Change the order of EleSpec
|
2023-08-03 17:29:55 +09:30 |
|
zilmar
|
05cd3a846b
|
Rsp: Update vmov
|
2023-08-03 17:27:58 +09:30 |
|
Squall Leonhart
|
822b75c734
|
changes this callback back to BOOL so it works again. (#2378)
|
2023-07-28 06:57:31 +09:30 |
|
zilmar
|
bbe603c758
|
RSP: fix up lbv
|
2023-07-27 16:01:03 +09:30 |
|
zilmar
|
52e77bc4e0
|
RSP: Some clean up to lqv
|
2023-07-27 15:11:31 +09:30 |
|
zilmar
|
e1854e1589
|
RSP: Inline memory functions in to the opcodes
|
2023-07-27 13:23:53 +09:30 |
|
zilmar
|
5c65bebe9e
|
RSP: Update VAdd code (SQV/LQV order changed as well)
|
2023-07-21 07:25:17 +09:30 |
|
zilmar
|
2cf740565e
|
RSP: Add dummy vsut
|
2023-07-20 09:40:42 +09:30 |
|
zilmar
|
e88e827d64
|
RSP Add dummy LWV
|
2023-07-20 08:59:36 +09:30 |
|
zilmar
|
cf7628cc1d
|
RSP: Update RSP_LRV_DMEM
|
2023-07-18 10:05:25 +09:30 |
|
zilmar
|
4265bdfb43
|
RSP: Add lwu
|
2023-07-18 10:04:54 +09:30 |
|
zilmar
|
bd357c65b0
|
RSP: fix vmov
|
2023-07-18 09:56:31 +09:30 |
|
zilmar
|
6e03d6ad7b
|
RSP: Add method to get element specifier index from the Vector
|
2023-07-18 07:55:06 +09:30 |
|
zilmar
|
97fccb1c36
|
RSP: Change EleSpec to be 16 and use .e instead of rs
|
2023-07-18 07:36:25 +09:30 |
|
zilmar
|
97fbbffee8
|
RSP: A little clean up of VABS
|
2023-07-18 07:27:49 +09:30 |
|
zilmar
|
ee452143ff
|
RSP: Change the name of the opcode that register ops use
|
2023-07-18 07:22:27 +09:30 |
|
zilmar
|
b7d7884e22
|
RSP: Make a class for the RSP Vector
|
2023-07-13 21:09:18 +09:30 |
|
zilmar
|
353ef5ed89
|
RSP: When command window is entered, always step commands
|
2023-07-06 20:56:00 +09:30 |
|
zilmar
|
115881524b
|
RSP: Better handling on unaligned SH and SW
|
2023-07-06 20:55:02 +09:30 |
|
zilmar
|
fbb388fa0f
|
Rsp: Fix capitalization in rsp_UnknownOpcode
|
2023-07-06 20:51:17 +09:30 |
|
zilmar
|
7dc30b1d6d
|
RSP: Update dissam of load/store vector ops
|
2023-07-06 17:49:15 +09:30 |
|
zilmar
|
f8f9688386
|
RSP: get RSP_LH_DMEM and RSP_LW_DMEM to handle end of memory roll over
|
2023-06-29 14:52:46 +09:30 |
|
zilmar
|
cfc63532dd
|
RSP: move p_func from RspTypes.h to Cpu.h
|
2023-06-29 12:31:25 +09:30 |
|
zilmar
|
02da0ccad1
|
RSP: Use bool instead of Boolean
|
2023-06-29 12:29:07 +09:30 |
|
zilmar
|
2ce9eaa667
|
RSP: Rename Types.h to RspTypes.h
|
2023-06-29 11:03:55 +09:30 |
|
zilmar
|
1c61f15ea9
|
RSP: Update display of vector ops
|
2023-06-29 10:59:54 +09:30 |