2009-09-08 12:08:10 +00:00
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/* PCSX2 - PS2 Emulator for PCs
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2010-05-03 14:08:02 +00:00
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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2009-09-21 09:48:31 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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2009-02-09 21:15:56 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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2009-02-09 21:15:56 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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2009-02-09 21:15:56 +00:00
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*/
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2009-08-04 08:21:10 +00:00
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#pragma once
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2009-02-09 21:15:56 +00:00
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#include "Common.h"
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2009-09-23 12:11:37 +00:00
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#include "System/SysThreads.h"
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2011-07-24 13:02:50 +00:00
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#include "Gif.h"
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2021-05-11 14:31:20 +00:00
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#include "GS/GS.h"
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2021-12-18 14:43:50 +00:00
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#include <functional>
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2009-02-09 21:15:56 +00:00
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2021-08-30 07:10:48 +00:00
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extern double GetVerticalFrequency();
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2021-09-03 06:23:59 +00:00
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alignas(16) extern u8 g_RealGSMem[Ps2MemSize::GSregs];
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2009-09-23 09:53:21 +00:00
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2010-06-26 07:26:43 +00:00
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enum CSR_FifoState
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2009-12-08 13:10:08 +00:00
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{
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2010-06-26 07:26:43 +00:00
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CSR_FIFO_NORMAL = 0, // Somwhere in between (Neither empty or almost full).
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CSR_FIFO_EMPTY, // Empty
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CSR_FIFO_FULL, // Almost Full
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CSR_FIFO_RESERVED // Reserved / Unused.
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2009-12-08 13:10:08 +00:00
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};
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2010-06-26 07:26:43 +00:00
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// --------------------------------------------------------------------------------------
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// tGS_CSR
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// --------------------------------------------------------------------------------------
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// This is the Control Register for the GS. It is a dual-instance register that returns
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// distinctly different values for most fields when read and written. In PCSX2 we house
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// the written version in the gsRegs buffer, and generate the readback version on-demand
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// from various other PCSX2 system statuses.
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2009-12-08 13:10:08 +00:00
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union tGS_CSR
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{
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2010-06-26 07:26:43 +00:00
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struct
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{
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// Write:
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// 0 - No action;
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// 1 - Old event is cleared and event is enabled.
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// Read:
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// 0 - No SIGNAL pending.
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// 1 - SIGNAL has been generated.
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u64 SIGNAL :1;
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// Write:
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// 0 - No action;
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// 1 - FINISH event is enabled.
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// Read:
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// 0 - No FINISH event pending.
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// 1 - FINISH event has been generated.
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u64 FINISH :1;
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// Hsync Interrupt Control
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// Write:
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// 0 - No action;
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// 1 - Hsync interrupt is enabled.
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// Read:
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// 0 - No Hsync interrupt pending.
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// 1 - Hsync interrupt has been generated.
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u64 HSINT :1;
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// Vsync Interrupt Control
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// Write:
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// 0 - No action;
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// 1 - Vsync interrupt is enabled.
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// Read:
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// 0 - No Vsync interrupt pending.
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// 1 - Vsync interrupt has been generated.
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u64 VSINT :1;
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// Rect Area Write Termination Control
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// 0 - No action;
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// 1 - Rect area write interrupt is enabled.
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// Read:
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// 0 - No RAWrite interrupt pending.
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// 1 - RAWrite interrupt has been generated.
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u64 EDWINT :1;
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u64 _zero1 :1;
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u64 _zero2 :1;
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u64 pad1 :1;
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// FLUSH (write-only!)
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// Write:
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// 0 - Resume drawing if suspended (?)
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// 1 - Flush the GS FIFO and suspend drawing
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// Read: Always returns 0. (?)
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u64 FLUSH :1;
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// RESET (write-only!)
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// Write:
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// 0 - Do nothing.
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// 1 - GS soft system reset. Clears FIFOs and resets IMR to all 1's.
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// (PCSX2 implementation also clears GIFpaths, though that behavior may differ on real HW).
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// Read: Always returns 0. (?)
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u64 RESET :1;
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u64 _pad2 :2;
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// (I have no idea what this reg is-- air)
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// Output value is updated by sampling the VSync. (?)
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u64 NFIELD :1;
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// Current Field of Display [page flipping] (read-only?)
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// 0 - EVEN
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// 1 - ODD
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u64 FIELD :1;
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// GS FIFO Status (read-only)
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// 00 - Somewhere in between
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// 01 - Empty
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// 10 - Almost Full
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// 11 - Reserved (unused)
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// Assign values using the CSR_FifoState enum.
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u64 FIFO :2;
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// Revision number of the GS (fairly arbitrary)
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u64 REV :8;
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// ID of the GS (also fairly arbitrary)
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u64 ID :8;
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};
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u64 _u64;
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struct
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2009-12-08 13:10:08 +00:00
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{
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2010-06-26 07:26:43 +00:00
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u32 _u32; // lower 32 bits (all useful content!)
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u32 _unused32; // upper 32 bits (unused -- should probably be 0)
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2009-12-08 13:10:08 +00:00
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};
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2010-04-25 00:31:27 +00:00
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2010-06-26 07:26:43 +00:00
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void SwapField()
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{
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_u32 ^= 0x2000;
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}
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2010-04-25 00:31:27 +00:00
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2010-06-26 07:26:43 +00:00
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void Reset()
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2009-12-08 13:10:08 +00:00
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{
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2010-06-26 07:26:43 +00:00
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_u64 = 0;
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FIFO = CSR_FIFO_EMPTY;
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REV = 0x1B; // GS Revision
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ID = 0x55; // GS ID
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2009-12-08 13:10:08 +00:00
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}
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2010-04-25 00:31:27 +00:00
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2010-06-26 07:26:43 +00:00
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bool HasAnyInterrupts() const { return (SIGNAL || FINISH || HSINT || VSINT || EDWINT); }
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2010-04-25 00:31:27 +00:00
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2010-06-26 07:26:43 +00:00
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u32 GetInterruptMask() const
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{
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return _u32 & 0x1f;
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}
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void SetAllInterrupts(bool value=true)
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2009-12-08 13:10:08 +00:00
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{
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SIGNAL = FINISH = HSINT = VSINT = EDWINT = value;
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}
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2010-04-25 00:31:27 +00:00
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2009-12-08 13:10:08 +00:00
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tGS_CSR(u64 val) { _u64 = val; }
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2010-06-26 07:26:43 +00:00
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tGS_CSR(u32 val) { _u32 = val; }
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tGS_CSR() { Reset(); }
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2009-12-08 13:10:08 +00:00
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};
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2010-06-26 07:26:43 +00:00
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// --------------------------------------------------------------------------------------
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// tGS_IMR
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// --------------------------------------------------------------------------------------
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2009-12-08 13:10:08 +00:00
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union tGS_IMR
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{
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2010-04-25 00:31:27 +00:00
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struct
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2009-12-08 13:10:08 +00:00
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{
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2010-06-26 07:26:43 +00:00
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u32 _reserved1 : 8;
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2016-12-01 11:01:48 +00:00
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u32 SIGMSK : 1; // Signal evevnt interrupt mask
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u32 FINISHMSK : 1; // Finish event interrupt mask
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u32 HSMSK : 1; // HSync interrupt mask
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u32 VSMSK : 1; // VSync interrupt mask
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u32 EDWMSK : 1; // Rectangle write termination interrupt mask
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u32 _undefined : 2; // undefined bits should be set to 1.
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2010-06-26 07:26:43 +00:00
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u32 _reserved2 : 17;
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2009-12-08 13:10:08 +00:00
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};
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u32 _u32;
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2010-06-26 07:26:43 +00:00
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2010-04-25 00:31:27 +00:00
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void reset()
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2009-12-08 13:10:08 +00:00
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{
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_u32 = 0;
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SIGMSK = FINISHMSK = HSMSK = VSMSK = EDWMSK = true;
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2010-06-26 07:26:43 +00:00
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_undefined = 0x3;
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2009-12-08 13:10:08 +00:00
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}
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void set(u32 value)
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{
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_u32 = (value & 0x1f00); // Set only the interrupt mask fields.
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2010-06-26 07:26:43 +00:00
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_undefined = 0x3; // These should always be set.
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2009-12-08 13:10:08 +00:00
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}
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2010-04-25 00:31:27 +00:00
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2010-06-26 07:26:43 +00:00
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bool masked() const { return (SIGMSK || FINISHMSK || HSMSK || VSMSK || EDWMSK); }
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};
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2016-10-20 14:39:35 +00:00
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// --------------------------------------------------------------------------------------
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// GSRegSMODE1
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// --------------------------------------------------------------------------------------
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PCSX2-Counters: Detect DVD variant videomodes
Improved the video mode detection code by also detecting the DVD variant video modes of NTSC & PAL, PSX mode actually make use of these specific variants, as well as the BIOS. Previously, I just had them as a single bios video mode due to laziness. (I know, my bad)
After further research, it seems that these DVD variant modes have their own individual VSync timing values similar to the standard NTSC & PAL video modes, dealing with those timer codes might be essential in getting timing accuracy of the PSX mode games. (I kept it to default NTSC/PAL values for now, interested people can mess with it later)
I had planned to do this before but there some were concerns that two different video modes make use of 0x73 gate in SetGsCrt, which was rather weird (how the heck could two video modes be used in a single param value?)
0x73- DVDPAL ( 720 x 480 @ ??.???Hz)
0x73- DVD480P ( 720 x 480 @ ??.???Hz)
Hence, we had decided to use the CMOD bit from SMODE1 (AKA color subcarrier frequency) to detect whether it's an analog or digital video mode and update the necessary timing values but seems like it's no longer necessary, after further discussions from some PS2 developers, we've come to the conclusion that only DVDPAL is possible via 0x73 in SetGsCrt. (So I assume the DVD480p init possibility was fake info from Blue and those other GSM guys who were reverse engineering the PS2)
2017-04-19 15:23:23 +00:00
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// Previously, the union was used to get the CMOD bit of the SMODE1 register
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// Commenting it out as it's unused right now. (Might potentially be useful in the future)
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//union GSRegSMODE1
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//{
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// struct
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// {
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// u32 RC : 3;
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// u32 LC : 7;
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// u32 T1248 : 2;
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// u32 SLCK : 1;
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// u32 CMOD : 2;
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// u32 EX : 1;
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// u32 PRST : 1;
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// u32 SINT : 1;
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// u32 XPCK : 1;
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// u32 PCK2 : 2;
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// u32 SPML : 4;
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// u32 GCONT : 1;
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// u32 PHS : 1;
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// u32 PVS : 1;
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// u32 PEHS : 1;
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// u32 PEVS : 1;
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// u32 CLKSEL : 2;
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// u32 NVCK : 1;
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// u32 SLCK2 : 1;
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// u32 VCKSEL : 2;
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// u32 VHP : 1;
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// u32 _PAD1 : 27;
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// };
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//
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// u64 SMODE1;
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//};
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2016-10-20 14:39:35 +00:00
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2010-06-26 07:26:43 +00:00
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// --------------------------------------------------------------------------------------
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// GSRegSIGBLID
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// --------------------------------------------------------------------------------------
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struct GSRegSIGBLID
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{
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u32 SIGID;
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u32 LBLID;
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2009-12-08 13:10:08 +00:00
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};
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2009-09-23 09:53:21 +00:00
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#define PS2MEM_GS g_RealGSMem
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2010-06-26 07:26:43 +00:00
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#define PS2GS_BASE(mem) (PS2MEM_GS+(mem&0x13ff))
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2009-09-23 09:53:21 +00:00
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2010-06-26 07:26:43 +00:00
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#define CSRreg ((tGS_CSR&)*(PS2MEM_GS+0x1000))
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2009-12-08 13:10:08 +00:00
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2010-06-26 07:26:43 +00:00
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#define GSCSRr ((u32&)*(PS2MEM_GS+0x1000))
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2016-12-01 11:01:48 +00:00
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#define GSIMR ((tGS_IMR&)*(PS2MEM_GS+0x1010))
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2010-06-26 07:26:43 +00:00
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#define GSSIGLBLID ((GSRegSIGBLID&)*(PS2MEM_GS+0x1080))
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2009-02-09 21:15:56 +00:00
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2016-06-29 16:41:27 +00:00
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enum class GS_VideoMode : int
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2009-08-04 08:21:10 +00:00
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{
|
2016-07-01 11:37:55 +00:00
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Uninitialized,
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Unknown,
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2016-06-29 16:41:27 +00:00
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NTSC,
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PAL,
|
2016-07-01 11:37:55 +00:00
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VESA,
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2017-05-02 11:35:00 +00:00
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SDTV_480P,
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SDTV_576P,
|
2016-07-01 11:37:55 +00:00
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HDTV_720P,
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HDTV_1080I,
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HDTV_1080P,
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PCSX2-Counters: Detect DVD variant videomodes
Improved the video mode detection code by also detecting the DVD variant video modes of NTSC & PAL, PSX mode actually make use of these specific variants, as well as the BIOS. Previously, I just had them as a single bios video mode due to laziness. (I know, my bad)
After further research, it seems that these DVD variant modes have their own individual VSync timing values similar to the standard NTSC & PAL video modes, dealing with those timer codes might be essential in getting timing accuracy of the PSX mode games. (I kept it to default NTSC/PAL values for now, interested people can mess with it later)
I had planned to do this before but there some were concerns that two different video modes make use of 0x73 gate in SetGsCrt, which was rather weird (how the heck could two video modes be used in a single param value?)
0x73- DVDPAL ( 720 x 480 @ ??.???Hz)
0x73- DVD480P ( 720 x 480 @ ??.???Hz)
Hence, we had decided to use the CMOD bit from SMODE1 (AKA color subcarrier frequency) to detect whether it's an analog or digital video mode and update the necessary timing values but seems like it's no longer necessary, after further discussions from some PS2 developers, we've come to the conclusion that only DVDPAL is possible via 0x73 in SetGsCrt. (So I assume the DVD480p init possibility was fake info from Blue and those other GSM guys who were reverse engineering the PS2)
2017-04-19 15:23:23 +00:00
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DVD_NTSC,
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DVD_PAL
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2009-08-04 08:21:10 +00:00
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};
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|
2016-06-29 16:41:27 +00:00
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extern GS_VideoMode gsVideoMode;
|
2016-08-18 14:07:35 +00:00
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extern bool gsIsInterlaced;
|
2009-02-09 21:15:56 +00:00
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/////////////////////////////////////////////////////////////////////////////
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// MTGS Threaded Class Declaration
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// Uncomment this to enable the MTGS debug stack, which tracks to ensure reads
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// and writes stay synchronized. Warning: the debug stack is VERY slow.
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//#define RINGBUF_DEBUG_STACK
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2009-11-21 07:56:29 +00:00
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enum MTGS_RingCommand
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2009-02-09 21:15:56 +00:00
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{
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2021-08-30 07:10:48 +00:00
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GS_RINGTYPE_P1,
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GS_RINGTYPE_P2,
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GS_RINGTYPE_P3,
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|
|
GS_RINGTYPE_VSYNC,
|
|
|
|
GS_RINGTYPE_FRAMESKIP,
|
|
|
|
GS_RINGTYPE_FREEZE,
|
|
|
|
GS_RINGTYPE_RESET, // issues a GSreset() command.
|
|
|
|
GS_RINGTYPE_SOFTRESET, // issues a soft reset for the GIF
|
|
|
|
GS_RINGTYPE_CRC,
|
|
|
|
GS_RINGTYPE_GSPACKET,
|
|
|
|
GS_RINGTYPE_MTVU_GSPACKET,
|
|
|
|
GS_RINGTYPE_INIT_READ_FIFO1,
|
|
|
|
GS_RINGTYPE_INIT_READ_FIFO2,
|
2021-12-18 14:43:50 +00:00
|
|
|
GS_RINGTYPE_ASYNC_CALL,
|
2009-02-09 21:15:56 +00:00
|
|
|
};
|
|
|
|
|
2009-09-16 17:23:02 +00:00
|
|
|
|
|
|
|
struct MTGS_FreezeData
|
|
|
|
{
|
|
|
|
freezeData* fdata;
|
|
|
|
s32 retval; // value returned from the call, valid only after an mtgsWaitGS()
|
|
|
|
};
|
|
|
|
|
2021-12-18 14:43:50 +00:00
|
|
|
struct MTGS_MemoryScreenshotData
|
|
|
|
{
|
|
|
|
u32 width = 0;
|
|
|
|
u32 height = 0;
|
|
|
|
std::vector<u32> pixels; // width * height
|
|
|
|
bool success = false;
|
|
|
|
};
|
|
|
|
|
2009-11-23 06:54:24 +00:00
|
|
|
// --------------------------------------------------------------------------------------
|
|
|
|
// SysMtgsThread
|
|
|
|
// --------------------------------------------------------------------------------------
|
|
|
|
class SysMtgsThread : public SysThreadBase
|
2009-02-09 21:15:56 +00:00
|
|
|
{
|
User Interface:
* Fixed and added better Emulation/System menu updating. Suspend/Resume is more consistent, and Reset grays itself out after being used.
* Entering plugin configurations auto-suspends the emulator.
* Changing plugins in the Configuration PAnel takes effect now without a restart.
* Added preliminary support for an ExtensibleConfirmation Dialog box (contains a sizer you can add content to, and also has an optional "[x] Do not show this again" checkbox).
Bugfixes:
* Added some mutex protection to cdvdNewDiskCB; "just in case."
* Resolved several recursion and deadlock scenarios when (very!) rapidly suspending, resuming, and resetting the emu.
Developments / Code Cleanups:
* Renamed SysCoreThread ExecutionModes: Suspend/Resume are now Opened/Closed (which more accurately reflects the fact they opena nd close the plugins, and helps avoid ambiguity with the "Paused" state).
* Added Exception::ThreadTimedOut, which is now thrown from Semaphore::Wait when recursive wxApp::Yield() calls are detected, and a deadlock occurs (basically cancels the current action which, most of the time, allows for full recovery).
* Major Threading namespace cleanups, documentations, etc.
* Removed wxScopedArray (scopedarray.h) and replaced it with a better implemeneted ScopedArray class.
* Removed toUTF8 class, which I only added a couple weeks ago because I didn't realize wxCharBuffer had an implicit typecast to (char*).
* Implemented more Source/Listener events for Pcsx2App. CoreThread events are sourced properly now, and added SettingsApplied and SettingsLoadSave Sources.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2010 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-10-16 03:58:29 +00:00
|
|
|
typedef SysThreadBase _parent;
|
2009-02-09 21:15:56 +00:00
|
|
|
|
2009-11-24 08:43:36 +00:00
|
|
|
public:
|
2021-12-18 14:43:50 +00:00
|
|
|
using AsyncCallType = std::function<void()>;
|
|
|
|
|
2010-07-15 05:21:26 +00:00
|
|
|
// note: when m_ReadPos == m_WritePos, the fifo is empty
|
2016-07-03 08:27:53 +00:00
|
|
|
// Threading info: m_ReadPos is updated by the MTGS thread. m_WritePos is updated by the EE thread
|
|
|
|
std::atomic<unsigned int> m_ReadPos; // cur pos gs is reading from
|
|
|
|
std::atomic<unsigned int> m_WritePos; // cur pos ee thread is writing to
|
2009-11-24 08:43:36 +00:00
|
|
|
|
2016-02-22 20:53:24 +00:00
|
|
|
std::atomic<bool> m_RingBufferIsBusy;
|
|
|
|
std::atomic<bool> m_SignalRingEnable;
|
|
|
|
std::atomic<int> m_SignalRingPosition;
|
2009-02-09 21:15:56 +00:00
|
|
|
|
2016-02-22 20:53:24 +00:00
|
|
|
std::atomic<int> m_QueuedFrameCount;
|
|
|
|
std::atomic<bool> m_VsyncSignalListener;
|
2009-11-24 08:43:36 +00:00
|
|
|
|
2011-08-12 02:31:49 +00:00
|
|
|
Mutex m_mtx_RingBufferBusy; // Is obtained while processing ring-buffer data
|
|
|
|
Mutex m_mtx_RingBufferBusy2; // This one gets released on semaXGkick waiting...
|
|
|
|
Mutex m_mtx_WaitGS;
|
2009-11-24 08:43:36 +00:00
|
|
|
Semaphore m_sem_OnRingReset;
|
2010-07-13 16:34:27 +00:00
|
|
|
Semaphore m_sem_Vsync;
|
2009-09-21 09:48:31 +00:00
|
|
|
|
2009-07-03 06:05:48 +00:00
|
|
|
// used to keep multiple threads from sending packets to the ringbuffer concurrently.
|
2009-11-24 08:43:36 +00:00
|
|
|
// (currently not used or implemented -- is a planned feature for a future threaded VU1)
|
|
|
|
//MutexLockRecursive m_PacketLocker;
|
2009-09-21 09:48:31 +00:00
|
|
|
|
2009-02-09 21:15:56 +00:00
|
|
|
// Used to delay the sending of events. Performance is better if the ringbuffer
|
|
|
|
// has more than one command in it when the thread is kicked.
|
2009-11-24 08:43:36 +00:00
|
|
|
int m_CopyDataTally;
|
2009-02-09 21:15:56 +00:00
|
|
|
|
2016-02-22 21:02:24 +00:00
|
|
|
Semaphore m_sem_OpenDone;
|
2021-05-11 14:57:37 +00:00
|
|
|
std::atomic<bool> m_Opened;
|
2009-02-20 04:36:55 +00:00
|
|
|
|
2009-02-09 21:15:56 +00:00
|
|
|
// These vars maintain instance data for sending Data Packets.
|
|
|
|
// Only one data packet can be constructed and uploaded at a time.
|
|
|
|
|
2010-07-11 04:53:50 +00:00
|
|
|
uint m_packet_startpos; // size of the packet (data only, ie. not including the 16 byte command!)
|
2009-11-24 08:43:36 +00:00
|
|
|
uint m_packet_size; // size of the packet (data only, ie. not including the 16 byte command!)
|
2010-07-15 05:21:26 +00:00
|
|
|
uint m_packet_writepos; // index of the data location in the ringbuffer.
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
#ifdef RINGBUF_DEBUG_STACK
|
2009-10-31 19:18:29 +00:00
|
|
|
Threading::Mutex m_lock_Stack;
|
2009-02-09 21:15:56 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
public:
|
2009-11-23 06:54:24 +00:00
|
|
|
SysMtgsThread();
|
2017-05-06 13:17:12 +00:00
|
|
|
virtual ~SysMtgsThread();
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
// Waits for the GS to empty out the entire ring buffer contents.
|
2011-08-12 02:31:49 +00:00
|
|
|
void WaitGS(bool syncRegs=true, bool weakWait=false, bool isMTVU=false);
|
2009-09-23 09:53:21 +00:00
|
|
|
void ResetGS();
|
2009-02-09 21:15:56 +00:00
|
|
|
|
2010-07-11 04:53:50 +00:00
|
|
|
void PrepDataPacket( MTGS_RingCommand cmd, u32 size );
|
|
|
|
void PrepDataPacket( GIF_PATH pathidx, u32 size );
|
2009-02-09 21:15:56 +00:00
|
|
|
void SendDataPacket();
|
2009-09-23 09:53:21 +00:00
|
|
|
void SendGameCRC( u32 crc );
|
2021-12-18 14:43:50 +00:00
|
|
|
bool WaitForOpen();
|
2021-07-06 06:08:18 +00:00
|
|
|
void Freeze( FreezeAction mode, MTGS_FreezeData& data );
|
2009-02-09 21:15:56 +00:00
|
|
|
|
2011-07-24 13:02:50 +00:00
|
|
|
void SendSimpleGSPacket( MTGS_RingCommand type, u32 offset, u32 size, GIF_PATH path );
|
2009-11-21 07:56:29 +00:00
|
|
|
void SendSimplePacket( MTGS_RingCommand type, int data0, int data1, int data2 );
|
|
|
|
void SendPointerPacket( MTGS_RingCommand type, u32 data0, void* data1 );
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
u8* GetDataPacketPtr() const;
|
|
|
|
void SetEvent();
|
2022-01-09 09:21:59 +00:00
|
|
|
void PostVsyncStart(bool registers_written);
|
2009-02-20 04:36:55 +00:00
|
|
|
|
2021-05-11 14:57:37 +00:00
|
|
|
bool IsGSOpened() const { return m_Opened; }
|
2010-01-08 07:11:33 +00:00
|
|
|
|
2021-12-18 14:43:50 +00:00
|
|
|
void RunOnGSThread(AsyncCallType func);
|
|
|
|
void ApplySettings();
|
|
|
|
void ResizeDisplayWindow(int width, int height, float scale);
|
|
|
|
void UpdateDisplayWindow();
|
|
|
|
void SetVSync(VsyncMode mode);
|
|
|
|
void SwitchRenderer(GSRendererType renderer, bool display_message = true);
|
|
|
|
void SetSoftwareRendering(bool software, bool display_message = true);
|
|
|
|
void ToggleSoftwareRendering();
|
|
|
|
bool SaveMemorySnapshot(u32 width, u32 height, std::vector<u32>* pixels);
|
|
|
|
|
2009-02-09 21:15:56 +00:00
|
|
|
protected:
|
2021-05-11 14:57:37 +00:00
|
|
|
void OpenGS();
|
|
|
|
void CloseGS();
|
2009-10-19 01:50:52 +00:00
|
|
|
|
2021-10-03 22:02:21 +00:00
|
|
|
void OnStart() override;
|
|
|
|
void OnResumeReady() override;
|
2009-10-19 01:50:52 +00:00
|
|
|
|
2021-10-03 22:02:21 +00:00
|
|
|
void OnSuspendInThread() override;
|
2021-09-21 18:07:34 +00:00
|
|
|
void OnPauseInThread(SystemsMask systemsToTearDown) override {}
|
|
|
|
void OnResumeInThread(SystemsMask systemsToReinstate) override;
|
2021-10-03 22:02:21 +00:00
|
|
|
void OnCleanupInThread() override;
|
2009-09-23 09:53:21 +00:00
|
|
|
|
2010-07-15 05:21:26 +00:00
|
|
|
void GenericStall( uint size );
|
|
|
|
|
2009-02-09 21:15:56 +00:00
|
|
|
// Used internally by SendSimplePacket type functions
|
2010-07-15 05:21:26 +00:00
|
|
|
void _FinishSimplePacket();
|
2021-10-03 22:02:21 +00:00
|
|
|
void ExecuteTaskInThread() override;
|
2009-02-09 21:15:56 +00:00
|
|
|
};
|
|
|
|
|
2009-12-03 15:51:39 +00:00
|
|
|
// GetMTGS() is a required external implementation. This function is *NOT* provided
|
2010-04-25 00:31:27 +00:00
|
|
|
// by the PCSX2 core library. It provides an interface for the linking User Interface
|
|
|
|
// apps or DLLs to reference their own instance of SysMtgsThread (also allowing them
|
2009-12-03 15:51:39 +00:00
|
|
|
// to extend the class and override virtual methods).
|
2009-11-23 06:54:24 +00:00
|
|
|
//
|
2010-01-22 15:22:01 +00:00
|
|
|
extern SysMtgsThread& GetMTGS();
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
// Generalized GS Functions and Stuff
|
|
|
|
|
|
|
|
extern s32 gsOpen();
|
|
|
|
extern void gsClose();
|
|
|
|
extern void gsReset();
|
2021-08-30 07:10:48 +00:00
|
|
|
extern void gsSetVideoMode(GS_VideoMode mode);
|
2009-02-09 21:15:56 +00:00
|
|
|
extern void gsResetFrameSkip();
|
2011-05-05 22:22:45 +00:00
|
|
|
extern void gsPostVsyncStart();
|
2009-12-03 15:51:39 +00:00
|
|
|
extern void gsFrameSkip();
|
2021-12-18 14:43:50 +00:00
|
|
|
extern bool gsIsSkippingCurrentFrame();
|
2021-08-30 07:10:48 +00:00
|
|
|
extern void gsUpdateFrequency(Pcsx2Config& config);
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
// Some functions shared by both the GS and MTGS
|
|
|
|
extern void _gs_ResetFrameskip();
|
|
|
|
|
|
|
|
extern void gsWrite8(u32 mem, u8 value);
|
|
|
|
extern void gsWrite16(u32 mem, u16 value);
|
|
|
|
extern void gsWrite32(u32 mem, u32 value);
|
|
|
|
|
|
|
|
extern void __fastcall gsWrite64_page_00( u32 mem, const mem64_t* value );
|
|
|
|
extern void __fastcall gsWrite64_page_01( u32 mem, const mem64_t* value );
|
|
|
|
extern void __fastcall gsWrite64_generic( u32 mem, const mem64_t* value );
|
|
|
|
|
|
|
|
extern void __fastcall gsWrite128_page_00( u32 mem, const mem128_t* value );
|
|
|
|
extern void __fastcall gsWrite128_page_01( u32 mem, const mem128_t* value );
|
|
|
|
extern void __fastcall gsWrite128_generic( u32 mem, const mem128_t* value );
|
|
|
|
|
|
|
|
extern u8 gsRead8(u32 mem);
|
|
|
|
extern u16 gsRead16(u32 mem);
|
|
|
|
extern u32 gsRead32(u32 mem);
|
|
|
|
extern u64 gsRead64(u32 mem);
|
2021-03-29 15:59:10 +00:00
|
|
|
extern u128 gsNonMirroredRead(u32 mem);
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
void gsIrq();
|
|
|
|
|
2010-06-26 07:26:43 +00:00
|
|
|
extern tGS_CSR CSRr;
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
// GS Playback
|
2009-08-25 09:19:45 +00:00
|
|
|
enum gsrun
|
|
|
|
{
|
|
|
|
GSRUN_TRANS1 = 1,
|
|
|
|
GSRUN_TRANS2,
|
|
|
|
GSRUN_TRANS3,
|
|
|
|
GSRUN_VSYNC
|
|
|
|
};
|
2009-02-09 21:15:56 +00:00
|
|
|
|
|
|
|
#ifdef PCSX2_DEVBUILD
|
|
|
|
|
|
|
|
extern int g_SaveGSStream;
|
|
|
|
extern int g_nLeftGSFrames;
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2010-07-11 04:53:50 +00:00
|
|
|
// Size of the ringbuffer as a power of 2 -- size is a multiple of simd128s.
|
|
|
|
// (actual size is 1<<m_RingBufferSizeFactor simd vectors [128-bit values])
|
|
|
|
// A value of 19 is a 8meg ring buffer. 18 would be 4 megs, and 20 would be 16 megs.
|
|
|
|
// Default was 2mb, but some games with lots of MTGS activity want 8mb to run fast (rama)
|
|
|
|
static const uint RingBufferSizeFactor = 19;
|
|
|
|
|
|
|
|
// size of the ringbuffer in simd128's.
|
|
|
|
static const uint RingBufferSize = 1<<RingBufferSizeFactor;
|
|
|
|
|
|
|
|
// Mask to apply to ring buffer indices to wrap the pointer from end to
|
|
|
|
// start (the wrapping is what makes it a ringbuffer, yo!)
|
|
|
|
static const uint RingBufferMask = RingBufferSize - 1;
|
|
|
|
|
|
|
|
struct MTGS_BufferedData
|
|
|
|
{
|
|
|
|
u128 m_Ring[RingBufferSize];
|
|
|
|
u8 Regs[Ps2MemSize::GSregs];
|
|
|
|
|
|
|
|
MTGS_BufferedData() {}
|
|
|
|
|
|
|
|
u128& operator[]( uint idx )
|
|
|
|
{
|
|
|
|
pxAssert( idx < RingBufferSize );
|
|
|
|
return m_Ring[idx];
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2021-09-03 06:23:59 +00:00
|
|
|
alignas(32) extern MTGS_BufferedData RingBuffer;
|
2010-07-11 13:23:56 +00:00
|
|
|
|
|
|
|
// FIXME: These belong in common with other memcpy tools. Will move them there later if no one
|
|
|
|
// else beats me to it. --air
|
2011-07-24 13:02:50 +00:00
|
|
|
inline void MemCopy_WrappedDest( const u128* src, u128* destBase, uint& destStart, uint destSize, uint len ) {
|
|
|
|
uint endpos = destStart + len;
|
|
|
|
if ( endpos < destSize ) {
|
2014-08-13 07:55:23 +00:00
|
|
|
memcpy(&destBase[destStart], src, len*16);
|
2011-07-24 13:02:50 +00:00
|
|
|
destStart += len;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
uint firstcopylen = destSize - destStart;
|
2014-08-13 07:55:23 +00:00
|
|
|
memcpy(&destBase[destStart], src, firstcopylen*16);
|
2011-07-24 13:02:50 +00:00
|
|
|
destStart = endpos % destSize;
|
2014-08-13 07:55:23 +00:00
|
|
|
memcpy(destBase, src+firstcopylen, destStart*16);
|
2011-07-24 13:02:50 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
inline void MemCopy_WrappedSrc( const u128* srcBase, uint& srcStart, uint srcSize, u128* dest, uint len ) {
|
|
|
|
uint endpos = srcStart + len;
|
|
|
|
if ( endpos < srcSize ) {
|
2014-08-13 07:55:23 +00:00
|
|
|
memcpy(dest, &srcBase[srcStart], len*16);
|
2011-07-24 13:02:50 +00:00
|
|
|
srcStart += len;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
uint firstcopylen = srcSize - srcStart;
|
2014-08-13 07:55:23 +00:00
|
|
|
memcpy(dest, &srcBase[srcStart], firstcopylen*16);
|
2011-07-24 13:02:50 +00:00
|
|
|
srcStart = endpos % srcSize;
|
2014-08-13 07:55:23 +00:00
|
|
|
memcpy(dest+firstcopylen, srcBase, srcStart*16);
|
2011-07-24 13:02:50 +00:00
|
|
|
}
|
|
|
|
}
|