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Various changes that were accumulating. Broke off Gif.h from GS.h. Changed some defines to enums. A few other minor things. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1676 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
arcum42 2009-08-25 09:19:45 +00:00
parent a3f0ba5315
commit be6c314e27
17 changed files with 301 additions and 85 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
pcsx2/GS.h
View File

@ -343,21 +343,18 @@ void gsConstRead64(u32 mem, int mmreg);
void gsConstRead128(u32 mem, int xmmreg);
void gsIrq();
extern void gsInterrupt();
void dmaGIF();
void GIFdma();
void mfifoGIFtransfer(int qwc);
int _GIFchain();
void gifMFIFOInterrupt();
extern u32 CSRw;
extern u64 m_iSlowStart;
// GS Playback
#define GSRUN_TRANS1 1
#define GSRUN_TRANS2 2
#define GSRUN_TRANS3 3
#define GSRUN_VSYNC 4
enum gsrun
{
GSRUN_TRANS1 = 1,
GSRUN_TRANS2,
GSRUN_TRANS3,
GSRUN_VSYNC
};
#ifdef PCSX2_DEVBUILD

16
pcsx2/Gif.cpp
View File

@ -21,6 +21,7 @@
#include "Common.h"
#include "VU.h"
#include "GS.h"
#include "Gif.h"
#include "iR5900.h"
#include "Counters.h"
@ -29,15 +30,6 @@
using std::min;
#define gifsplit 0x10000
enum gifstate_t
{
GIF_STATE_READY = 0,
GIF_STATE_STALL = 1,
GIF_STATE_DONE = 2,
GIF_STATE_EMPTY = 0x10
};
// A three-way toggle used to determine if the GIF is stalling (transferring) or done (finished).
// Should be a gifstate_t rather then int, but I don't feel like possibly interfering with savestates right now.
static int gifstate = GIF_STATE_READY;
@ -97,9 +89,7 @@ __forceinline void gsInterrupt()
CHCR::clearSTR(gif);
vif1Regs->stat &= ~VIF1_STAT_VGW;
psHu32(GIF_STAT)&= ~(GIF_STAT_APATH3 | GIF_STAT_OPH); // OPH=0 | APATH=0
psHu32(GIF_STAT) &= ~GIF_STAT_P3Q;
psHu32(GIF_STAT) &= ~GIF_STAT_FQC; // FQC=0
psHu32(GIF_STAT) &= ~(GIF_STAT_APATH3 | GIF_STAT_OPH | GIF_STAT_P3Q | GIF_STAT_FQC);
clearFIFOstuff(false);
hwDmacIrq(DMAC_GIF);
@ -569,7 +559,7 @@ void gifMFIFOInterrupt()
{
//Console::WriteLn("Empty");
gifstate |= GIF_STATE_EMPTY;
psHu32(GIF_STAT)&= ~GIF_STAT_IMT; // OPH=0 | APATH=0
psHu32(GIF_STAT) &= ~GIF_STAT_IMT; // OPH=0 | APATH=0
hwDmacIrq(DMAC_MFIFO_EMPTY);
return;
}

197
pcsx2/Gif.h Normal file
View File

@ -0,0 +1,197 @@
/* Pcsx2 - Pc Ps2 Emulator
* Copyright (C) 2002-2009 Pcsx2 Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#ifndef __GIF_H__
#define __GIF_H__
#define gifsplit 0x10000
enum gifstate_t
{
GIF_STATE_READY = 0,
GIF_STATE_STALL = 1,
GIF_STATE_DONE = 2,
GIF_STATE_EMPTY = 0x10
};
extern void gsInterrupt();
int _GIFchain();
void GIFdma();
void dmaGIF();
void mfifoGIFtransfer(int qwc);
void gifMFIFOInterrupt();
// This code isn't ready to be used yet, but after typing out all those bitflags,
// I wanted a copy saved. :)
/*
union tGIF_CTRL
{
struct
{
u32 RST :1,
u32 reserved :2,
u32 PSE :1,
u32 reserved2 :28
};
u32 value;
tGIF_CTRL( u32 val ) : value( val )
};
union tGIF_MODE
{
struct
{
u32 M3R :1,
u32 reserved :1,
u32 IMT :1,
u32 reserved2 :29
};
u32 value;
tGIF_MODE( u32 val ) : value( val )
{
}
};
union tGIF_STAT
{
struct
{
u32 M3R :1,
u32 M3P :1,
u32 IMT :1,
u32 PSE :1,
u32 reserved :1,
u32 IP3 :1,
u32 P3Q :1,
u32 P2Q :1,
u32 P1Q :1,
u32 OPH :1,
u32 APATH : 2,
u32 DIR :1,
u32 reserved2 :11,
u32 FQC :5,
u32 reserved3 :3
};
u32 value;
tGIF_STAT( u32 val ) : value( val )
{
}
};
union tGIF_TAG0
{
struct
{
u32 NLOOP : 15;
u32 EOP : 1;
u32 TAG : 16;
};
u32 value;
tGIF_TAG0( u32 val ) : value( val )
{
}
};
union tGIF_TAG1
{
struct
{
u32 TAG : 14;
u32 PRE : 1;
u32 PRIM : 11;
u32 FLG : 2;
u32 NREG : 4;
};
u32 value;
tGIF_TAG1( u32 val ) : value( val )
{
}
};
union tGIF_CNT
{
struct
{
u32 LOOPCNT : 15;
u32 reserved : 1;
u32 REGCNT : 4;
u32 VUADDR : 2;
u32 reserved2 : 10;
};
u32 value;
tGIF_CNT( u32 val ) : value( val )
{
}
};
union tGIF_P3CNT
{
struct
{
u32 P3CNT : 15;
reserved : 17;
};
u32 value;
tGIF_P3CNT( u32 val ) : value( val )
{
}
};
union tGIF_P3TAG
{
struct
{
u32 LOOPCNT : 15;
u32 EOP : 1;
u32 reserved : 16;
};
u32 value;
tGIF_P3TAG( u32 val ) : value( val )
{
}
};
struct GIFregisters
{
// To do: Pad to the correct positions and hook up.
tGIF_CTRL ctrl;
tGIF_MODE mode;
tGIF_STAT stat;
tGIF_TAG0 tag0;
tGIF_TAG1 tag1;
u32 tag2;
u32 tag3;
tGIF_CNT cnt;
tGIF_P3CNT p3cnt;
tGIF_P3TAG p3tag;
};
#define gifRegs ((GIFregisters*)(PS2MEM_HW+0x3000))*/
#endif

3
pcsx2/Hw.h
View File

@ -286,6 +286,8 @@ enum INTCIrqs
INTC_TIM1,
INTC_TIM2,
INTC_TIM3,
INTC_SFIFO,
INTVU0_WD
};
enum dmac_conditions
@ -397,6 +399,7 @@ enum gif_mode_flags
GIF_MODE_M3R = (1),
GIF_MODE_IMT = (1<<2)
};
//DMA interrupts & masks
enum DMAInter
{

1
pcsx2/HwWrite.cpp
View File

@ -26,6 +26,7 @@
// The full suite of hardware APIs:
#include "IPU/IPU.h"
#include "GS.h"
#include "Gif.h"
#include "Counters.h"
#include "Vif.h"
#include "VifDma.h"

11
pcsx2/IPU/IPU.cpp
View File

@ -687,7 +687,7 @@ static BOOL __fastcall ipuCSC(u32 val)
if (g_nCmdPos[0] < 3072 / 8) return FALSE;
ipu_csc(&mb8, &rgb32, 0);
if (csc.OFM) ipu_dither2(&rgb32, &rgb16, csc.DTE);
if (csc.OFM) ipu_dither(&rgb32, &rgb16, csc.DTE);
}
if (csc.OFM)
@ -741,7 +741,7 @@ static BOOL ipuPACK(u32 val)
if (g_nCmdPos[0] < 64) return FALSE;
ipu_csc(&mb8, &rgb32, 0);
ipu_dither2(&rgb32, &rgb16, csc.DTE);
ipu_dither(&rgb32, &rgb16, csc.DTE);
if (csc.OFM) ipu_vq(&rgb16, indx4);
}
@ -1278,7 +1278,7 @@ void __fastcall ipu_csc(macroblock_8 *mb8, macroblock_rgb32 *rgb32, int sgn)
}
}
void __fastcall ipu_dither2(const macroblock_rgb32* rgb32, macroblock_rgb16 *rgb16, int dte)
void __fastcall ipu_dither(const macroblock_rgb32* rgb32, macroblock_rgb16 *rgb16, int dte)
{
int i, j;
for (i = 0; i < 16; ++i)
@ -1293,11 +1293,6 @@ void __fastcall ipu_dither2(const macroblock_rgb32* rgb32, macroblock_rgb16 *rgb
}
}
void __fastcall ipu_dither(macroblock_8 *mb8, macroblock_rgb16 *rgb16, int dte)
{
//Console::Error("IPU: Dither not implemented");
}
void __fastcall ipu_vq(macroblock_rgb16 *rgb16, u8* indx4)
{
Console::Error("IPU: VQ not implemented");

78
pcsx2/IPU/IPU.h
View File

@ -60,34 +60,39 @@ union tIPU_CMD {
};
};
#define IPU_CTRL_IFC_M (0x0f<< 0)
#define IPU_CTRL_OFC_M (0x0f<< 4)
#define IPU_CTRL_CBP_M (0x3f<< 8)
#define IPU_CTRL_ECD_M (0x01<<14)
#define IPU_CTRL_SCD_M (0x01<<15)
#define IPU_CTRL_IDP_M (0x03<<16)
#define IPU_CTRL_AS_M (0x01<<20)
#define IPU_CTRL_IVF_M (0x01<<21)
#define IPU_CTRL_QST_M (0x01<<22)
#define IPU_CTRL_MP1_M (0x01<<23)
#define IPU_CTRL_PCT_M (0x07<<24)
#define IPU_CTRL_RST_M (0x01<<30)
#define IPU_CTRL_BUSY_M (0x01<<31)
#define IPU_CTRL_IFC_O ( 0)
#define IPU_CTRL_OFC_O ( 4)
#define IPU_CTRL_CBP_O ( 8)
#define IPU_CTRL_ECD_O (14)
#define IPU_CTRL_SCD_O (15)
#define IPU_CTRL_IDP_O (16)
#define IPU_CTRL_AS_O (20)
#define IPU_CTRL_IVF_O (21)
#define IPU_CTRL_QST_O (22)
#define IPU_CTRL_MP1_O (23)
#define IPU_CTRL_PCT_O (24)
#define IPU_CTRL_RST_O (30)
#define IPU_CTRL_BUSY_O (31)
enum ipu_ctrl_m_flags
{
IPU_CTRL_IFC_M = (0x0f<< 0),
IPU_CTRL_OFC_M = (0x0f<< 4),
IPU_CTRL_CBP_M = (0x3f<< 8),
IPU_CTRL_ECD_M = (0x01<<14),
IPU_CTRL_SCD_M = (0x01<<15),
IPU_CTRL_IDP_M = (0x03<<16),
IPU_CTRL_AS_M = (0x01<<20),
IPU_CTRL_IVF_M = (0x01<<21),
IPU_CTRL_QST_M = (0x01<<22),
IPU_CTRL_MP1_M = (0x01<<23),
IPU_CTRL_PCT_M = (0x07<<24),
IPU_CTRL_RST_M = (0x01<<30),
IPU_CTRL_BUSY_M = (0x01<<31)
};
enum ipu_ctrl_o_flags
{
IPU_CTRL_IFC_O = ( 0),
IPU_CTRL_OFC_O = ( 4),
IPU_CTRL_CBP_O = ( 8),
IPU_CTRL_ECD_O = (14),
IPU_CTRL_SCD_O = (15),
IPU_CTRL_IDP_O = (16),
IPU_CTRL_AS_O = (20),
IPU_CTRL_IVF_O = (21),
IPU_CTRL_QST_O = (22),
IPU_CTRL_MP1_O = (23),
IPU_CTRL_PCT_O = (24),
IPU_CTRL_RST_O = (30),
IPU_CTRL_BUSY_O = (31)
};
//
// Bitfield Structure
@ -113,14 +118,19 @@ union tIPU_CTRL {
u32 _u32;
};
#define IPU_BP_BP_M (0x7f<< 0)
#define IPU_BP_IFC_M (0x0f<< 8)
#define IPU_BP_FP_M (0x03<<16)
#define IPU_BP_BP_O ( 0)
#define IPU_BP_IFC_O ( 8)
#define IPU_BP_FP_O (16)
enum ipu_bp_m_flags
{
IPU_BP_BP_M = (0x7f<< 0),
IPU_BP_IFC_M = (0x0f<< 8),
IPU_BP_FP_M = (0x03<<16)
};
enum ipu_bp_o_flags
{
IPU_BP_BP_O = ( 0),
IPU_BP_IFC_O = ( 8),
IPU_BP_FP_O = (16)
};
//
// Bitfield Structure

3
pcsx2/IPU/mpeg2lib/Mpeg.cpp
View File

@ -1210,9 +1210,8 @@ void mpeg2sliceIDEC(void* pdone)
}
else
{
//ipu_dither(decoder->mb8, decoder->rgb16, decoder->dte);
ipu_csc(decoder->mb8, decoder->rgb32, decoder->dte);
ipu_dither2(decoder->rgb32, decoder->rgb16, decoder->dte);
ipu_dither(decoder->rgb32, decoder->rgb16, decoder->dte);
g_nIPU0Data = 32;
g_pIPU0Pointer = (u8*)decoder->rgb16;

3
pcsx2/IPU/mpeg2lib/Mpeg.h
View File

@ -185,8 +185,7 @@ extern int non_linear_quantizer_scale[];
extern decoder_t g_decoder;
void __fastcall ipu_csc(macroblock_8 *mb8, macroblock_rgb32 *rgb32, int sgn);
void __fastcall ipu_dither(macroblock_8 *mb8, macroblock_rgb16 *rgb16, int dte);
void __fastcall ipu_dither2(const macroblock_rgb32* rgb32, macroblock_rgb16 *rgb16, int dte);
void __fastcall ipu_dither(const macroblock_rgb32* rgb32, macroblock_rgb16 *rgb16, int dte);
void __fastcall ipu_vq(macroblock_rgb16 *rgb16, u8* indx4);
void __fastcall ipu_copy(const macroblock_8 *mb8, macroblock_16 *mb16);

9
pcsx2/R3000A.cpp
View File

@ -65,7 +65,6 @@ void psxReset()
psxHwReset();
psxBiosInit();
//psxExecuteBios();
}
void psxShutdown() {
@ -135,7 +134,7 @@ void psxException(u32 code, u32 bd) {
}
/*if (psxRegs.CP0.n.Cause == 0x400 && (!(psxHu32(0x1450) & 0x8))) {
hwIntcIrq(1);
hwIntcIrq(INTC_SBUS);
}*/
}
@ -278,9 +277,3 @@ void iopTestIntc()
psxSetNextBranchDelta( 2 );
}
void psxExecuteBios() {
/* while (psxRegs.pc != 0x80030000)
psxCpu->ExecuteBlock();
PSX_LOG("*BIOS END*");
*/
}

1
pcsx2/R3000A.h
View File

@ -201,7 +201,6 @@ void psxReset();
void psxShutdown();
void psxException(u32 code, u32 step);
extern void psxBranchTest();
void psxExecuteBios();
void psxMemReset();
// Subsets

1
pcsx2/R5900.cpp
View File

@ -29,6 +29,7 @@
#include "COP0.h"
#include "GS.h"
#include "Gif.h"
#include "IPU/IPU.h"
#include "Vif.h"
#include "VifDma.h"

24
pcsx2/Vif.h
View File

@ -24,6 +24,30 @@ struct vifCycle {
u8 pad[2];
};
//
// Bitfield Structure
//
union tVIF_STAT {
struct {
u32 VPS : 2;
u32 VEW : 1;
u32 VGW : 1;
u32 reserved : 2;
u32 MRK : 1;
u32 DBF : 1;
u32 VSS : 1;
u32 VFS : 1;
u32 VIS : 1;
u32 INT : 1;
u32 ER0 : 1;
u32 ER1 : 1;
u32 reserved2 : 9;
u32 FDR : 1;
u32 FQC : 5;
};
u32 _u32;
};
// r0-r3 and c0-c3 would be more managable as arrays.
struct VIFregisters {
u32 stat;

2
pcsx2/VifDma.cpp
View File

@ -2054,7 +2054,7 @@ void Vif1MskPath3() // MSKPATH3
if (vif1Regs->mskpath3)
{
psHu32(GIF_STAT) |= 0x2;
psHu32(GIF_STAT) |= GIF_STAT_M3P;
}
else
{

1
pcsx2/windows/VCprojects/pcsx2.vcxproj
View File

@ -593,6 +593,7 @@
<ClInclude Include="..\..\Dump.h" />
<ClInclude Include="..\..\Elfheader.h" />
<ClInclude Include="..\..\Exceptions.h" />
<ClInclude Include="..\..\Gif.h" />
<ClInclude Include="..\..\GS.h" />
<ClInclude Include="..\..\HashMap.h" />
<ClInclude Include="..\..\HostGui.h" />

5
pcsx2/windows/VCprojects/pcsx2_2008.vcproj
View File

@ -2254,6 +2254,11 @@
RelativePath="..\..\Gif.cpp"
>
</File>
<File
RelativePath="..\..\Gif.h"
>
</File>
<Filter
Name="Vif"
>

14
pcsx2/x86/Makefile.am
View File

@ -19,18 +19,20 @@ ix86-32/iR5900MultDiv.cpp ix86-32/iCore-32.cpp ix86-32/aR5900-32.S ix86-32/iR590
libx86recomp_a_SOURCES = \
BaseblockEx.cpp iCOP2.cpp iFPUd.cpp iR3000A.cpp iVU0micro.cpp ir5900tables.cpp sVU_Micro.cpp \
iCore.cpp iMMI.cpp iR3000Atables.cpp iVU1micro.cpp microVU.cpp sVU_Upper.cpp \
iCore.cpp iMMI.cpp iR3000Atables.cpp iVU1micro.cpp sVU_Upper.cpp \
iCOP0.cpp iFPU.cpp iPsxMem.cpp iR5900Misc.cpp iVif.cpp sVU_Lower.cpp sVU_zerorec.cpp \
aR3000A.S aVUzerorec.S aVif.S fast_routines.S $(archfiles)
libx86recomp_a_SOURCES += \
microVU_Alloc.inl microVU_Compile.inl microVU_Flags.inl microVU_Lower.inl microVU_Tables.inl \
microVU_Analyze.inl microVU_Execute.inl microVU_Log.inl microVU_Misc.inl microVU_Upper.inl
microVU.cpp microVU_Analyze.inl microVU_Execute.inl microVU_Log.inl microVU_Misc.h microVU_Upper.inl \
microVU.h microVU_Branch.inl microVU_Flags.inl microVU_Lower.inl microVU_Misc.inl \
microVU_Alloc.inl microVU_Compile.inl microVU_IR.h microVU_Macro.inl microVU_Tables.inl
libx86recomp_a_SOURCES += \
BaseblockEx.h iFPU.h iR5900.h iR5900Branch.h iR5900Move.h microVU.h sVU_Debug.h \
iCOP0.h iMMI.h iR5900Arit.h iR5900Jump.h iR5900MultDiv.h microVU_IR.h sVU_Micro.h \
iCore.h iR3000A.h iR5900AritImm.h iR5900LoadStore.h iR5900Shift.h microVU_Misc.h sVU_zerorec.h
BaseblockEx.h iFPU.h iR5900.h iR5900Branch.h iR5900Move.h sVU_Debug.h \
iCOP0.h iMMI.h iR5900Arit.h iR5900Jump.h iR5900MultDiv.h sVU_Micro.h \
iCore.h iR3000A.h iR5900AritImm.h iR5900LoadStore.h iR5900Shift.h sVU_zerorec.h
libx86recomp_a_DEPENDENCIES = ix86/libix86.a