2009-02-15 05:15:39 +00:00
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/* SPU2-X, A plugin for Emulating the Sound Processing Unit of the Playstation 2
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* Developed and maintained by the Pcsx2 Development Team.
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2010-04-25 00:31:27 +00:00
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*
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2009-02-15 05:15:39 +00:00
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* Original portions from SPU2ghz are (c) 2008 by David Quintana [gigaherz]
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*
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2009-06-21 11:00:53 +00:00
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* SPU2-X is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* SPU2-X is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with SPU2-X. If not, see <http://www.gnu.org/licenses/>.
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2009-02-15 05:15:39 +00:00
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*/
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2009-06-21 11:00:53 +00:00
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#pragma once
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2009-02-15 05:15:39 +00:00
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2009-09-29 19:18:50 +00:00
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#include "Mixer.h"
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// --------------------------------------------------------------------------------------
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// SPU2 Memory Indexers
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// --------------------------------------------------------------------------------------
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#define spu2Rs16(mmem) (*(s16 *)((s8 *)spu2regs + ((mmem) & 0x1fff)))
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#define spu2Ru16(mmem) (*(u16 *)((s8 *)spu2regs + ((mmem) & 0x1fff)))
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2010-06-05 15:59:59 +00:00
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extern s16* GetMemPtr(u32 addr);
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extern s16 spu2M_Read( u32 addr );
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extern void spu2M_Write( u32 addr, s16 value );
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extern void spu2M_Write( u32 addr, u16 value );
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2009-09-29 19:18:50 +00:00
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2009-02-18 13:36:20 +00:00
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struct V_VolumeLR
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{
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static V_VolumeLR Max;
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2009-09-29 19:18:50 +00:00
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s32 Left;
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s32 Right;
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2009-02-18 13:36:20 +00:00
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V_VolumeLR() {}
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V_VolumeLR( s32 both ) :
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Left( both ),
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Right( both )
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{
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}
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2010-04-25 00:31:27 +00:00
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2009-02-18 13:36:20 +00:00
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void DebugDump( FILE* dump, const char* title );
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};
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struct V_VolumeSlide
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2009-02-15 05:15:39 +00:00
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{
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// Holds the "original" value of the volume for this voice, prior to slides.
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// (ie, the volume as written to the register)
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2010-04-25 00:31:27 +00:00
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2009-09-29 19:18:50 +00:00
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s16 Reg_VOL;
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s32 Value;
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s8 Increment;
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s8 Mode;
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2010-04-25 00:31:27 +00:00
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2009-02-16 20:00:31 +00:00
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public:
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2009-02-18 13:36:20 +00:00
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V_VolumeSlide() {}
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V_VolumeSlide( s16 regval, s32 fullvol ) :
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Reg_VOL( regval ),
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Value( fullvol ),
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Increment( 0 ),
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Mode( 0 )
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{
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}
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2009-02-16 20:00:31 +00:00
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void Update();
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2009-02-18 13:36:20 +00:00
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void RegSet( u16 src ); // used to set the volume from a register source (16 bit signed)
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void DebugDump( FILE* dump, const char* title, const char* nameLR );
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};
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struct V_VolumeSlideLR
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{
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static V_VolumeSlideLR Max;
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V_VolumeSlide Left;
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V_VolumeSlide Right;
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public:
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V_VolumeSlideLR() {}
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2010-04-25 00:31:27 +00:00
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2009-02-18 13:36:20 +00:00
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V_VolumeSlideLR( s16 regval, s32 bothval ) :
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Left( regval, bothval ),
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Right( regval, bothval )
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{
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}
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void Update()
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{
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Left.Update();
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Right.Update();
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}
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2010-04-25 00:31:27 +00:00
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2009-02-18 13:36:20 +00:00
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void DebugDump( FILE* dump, const char* title );
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2009-02-15 05:15:39 +00:00
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};
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struct V_ADSR
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{
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2009-09-30 05:35:37 +00:00
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union
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{
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u32 reg32;
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2010-04-25 00:31:27 +00:00
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struct
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2009-09-30 05:35:37 +00:00
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{
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u16 regADSR1;
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u16 regADSR2;
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};
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2010-04-25 00:31:27 +00:00
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struct
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2009-09-30 05:35:37 +00:00
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{
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u32 SustainLevel:4,
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DecayRate:4,
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AttackRate:7,
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AttackMode:1, // 0 for linear (+lin), 1 for pseudo exponential (+exp)
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ReleaseRate:5,
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ReleaseMode:1, // 0 for linear (-lin), 1 for exponential (-exp)
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SustainRate:7,
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SustainMode:3; // 0 = +lin, 1 = -lin, 2 = +exp, 3 = -exp
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};
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};
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s32 Value; // Ranges from 0 to 0x7fffffff (signed values are clamped to 0) [Reg_ENVX]
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u8 Phase; // monitors current phase of ADSR envelope
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bool Releasing; // Ready To Release, triggered by Voice.Stop();
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2009-02-16 20:00:31 +00:00
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public:
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bool Calculate();
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2009-02-15 05:15:39 +00:00
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};
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struct V_Voice
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{
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2009-02-18 13:36:20 +00:00
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u32 PlayCycle; // SPU2 cycle where the Playing started
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V_VolumeSlideLR Volume;
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2009-02-15 05:15:39 +00:00
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// Envelope
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V_ADSR ADSR;
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// Pitch (also Reg_PITCH)
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2010-06-19 14:52:37 +00:00
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u16 Pitch;
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2009-02-15 05:15:39 +00:00
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// Loop Start address (also Reg_LSAH/L)
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2010-04-25 00:31:27 +00:00
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u32 LoopStartA;
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2009-02-15 05:15:39 +00:00
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// Sound Start address (also Reg_SSAH/L)
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u32 StartA;
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// Next Read Data address (also Reg_NAXH/L)
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u32 NextA;
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// Voice Decoding State
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s32 Prev1;
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s32 Prev2;
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2009-09-30 05:35:37 +00:00
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// Pitch Modulated by previous voice
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bool Modulated;
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// Source (Wave/Noise)
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bool Noise;
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2009-02-15 05:15:39 +00:00
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s8 LoopMode;
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s8 LoopFlags;
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// Sample pointer (19:12 bit fixed point)
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s32 SP;
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// Sample pointer for Cubic Interpolation
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// Cubic interpolation mixes a sample behind Linear, so that it
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// can have sample data to either side of the end points from which
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// to extrapolate. This SP represents that late sample position.
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s32 SPc;
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// Previous sample values - used for interpolation
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2009-02-17 10:52:18 +00:00
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// Inverted order of these members to match the access order in the
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2009-02-15 05:15:39 +00:00
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// code (might improve cache hits).
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s32 PV4;
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s32 PV3;
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s32 PV2;
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s32 PV1;
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// Last outputted audio value, used for voice modulation.
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2010-06-19 14:52:37 +00:00
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u32 OutX;
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u32 NextCrest; // temp value for Crest calculation
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u32 PrevAmp; // temp value for Crest calculation (abs of last value)
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2009-02-15 05:15:39 +00:00
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// SBuffer now points directly to an ADPCM cache entry.
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s16 *SBuffer;
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// sample position within the current decoded packet.
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s32 SCurrent;
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2009-02-16 20:00:31 +00:00
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void Start();
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void Stop();
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2009-02-15 05:15:39 +00:00
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};
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// ** Begin Debug-only variables section **
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// Separated from the V_Voice struct to improve cache performance of
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// the Public Release build.
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struct V_VoiceDebug
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{
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s8 FirstBlock;
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s32 SampleData;
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s32 PeakX;
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s32 displayPeak;
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s32 lastSetStartA;
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};
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struct V_CoreDebug
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{
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V_VoiceDebug Voices[24];
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// Last Transfer Size
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u32 lastsize;
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};
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// Debug tracking information - 24 voices and 2 cores.
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extern V_CoreDebug DebugCores[2];
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struct V_Reverb
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{
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s16 IN_COEF_L;
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s16 IN_COEF_R;
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u32 FB_SRC_A;
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u32 FB_SRC_B;
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s16 FB_ALPHA;
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s16 FB_X;
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2010-04-25 00:31:27 +00:00
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2009-02-15 05:15:39 +00:00
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u32 IIR_SRC_A0;
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u32 IIR_SRC_A1;
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u32 IIR_SRC_B1;
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u32 IIR_SRC_B0;
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u32 IIR_DEST_A0;
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u32 IIR_DEST_A1;
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u32 IIR_DEST_B0;
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u32 IIR_DEST_B1;
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s16 IIR_ALPHA;
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s16 IIR_COEF;
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u32 ACC_SRC_A0;
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u32 ACC_SRC_A1;
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u32 ACC_SRC_B0;
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u32 ACC_SRC_B1;
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u32 ACC_SRC_C0;
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u32 ACC_SRC_C1;
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u32 ACC_SRC_D0;
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u32 ACC_SRC_D1;
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s16 ACC_COEF_A;
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s16 ACC_COEF_B;
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s16 ACC_COEF_C;
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s16 ACC_COEF_D;
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u32 MIX_DEST_A0;
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u32 MIX_DEST_A1;
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u32 MIX_DEST_B0;
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u32 MIX_DEST_B1;
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};
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2009-02-18 13:36:20 +00:00
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struct V_ReverbBuffers
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{
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s32 FB_SRC_A0;
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s32 FB_SRC_B0;
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s32 FB_SRC_A1;
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s32 FB_SRC_B1;
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s32 IIR_SRC_A0;
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s32 IIR_SRC_A1;
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s32 IIR_SRC_B0;
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2010-06-21 04:04:32 +00:00
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s32 IIR_SRC_B1;
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2009-02-18 13:36:20 +00:00
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s32 IIR_DEST_A0;
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s32 IIR_DEST_A1;
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s32 IIR_DEST_B0;
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s32 IIR_DEST_B1;
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s32 ACC_SRC_A0;
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s32 ACC_SRC_A1;
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s32 ACC_SRC_B0;
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s32 ACC_SRC_B1;
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s32 ACC_SRC_C0;
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s32 ACC_SRC_C1;
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s32 ACC_SRC_D0;
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s32 ACC_SRC_D1;
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s32 MIX_DEST_A0;
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s32 MIX_DEST_A1;
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s32 MIX_DEST_B0;
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s32 MIX_DEST_B1;
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2010-04-25 00:31:27 +00:00
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2009-02-18 13:36:20 +00:00
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bool NeedsUpdated;
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};
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2009-02-15 05:15:39 +00:00
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struct V_SPDIF
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{
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u16 Out;
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u16 Info;
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u16 Unknown1;
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u16 Mode;
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u16 Media;
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u16 Unknown2;
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u16 Protection;
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};
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struct V_CoreRegs
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{
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u32 PMON;
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u32 NON;
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u32 VMIXL;
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u32 VMIXR;
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u32 VMIXEL;
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u32 VMIXER;
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u32 ENDX;
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2009-09-30 05:35:37 +00:00
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u16 MMIX;
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2009-02-15 05:15:39 +00:00
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u16 STATX;
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u16 ATTR;
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u16 _1AC;
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};
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2009-03-04 21:32:48 +00:00
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struct V_VoiceGates
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{
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s16 DryL; // 'AND Gate' for Direct Output to Left Channel
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s16 DryR; // 'AND Gate' for Direct Output for Right Channel
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s16 WetL; // 'AND Gate' for Effect Output for Left Channel
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s16 WetR; // 'AND Gate' for Effect Output for Right Channel
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};
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2009-09-29 19:18:50 +00:00
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struct V_CoreGates
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2009-03-04 21:32:48 +00:00
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{
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2009-09-29 19:18:50 +00:00
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union
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2009-03-04 21:32:48 +00:00
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{
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2009-09-29 19:18:50 +00:00
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u128 v128;
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2010-04-25 00:31:27 +00:00
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struct
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2009-09-29 19:18:50 +00:00
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{
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s16 InpL; // Sound Data Input to Direct Output (Left)
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s16 InpR; // Sound Data Input to Direct Output (Right)
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s16 SndL; // Voice Data to Direct Output (Left)
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s16 SndR; // Voice Data to Direct Output (Right)
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s16 ExtL; // External Input to Direct Output (Left)
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s16 ExtR; // External Input to Direct Output (Right)
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};
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};
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2010-04-25 00:31:27 +00:00
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2009-09-29 19:18:50 +00:00
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};
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struct VoiceMixSet
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{
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static const VoiceMixSet Empty;
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StereoOut32 Dry, Wet;
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2009-03-04 21:32:48 +00:00
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2009-09-29 19:18:50 +00:00
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VoiceMixSet() {}
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VoiceMixSet( const StereoOut32& dry, const StereoOut32& wet ) :
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Dry( dry ),
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Wet( wet )
|
2009-03-04 21:32:48 +00:00
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{
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2009-09-29 19:18:50 +00:00
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}
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2009-03-04 21:32:48 +00:00
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};
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2009-02-15 05:15:39 +00:00
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struct V_Core
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{
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2009-03-04 21:32:48 +00:00
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static const uint NumVoices = 24;
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2009-02-18 13:36:20 +00:00
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2009-09-29 19:18:50 +00:00
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int Index; // Core index identifier.
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2009-03-04 21:48:26 +00:00
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// Voice Gates -- These are SSE-related values, and must always be
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// first to ensure 16 byte alignment
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2009-09-29 19:18:50 +00:00
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V_VoiceGates VoiceGates[NumVoices];
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V_CoreGates DryGate;
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V_CoreGates WetGate;
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2009-02-18 13:36:20 +00:00
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2009-09-29 19:18:50 +00:00
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V_VolumeSlideLR MasterVol; // Master Volume
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V_VolumeLR ExtVol; // Volume for External Data Input
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V_VolumeLR InpVol; // Volume for Sound Data Input
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2010-04-25 00:31:27 +00:00
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V_VolumeLR FxVol; // Volume for Output from Effects
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2009-03-04 21:32:48 +00:00
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2009-09-29 19:18:50 +00:00
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V_Voice Voices[NumVoices];
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2010-04-25 00:31:27 +00:00
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2009-09-29 19:18:50 +00:00
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u32 IRQA; // Interrupt Address
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u32 TSA; // DMA Transfer Start Address
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u32 TDA; // DMA Transfer Data Address (Internal...)
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2009-09-30 05:35:37 +00:00
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bool IRQEnable; // Interrupt Enable
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bool FxEnable; // Effect Enable
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bool Mute; // Mute
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bool AdmaInProgress;
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2009-09-29 19:18:50 +00:00
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s8 DMABits; // DMA related?
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s8 NoiseClk; // Noise Clock
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u16 AutoDMACtrl; // AutoDMA Status
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s32 DMAICounter; // DMA Interrupt Counter
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u32 InputDataLeft; // Input Buffer
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2010-02-03 03:37:55 +00:00
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u32 InputPosRead;
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u32 InputPosWrite;
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2009-09-29 19:18:50 +00:00
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u32 InputDataProgress;
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V_Reverb Revb; // Reverb Registers
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V_ReverbBuffers RevBuffers; // buffer pointers for reverb, pre-calculated and pre-clipped.
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u32 EffectsStartA;
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u32 EffectsEndA;
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u32 ReverbX;
|
2010-04-25 00:31:27 +00:00
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|
2009-02-15 05:15:39 +00:00
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// Current size of the effects buffer. Pre-caculated when the effects start
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// or end position registers are written. CAN BE NEGATIVE OR ZERO, in which
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// case reverb should be disabled.
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2009-09-29 19:18:50 +00:00
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s32 EffectsBufferSize;
|
2010-04-25 00:31:27 +00:00
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2009-09-29 19:18:50 +00:00
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V_CoreRegs Regs; // Registers
|
2009-02-15 05:15:39 +00:00
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// Last samples to pass through the effects processor.
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// Used because the effects processor works at 24khz and just pulls
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// from this for the odd Ts.
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2009-09-29 19:18:50 +00:00
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StereoOut32 LastEffect;
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2009-02-15 05:15:39 +00:00
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2009-09-29 19:18:50 +00:00
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u8 InitDelay;
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u8 CoreEnabled;
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2009-02-15 05:15:39 +00:00
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2009-09-29 19:18:50 +00:00
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u8 AttrBit0;
|
2010-02-06 01:35:36 +00:00
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u8 DmaMode;
|
2009-02-15 05:15:39 +00:00
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|
2010-02-03 03:37:55 +00:00
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// new dma only
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bool DmaStarted;
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u32 AutoDmaFree;
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// old dma only
|
2009-09-29 19:18:50 +00:00
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u16* DMAPtr;
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u32 MADR;
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u32 TADR;
|
2009-02-15 05:15:39 +00:00
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|
2009-10-27 05:50:50 +00:00
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StereoOut32 downbuf[8];
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StereoOut32 upbuf[8];
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int dbpos, ubpos;
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|
2009-09-29 19:18:50 +00:00
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// HACK -- This is a temp buffer which is (or isn't?) used to circumvent some memory
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// corruption that originates elsewhere in the plugin. >_< The actual ADMA buffer
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// is an area mapped to SPU2 main memory.
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2010-06-16 20:15:33 +00:00
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//s16 ADMATempBuffer[0x1000];
|
2009-02-15 05:15:39 +00:00
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|
2009-09-29 19:18:50 +00:00
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// ----------------------------------------------------------------------------------
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// V_Core Methods
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// ----------------------------------------------------------------------------------
|
2009-02-15 05:15:39 +00:00
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2009-10-03 13:32:23 +00:00
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// uninitialized constructor
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V_Core() : Index( -1 ), DMAPtr( NULL ) {}
|
2009-09-29 19:18:50 +00:00
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V_Core( int idx ); // our badass constructor
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virtual ~V_Core() throw();
|
2009-02-15 05:15:39 +00:00
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|
2009-10-03 13:32:23 +00:00
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void Reset( int index );
|
2009-09-29 19:18:50 +00:00
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|
void UpdateEffectsBufferSize();
|
2009-02-18 13:36:20 +00:00
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|
2009-09-29 19:18:50 +00:00
|
|
|
s32 EffectsBufferIndexer( s32 offset ) const;
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|
|
void UpdateFeedbackBuffersA();
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|
|
void UpdateFeedbackBuffersB();
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|
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|
|
void WriteRegPS1( u32 mem, u16 value );
|
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|
|
u16 ReadRegPS1( u32 mem );
|
2010-04-25 00:31:27 +00:00
|
|
|
|
2009-09-29 19:18:50 +00:00
|
|
|
// --------------------------------------------------------------------------------------
|
|
|
|
// Mixer Section
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|
|
// --------------------------------------------------------------------------------------
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|
|
StereoOut32 Mix( const VoiceMixSet& inVoices, const StereoOut32& Input, const StereoOut32& Ext );
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|
|
void Reverb_AdvanceBuffer();
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|
|
StereoOut32 DoReverb( const StereoOut32& Input );
|
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|
|
s32 RevbGetIndexer( s32 offset );
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|
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|
|
StereoOut32 ReadInput();
|
2009-10-04 08:47:43 +00:00
|
|
|
StereoOut32 ReadInput_HiFi();
|
2010-04-25 00:31:27 +00:00
|
|
|
|
2009-09-29 19:18:50 +00:00
|
|
|
// --------------------------------------------------------------------------
|
|
|
|
// DMA Section
|
|
|
|
// --------------------------------------------------------------------------
|
|
|
|
|
|
|
|
// Returns the index of the DMA channel (4 for Core 0, or 7 for Core 1)
|
|
|
|
int GetDmaIndex() const
|
|
|
|
{
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|
|
|
return (Index == 0) ? 4 : 7;
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|
|
|
}
|
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|
|
// returns either '4' or '7'
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|
|
char GetDmaIndexChar() const
|
|
|
|
{
|
|
|
|
return 0x30 + GetDmaIndex();
|
|
|
|
}
|
|
|
|
|
|
|
|
__forceinline u16 DmaRead()
|
|
|
|
{
|
|
|
|
const u16 ret = (u16)spu2M_Read(TDA);
|
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|
|
++TDA; TDA &= 0xfffff;
|
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|
|
return ret;
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|
|
|
}
|
|
|
|
|
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|
|
__forceinline void DmaWrite(u16 value)
|
|
|
|
{
|
|
|
|
spu2M_Write( TSA, value );
|
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|
|
++TSA; TSA &= 0xfffff;
|
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|
|
}
|
|
|
|
|
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|
|
void LogAutoDMA( FILE* fp );
|
2010-02-03 03:37:55 +00:00
|
|
|
|
|
|
|
s32 NewDmaRead(u32* data, u32 bytesLeft, u32* bytesProcessed);
|
|
|
|
s32 NewDmaWrite(u32* data, u32 bytesLeft, u32* bytesProcessed);
|
|
|
|
void NewDmaInterrupt();
|
|
|
|
|
|
|
|
// old dma only
|
2009-09-29 19:18:50 +00:00
|
|
|
void DoDMAwrite(u16* pMem, u32 size);
|
|
|
|
void DoDMAread(u16* pMem, u32 size);
|
|
|
|
|
|
|
|
void AutoDMAReadBuffer(int mode);
|
|
|
|
void StartADMAWrite(u16 *pMem, u32 sz);
|
|
|
|
void PlainDMAWrite(u16 *pMem, u32 sz);
|
2009-02-15 05:15:39 +00:00
|
|
|
};
|
|
|
|
|
2009-09-29 19:18:50 +00:00
|
|
|
extern V_Core Cores[2];
|
|
|
|
extern V_SPDIF Spdif;
|
2009-02-15 05:15:39 +00:00
|
|
|
|
|
|
|
// Output Buffer Writing Position (the same for all data);
|
2009-09-29 19:18:50 +00:00
|
|
|
extern s16 OutPos;
|
2009-02-15 05:15:39 +00:00
|
|
|
// Input Buffer Reading Position (the same for all data);
|
2009-09-29 19:18:50 +00:00
|
|
|
extern s16 InputPos;
|
2009-02-15 05:15:39 +00:00
|
|
|
// SPU Mixing Cycles ("Ticks mixed" counter)
|
2009-09-29 19:18:50 +00:00
|
|
|
extern u32 Cycles;
|
|
|
|
|
2010-05-12 14:18:40 +00:00
|
|
|
extern s16* spu2regs;
|
|
|
|
extern s16* _spu2mem;
|
2009-09-29 19:18:50 +00:00
|
|
|
extern int PlayMode;
|
2009-02-15 05:15:39 +00:00
|
|
|
|
2010-06-25 01:49:26 +00:00
|
|
|
extern void SetIrqCall(int core);
|
2009-09-29 19:18:50 +00:00
|
|
|
extern void StartVoices(int core, u32 value);
|
|
|
|
extern void StopVoices(int core, u32 value);
|
|
|
|
extern void InitADSR();
|
|
|
|
extern void CalculateADSR( V_Voice& vc );
|
2009-02-20 21:48:59 +00:00
|
|
|
|
2009-09-29 19:18:50 +00:00
|
|
|
extern void spdif_set51(u32 is_5_1_out);
|
|
|
|
extern u32 spdif_init();
|
|
|
|
extern void spdif_shutdown();
|
|
|
|
extern void spdif_get_samples(s32 *samples); // fills the buffer with [l,r,c,lfe,sl,sr] if using 5.1 output, or [l,r] if using stereo
|
|
|
|
extern void UpdateSpdifMode();
|
2009-02-20 21:48:59 +00:00
|
|
|
|
2009-09-29 19:18:50 +00:00
|
|
|
namespace Savestate
|
2009-02-20 21:48:59 +00:00
|
|
|
{
|
2009-09-29 19:18:50 +00:00
|
|
|
struct DataBlock;
|
|
|
|
|
|
|
|
extern s32 __fastcall FreezeIt( DataBlock& spud );
|
|
|
|
extern s32 __fastcall ThawIt( DataBlock& spud );
|
|
|
|
extern s32 __fastcall SizeIt();
|
2009-02-20 21:48:59 +00:00
|
|
|
}
|
2009-09-29 19:18:50 +00:00
|
|
|
|
|
|
|
// --------------------------------------------------------------------------------------
|
|
|
|
// ADPCM Decoder Cache
|
|
|
|
// --------------------------------------------------------------------------------------
|
|
|
|
|
|
|
|
// The SPU2 has a dynamic memory range which is used for several internal operations, such as
|
|
|
|
// registers, CORE 1/2 mixing, AutoDMAs, and some other fancy stuff. We exclude this range
|
|
|
|
// from the cache here:
|
|
|
|
static const s32 SPU2_DYN_MEMLINE = 0x2800;
|
|
|
|
|
|
|
|
// 8 short words per encoded PCM block. (as stored in SPU2 ram)
|
|
|
|
static const int pcm_WordsPerBlock = 8;
|
|
|
|
|
|
|
|
// number of cachable ADPCM blocks (any blocks above the SPU2_DYN_MEMLINE)
|
|
|
|
static const int pcm_BlockCount = 0x100000 / pcm_WordsPerBlock;
|
|
|
|
|
|
|
|
// 28 samples per decoded PCM block (as stored in our cache)
|
|
|
|
static const int pcm_DecodedSamplesPerBlock = 28;
|
|
|
|
|
|
|
|
struct PcmCacheEntry
|
|
|
|
{
|
|
|
|
bool Validated;
|
|
|
|
s16 Sampledata[pcm_DecodedSamplesPerBlock];
|
|
|
|
};
|
|
|
|
|
|
|
|
extern PcmCacheEntry* pcm_cache_data;
|