mirror of https://github.com/PCSX2/pcsx2.git
SPU2-X: Double IRQ prevention found on real hardware. Only affects developers who didn't read the SDK documentation properly, like me. Nothing fixed as far as we know.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3294 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -275,15 +275,13 @@ void V_Core::PlainDMAWrite(u16 *pMem, u32 size)
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if ((Cores[i].IRQEnable && (Cores[i].IRQA >= TSA)) || (Cores[i].IRQA < TDA))
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{
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ConLog("DMAwrite Core %d: IRQ Called (IRQ passed). IRQA = %x Cycles = %d\n", i, Cores[i].IRQA, Cycles );
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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#else
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if ((IRQEnable && (IRQA >= TSA)) || (IRQA < TDA))
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{
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Spdif.Info |= 4 << Index;
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SetIrqCall();
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SetIrqCall(Index);
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}
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#endif
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}
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@ -305,15 +303,13 @@ void V_Core::PlainDMAWrite(u16 *pMem, u32 size)
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if( Cores[i].IRQEnable && (Cores[i].IRQA >= TSA) && (Cores[i].IRQA < TDA) )
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{
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ConLog("DMAwrite Core %d: IRQ Called (IRQ passed). IRQA = %x Cycles = %d\n", i, Cores[i].IRQA, Cycles );
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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#else
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if( IRQEnable && (IRQA >= TSA) && (IRQA < TDA) )
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{
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Spdif.Info |= 4 << Index;
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SetIrqCall();
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SetIrqCall(Index);
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}
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#endif
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}
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@ -360,8 +356,7 @@ void V_Core::DoDMAread(u16* pMem, u32 size)
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{
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if ((Cores[i].IRQEnable && (Cores[i].IRQA >= TSA)) || (Cores[i].IRQA < TDA))
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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}
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@ -379,8 +374,7 @@ void V_Core::DoDMAread(u16* pMem, u32 size)
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{
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if( Cores[i].IRQEnable && (Cores[i].IRQA >= TSA) && (Cores[i].IRQA < TDA) )
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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}
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@ -475,8 +469,7 @@ s32 V_Core::NewDmaRead(u32* data, u32 bytesLeft, u32* bytesProcessed)
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{
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if( Cores[i].IRQEnable && (Cores[i].IRQA >= TSA) || (Cores[i].IRQA < TDA) )
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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}
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@ -494,8 +487,7 @@ s32 V_Core::NewDmaRead(u32* data, u32 bytesLeft, u32* bytesProcessed)
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{
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if( Cores[i].IRQEnable && (Cores[i].IRQA >= TSA) && (Cores[i].IRQA < TDA) )
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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}
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@ -569,8 +561,7 @@ s32 V_Core::NewDmaWrite(u32* data, u32 bytesLeft, u32* bytesProcessed)
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{
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if( Cores[i].IRQEnable && (Cores[i].IRQA >= dummyTSA) && (Cores[i].IRQA < dummyTDA) )
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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}
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@ -590,8 +581,7 @@ s32 V_Core::NewDmaWrite(u32* data, u32 bytesLeft, u32* bytesProcessed)
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{
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if( Cores[i].IRQEnable && (Cores[i].IRQA >= dummyTSA) && (Cores[i].IRQA < dummyTDA) )
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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@ -609,8 +599,7 @@ s32 V_Core::NewDmaWrite(u32* data, u32 bytesLeft, u32* bytesProcessed)
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{
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if( Cores[i].IRQEnable && (Cores[i].IRQA >= dummyTSA) && (Cores[i].IRQA < dummyTDA) )
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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@ -116,8 +116,7 @@ static void __forceinline IncrementNextA(V_Core& thiscore, uint voiceidx)
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if( IsDevBuild )
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ConLog(" * SPU2 Core %d: IRQ Called (IRQA (%05X) passed; voice %d).\n", i, Cores[i].IRQA, thiscore.Index * 24 + voiceidx);
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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@ -509,8 +508,7 @@ static __forceinline void spu2M_WriteFast( u32 addr, s16 value )
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if( Cores[i].IRQEnable && Cores[i].IRQA == addr )
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{
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//printf("Core %d special write IRQ Called (IRQ passed). IRQA = %x\n",i,addr);
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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// throw an assertion if the memory range is invalid:
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@ -154,8 +154,7 @@ StereoOut32 V_Core::DoReverb( const StereoOut32& Input )
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(Cores[i].IRQA == mix_dest_b0) || (Cores[i].IRQA == mix_dest_b1) )
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{
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//printf("Core %d IRQ Called (Reverb). IRQA = %x\n",i,addr);
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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}
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@ -528,7 +528,7 @@ extern s16* spu2regs;
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extern s16* _spu2mem;
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extern int PlayMode;
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extern void SetIrqCall();
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extern void SetIrqCall(int core);
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extern void StartVoices(int core, u32 value);
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extern void StopVoices(int core, u32 value);
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extern void InitADSR();
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@ -42,8 +42,13 @@ int PlayMode;
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bool has_to_call_irq=false;
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void SetIrqCall()
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void SetIrqCall(int core)
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{
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// reset by an irq disable/enable cycle, behaviour found by
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// test programs that bizarrely only fired one interrupt
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if (Spdif.Info & 4 << core)
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return;
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Spdif.Info |= 4 << core;
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has_to_call_irq=true;
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}
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@ -856,8 +861,7 @@ static void __fastcall RegWrite_Core( u16 value )
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{
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if(Cores[i].IRQEnable && (Cores[i].IRQA == thiscore.TSA))
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{
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Spdif.Info |= 4 << i;
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SetIrqCall();
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SetIrqCall(i);
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}
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}
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thiscore.DmaWrite( value );
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