Jeffrey Pfau
|
186068adfe
|
Start filling in ARMBoard
|
2013-04-07 13:25:45 -07:00 |
Jeffrey Pfau
|
120b85713d
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Mode switching
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2013-04-07 02:36:41 -07:00 |
Jeffrey Pfau
|
bda71cafc2
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ALU instructions can write to PC
|
2013-04-07 02:01:14 -07:00 |
Jeffrey Pfau
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6e3a9a9508
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Fix writing to PC
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2013-04-07 01:57:04 -07:00 |
Jeffrey Pfau
|
68f2eed84d
|
Mini-test
|
2013-04-07 01:39:49 -07:00 |
Jeffrey Pfau
|
9575e7f0d2
|
Fix B
|
2013-04-07 01:39:08 -07:00 |
Jeffrey Pfau
|
0e2394e7d5
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De-inline ARMStep
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2013-04-07 01:46:48 -07:00 |
Jeffrey Pfau
|
b23f1ee3e3
|
GBA ROM loading
|
2013-04-07 01:46:28 -07:00 |
Jeffrey Pfau
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340d3ce6a7
|
Implement B
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2013-04-06 20:16:14 -07:00 |
Jeffrey Pfau
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5c7b4a98c6
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Load from ARM table now that we have one
|
2013-04-06 20:06:51 -07:00 |
Jeffrey Pfau
|
6bd7a5ee53
|
Fill remainder of table
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2013-04-06 20:01:32 -07:00 |
Jeffrey Pfau
|
7a0fb72e7e
|
Stub out SWI
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2013-04-06 19:58:01 -07:00 |
Jeffrey Pfau
|
d620357ac8
|
Stub out coprocessor
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2013-04-06 19:52:45 -07:00 |
Jeffrey Pfau
|
5dd2379dd5
|
Cleanup
|
2013-04-06 19:38:14 -07:00 |
Jeffrey Pfau
|
f2a1257fbb
|
Stub out branch instructions
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2013-04-06 19:22:14 -07:00 |
Jeffrey Pfau
|
1858dfeb1c
|
Stub out LDM/STM
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2013-04-06 18:44:52 -07:00 |
Jeffrey Pfau
|
7b82cc0040
|
Fill in LDR/STR block
|
2013-04-06 13:05:53 -07:00 |
Jeffrey Pfau
|
befba57fe6
|
Simple error checking
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2013-04-06 04:34:19 -07:00 |
Jeffrey Pfau
|
9efc945f1b
|
Add store callbacks
|
2013-04-06 04:20:44 -07:00 |
Jeffrey Pfau
|
96da9c7ef1
|
Partially implement LDR/STR and friends
|
2013-04-06 04:16:34 -07:00 |
Jeffrey Pfau
|
92e74a78e1
|
Apparently I can't count to 8
|
2013-04-06 02:49:54 -07:00 |
Jeffrey Pfau
|
cb2469c4f4
|
Filler for more instructions
|
2013-04-06 00:32:01 -07:00 |
Jeffrey Pfau
|
a01fc986a3
|
Begin GBA structure
|
2013-04-05 02:17:22 -07:00 |
Jeffrey Pfau
|
cd07dee7b1
|
Implement immediate shifter
|
2013-04-05 00:44:53 -07:00 |
Jeffrey Pfau
|
c07df4a337
|
Fill in immediates
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2013-04-04 03:12:22 -07:00 |
Jeffrey Pfau
|
63f6f53a80
|
Implement BIC, MOV, MVN, ORR
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2013-04-04 02:42:17 -07:00 |
Jeffrey Pfau
|
dbee1e871e
|
Add stubs, including for illegal instructions
|
2013-04-04 02:36:53 -07:00 |
Jeffrey Pfau
|
e093960316
|
Fill in more opcodes, implement CMN, CMP, TEQ, TST
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2013-04-04 02:31:32 -07:00 |
Jeffrey Pfau
|
fd4ee12eb5
|
Implement ADD, ADC, RSB, RSC, SUB
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2013-04-04 02:04:51 -07:00 |
Jeffrey Pfau
|
c1a8042db4
|
Fill in more opcodes, implement EOR
|
2013-04-04 01:27:51 -07:00 |
Jeffrey Pfau
|
4025bf89f2
|
Add boilerplate for instructions
|
2013-04-04 00:46:50 -07:00 |
Jeffrey Pfau
|
bf72532715
|
Add more framework for loading instructions
|
2013-04-03 22:34:49 -07:00 |
Jeffrey Pfau
|
009bef870c
|
Initial commit
|
2013-04-03 22:12:15 -07:00 |