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mgba
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4,830 Commits 36 Branches 38 Tags 63 MiB
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4830 Commits

Author SHA1 Message Date
Jeffrey Pfau 9ab3b0c20a Implement ADD(7)/SUB(4) 2013-04-12 02:22:37 -07:00
Jeffrey Pfau 1ac7f0eb15 Implement MOV(3) 2013-04-12 02:15:47 -07:00
Jeffrey Pfau 37ce1383fc Set bits in MSR properly 2013-04-12 02:10:09 -07:00
Jeffrey Pfau 6097890251 Print proper register 2013-04-12 02:04:51 -07:00
Jeffrey Pfau 688af6cdee Add some basic input to the debugger 2013-04-12 02:03:11 -07:00
Jeffrey Pfau 1db7f5b179 Initial debugger 2013-04-12 01:32:43 -07:00
Jeffrey Pfau b07e052698 Move CMakeList 2013-04-11 23:58:13 -07:00
Jeffrey Pfau 09455b50d3 Add linenoise module 2013-04-11 23:52:51 -07:00
Jeffrey Pfau d90d7d1899 Implement BL 2013-04-11 03:14:09 -07:00
Jeffrey Pfau 133d574667 Implement LDMIA/STMIA/PUSH/POP 2013-04-11 03:01:07 -07:00
Jeffrey Pfau 1616ec83a2 Stub out incomplete addressing mode 1 opcodes 2013-04-11 02:13:35 -07:00
Jeffrey Pfau 4fbed66bdb Start fleshing out addressing mode 1 2013-04-11 01:32:30 -07:00
Jeffrey Pfau d278429b43 Implement BX 2013-04-11 00:14:12 -07:00
Jeffrey Pfau a511df7920 Put stub definitions in all of Thumb 2013-04-10 23:38:18 -07:00
Jeffrey Pfau 7e5de27f43 Add ability to run Thumb code 2013-04-10 23:34:50 -07:00
Jeffrey Pfau 9a0d14645b Log stubs 2013-04-10 22:52:46 -07:00
Jeffrey Pfau 9a7f0f4a74 Stub out BL, finishing Thumb table 2013-04-10 21:11:05 -07:00
Jeffrey Pfau 87863ad97a Stub out B 2013-04-10 21:09:22 -07:00
Jeffrey Pfau cbc17ad77e Stub out SWI 2013-04-10 21:05:19 -07:00
Jeffrey Pfau e89f49459a Stub out conditional branches 2013-04-10 21:04:41 -07:00
Jeffrey Pfau d5adcac319 Stub out LDMIA/STMIA 2013-04-10 20:58:05 -07:00
Jeffrey Pfau 0db11ec6bb Stub out BKPT (not in ARMv4T, but still useful) 2013-04-10 20:50:56 -07:00
Jeffrey Pfau 5e78400a25 Stub out POP/PUSH 2013-04-10 00:00:24 -07:00
Jeffrey Pfau 99d0b76f3b Stub out ADD7 and SUB4 2013-04-09 23:47:37 -07:00
Jeffrey Pfau 08065d865d Stub out ADD from PC and SP 2013-04-09 23:45:08 -07:00
Jeffrey Pfau 28ecc97671 Stub out LDR/STR from SP 2013-04-09 23:37:28 -07:00
Jeffrey Pfau e3818cf7b6 Stub out more load/stores with immediates 2013-04-09 23:34:25 -07:00
Jeffrey Pfau 39c776eb37 Stub out more load/store format 2 2013-04-09 23:27:37 -07:00
Jeffrey Pfau 5165e0131e Put in missing BX 2013-04-09 23:16:30 -07:00
Jeffrey Pfau f42c8d111e Stub out STR2 2013-04-09 23:00:31 -07:00
Jeffrey Pfau 11de611fd2 Stub out LDR3 2013-04-09 22:57:24 -07:00
Jeffrey Pfau 5e18eabd04 Stub out format 8 2013-04-09 22:51:21 -07:00
Jeffrey Pfau be021605bc Define data format 5 2013-04-09 22:35:51 -07:00
Jeffrey Pfau e577df2142 Fix data format 3 2013-04-09 22:35:38 -07:00
Jeffrey Pfau d3abd2dc63 Minor ROM access optimization 2013-04-09 22:20:35 -07:00
Jeffrey Pfau 027e27caa4 Add data form 3 2013-04-09 04:20:14 -07:00
Jeffrey Pfau 56c3685ba6 ADD/SUB 1 stubs 2013-04-09 03:20:32 -07:00
Jeffrey Pfau 2618c39a5d Macro-insanity for Thumb 2013-04-09 03:15:50 -07:00
Jeffrey Pfau 76dbfce3c3 Start filling in THUMB table with insane preprocessor tricks 2013-04-09 02:57:24 -07:00
Jeffrey Pfau 70eb3634a0 Fix warnings + LDR[B]T/STR[B]T 2013-04-08 03:14:18 -07:00
Jeffrey Pfau 9a1fb100c7 Load/store working RAM 2013-04-08 03:13:37 -07:00
Jeffrey Pfau 93a2f16066 Loading 8/16 bits from ROM 2013-04-08 02:13:40 -07:00
Jeffrey Pfau 67c00f378a Ensure CPSR privilege gets updated in MSR 2013-04-08 00:21:28 -07:00
Jeffrey Pfau 37ad6218da Don't double-execute AL instructions 2013-04-08 00:17:54 -07:00
Jeffrey Pfau 4f3e77c87e Implement MSR 2013-04-08 00:15:16 -07:00
Jeffrey Pfau 4bba75dd0a Separate out ISA files 2013-04-07 21:15:32 -07:00
Jeffrey Pfau b02fdd3dda Remove inline conditions and add ARM specialization 2013-04-07 20:37:48 -07:00
Jeffrey Pfau 186068adfe Start filling in ARMBoard 2013-04-07 13:25:45 -07:00
Jeffrey Pfau 120b85713d Mode switching 2013-04-07 02:36:41 -07:00
Jeffrey Pfau bda71cafc2 ALU instructions can write to PC 2013-04-07 02:01:14 -07:00