c8a0058ebc
implementation of VRAM and other misc crap
2016-12-05 23:17:03 +01:00
8c8c78cf83
misc fixes.
...
shit in place to start implementing GPU shit.
GPL headers added before it's too late. (TODO: put actual GPL license in the repo)
also added URL that doesn't exist yet but is reserved.
2016-12-05 18:02:29 +01:00
343797f47d
* somewhat proper event scheduler
...
* support for timers
* fixes, additions, shit
2016-12-05 17:08:24 +01:00
a14c01208a
fix some shit. add support for SPI and firmware.
2016-12-04 03:20:50 +01:00
d7c1d77ba2
more instructions. shared WRAM.
2016-12-03 18:29:19 +01:00
1e4086e1b6
moar instructions and shit implemented
2016-12-03 17:58:24 +01:00
f2858e1c47
less amnesia! ITCM, DTCM, corresponding CP15 support
2016-12-03 16:13:04 +01:00
53bef35cd1
more crap implemented!
2016-12-03 15:15:34 +01:00
948cdeab59
amnesia is over
2016-12-03 13:42:27 +01:00
30f85e3400
more instructions. some handling of CPU mode switching.
2016-12-03 04:41:10 +01:00
6213245f3a
moar shit
2016-12-03 04:05:23 +01:00
ae6e9d96da
ARM ALU is done with. as well as other shit.
2016-12-03 03:10:26 +01:00
844ca45055
add MSR/MRS. also fix misc error with LDR ROR effect.
...
see shibboleet, I can do it too :>
2016-12-03 02:09:04 +01:00
23d584ca4c
implement LDR/STR/LDRB/STRB.
...
more macro soup.
2016-12-03 01:31:33 +01:00
97ec988dae
more shit! some start of ALU emulation
2016-11-25 00:08:53 +01:00
f74fb2dd27
well, adding shit. laying out the base for the interpreter. really dirty code.
2016-11-24 18:31:49 +01:00
3505ec993b
hey look, more crap
...
no MrRean this doesn't run NSMB yet
2016-11-03 01:38:58 +01:00
5b7ae6dab3
add more crap
2016-05-16 17:48:40 +02:00
cfdfd4b231
first real commit, some shit is in
2016-05-16 03:40:11 +02:00
e0255fb957
Initial commit
2016-05-16 03:34:14 +02:00
StapleButter