26a6e887ad
aarch64 neon impl take one
...
fingers crossed it compiles!
2024-10-16 22:26:56 -04:00
9f2b097e96
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-15 22:36:29 -04:00
52ddaa73cf
fix resets
2024-10-15 22:36:21 -04:00
21763ceed3
reduce memtimings lut granularity
2024-10-15 21:20:10 -04:00
c605c93d8e
still dumb
2024-10-15 21:08:46 -04:00
3fcdc45029
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-15 21:08:13 -04:00
c00b188c05
im dumb
2024-10-15 21:08:07 -04:00
460fd45aed
remove some old code
2024-10-15 20:27:09 -04:00
bb2727b786
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-15 20:25:16 -04:00
05c153e9ab
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-10-15 20:23:14 -04:00
5f003eb967
fix builds with jit disabled
2024-10-15 20:23:03 -04:00
d476593eec
add notes
2024-10-15 12:40:35 -04:00
d8d2fcd94a
more optimizations
2024-10-14 23:43:11 -04:00
263dd20ec3
nvmnvmnvm
2024-10-14 22:48:25 -04:00
ca7d938bb1
update for new write buffer implementation
2024-10-14 20:18:23 -04:00
9f3ebeafa7
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-14 20:16:58 -04:00
026719acef
improve timing model
2024-10-14 20:15:03 -04:00
f74c21d110
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-13 20:07:04 -04:00
801f43dfc5
reimplement codemem
...
i dont feel like i actually had a good reason for disabling this...
2024-10-13 20:06:39 -04:00
1afefdce1d
use sse for set lookups
2024-10-13 08:39:07 -04:00
206fc94d68
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-10-12 14:35:28 -04:00
e0e78a2bc8
make empty r-list instructions a bit nicer
...
pass bools as a single u8 instead and combine thumb and restore cpsr flags since they're mutually exclusive
2024-10-12 11:10:06 -04:00
a8722d8c56
tcms shouldn't be cacheable
2024-10-11 02:47:41 -04:00
6b8671d80a
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-11 02:05:44 -04:00
9f6cbd8e84
implement drain write buffer cache command
2024-10-10 23:24:20 -04:00
3d246ddf73
tcms just aren't bufferable
2024-10-10 22:54:33 -04:00
34bba2589e
tcm (and cache?) reads dont trigger write buffer drains
...
additionally drains are triggered even in no cache + no buffer regions despite documentation not specifying such
2024-10-10 20:52:47 -04:00
5c120f45ee
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-10-10 20:34:00 -04:00
787d0c9afc
mrc r15 updates flags
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also my prior implementation made mrc w/ r15 raise an exception by accident
oops!
2024-10-10 11:09:07 -04:00
93dce82b07
implement cmp with "rd == 15" on arm9
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cmp and friends with bits 12-15 set to 1 borrow characteristics from their legacy 26 bit p variants
thumb version does nothing of note
2024-10-10 10:48:17 -04:00
3870216fd0
correction:
2024-10-10 03:53:51 -04:00
53b38c363f
ok no it didn't lie to me
2024-10-10 03:32:53 -04:00
e25dca0030
writing to the write buffer has a 1 cycle delay before it can be done again
2024-10-10 03:14:01 -04:00
633572e5cc
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-10 02:20:17 -04:00
2c3ef9f903
writing to the write buffer seems to require bus cycle alignment
2024-10-10 02:20:02 -04:00
60234a96b8
im dumb
2024-10-09 18:10:02 -04:00
0638c41220
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-09 18:06:23 -04:00
746f6edb0a
should addr writes to the fifo take 1 cycle? probably?
2024-10-09 18:06:17 -04:00
f2bc0fae4d
cache imp
2024-10-09 18:05:26 -04:00
225bd50e13
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-10-09 17:56:10 -04:00
35c382acab
jit
2024-10-09 17:51:00 -04:00
9cf065e54f
idk
2024-10-09 17:47:08 -04:00
6e30cf3bfb
functional write buffer prototype
2024-10-09 17:46:50 -04:00
286de74666
Merge branch 'less-ambitious-timing-rework' into chemical-x
2024-09-29 22:43:38 -04:00
c62f0f1244
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-09-29 22:42:40 -04:00
19e0b18d15
Merge remote-tracking branch 'upstream/master' into interpreter-fixes
2024-09-29 22:41:52 -04:00
e9446fa9dc
implement 3 configurable and toggleable framerate targets ( #2159 )
...
This pr allows for configuring the framerate target and adds support for two other framerate targets, a "fastforward" and "slowmo" target which can be enabled via either a toggle or holding a button.
this allows for supporting a more accurate framerate target and allows for users to slow down the speed of gameplay if they so desire
2024-09-29 09:30:13 +02:00
a11208ec6d
oops
2024-09-24 21:02:17 -04:00
3065141ed7
probably not faster
2024-09-24 17:04:52 -04:00
2eb6d44c2c
prevent use after free through focusOutEvent when window is closed
2024-09-24 20:08:07 +02:00
Jaklyy