Commit Graph

48 Commits

Author SHA1 Message Date
Flyinghead 2c54dfd132 arm64: check CpuRunning at end of each timeslice. clean up
fixes hang when exiting service menu in kofnw
2020-04-24 19:56:38 +02:00
scribam e99aac3575 Remove "using namespace std;" 2020-03-30 23:00:43 +02:00
Flyinghead 4fa18dbaea arm64: fix xtrct dynarec implementation
Fixes Speed Devils issues
2020-01-09 13:25:31 +01:00
Flyinghead 9d3ee3b57f dyna: get rid of SmcCheckLevel options. Fix rec-cpp
Block check is now full or off depending on block protection
rec-cpp: Add missing opcode call classes and allow for immediate args
2019-09-29 18:18:46 +02:00
Flyinghead 106dfc3f71 Add Discord link. non-functional changes 2019-09-27 22:00:52 +02:00
Flyinghead 419785b929 arm64: support for 64b immediate memory reads 2019-09-27 14:40:47 +02:00
Flyinghead 91a753f224 Fix naked functions for GCC 2019-07-30 12:40:34 +02:00
Flyinghead be5aca66e1 cfg,dynarecs,reios: use new logging 2019-07-01 18:23:10 +02:00
Flyinghead 871260cfcf naomi: better error handling when loading a gdrom
x64 and arm64 dynarecs: Support 64-bit immediate readm (ninjaslt)
2019-06-26 19:06:30 +02:00
Flyinghead 0b8a312fea rec-arm64: simplify read/write mem rewrite logic
pass exception pc in x2 reg for both slow/fast paths
infer the op type and size from the armv8 op encoding
rewrite doesn't need access to the block anymore
add support for some imm args
2019-06-18 15:07:32 +02:00
Flyinghead 8819c9d536 arm64: handle pref with imm arg. some refactoring 2019-06-10 14:35:27 +02:00
Flyinghead 3dd16e80d2 arm64 and x64 recs use ssa regalloc 2019-06-10 13:57:10 +02:00
Flyinghead b8a00b9c7d rec-arm64/x64: only do regalloc on rewrite when needed 2019-05-28 20:03:08 +02:00
Flyinghead cafd1c3c49 rec-arm64: do a full regalloc when rewriting mem access in mmu mode 2019-05-28 19:43:17 +02:00
Flyinghead 5b2cef3fdd dynarec: add negc and xtrct op codes
native implementation of negc and xtrct for x64 and arm64
rec-arm64: pass exception pc in w27 instead of sh4 context
inline mmu_intruction_translation() and clean up
2019-05-26 13:30:05 +02:00
Flyinghead 2c91ca96fc rec-arm64: fix transitions to/from mmu
exit mainloop() before regenerating it
make sure dynarec cache is cleared between runs
when deserializing, clear dynarec cache after setting mmu state
2019-05-25 18:03:18 +02:00
Flyinghead cc4b59f5fa rec-arm64: generate main loop dynamically
different code for mmu vs. !mmu
Switching mmu state not yet supported
2019-05-24 18:18:32 +02:00
Flyinghead e3d95f2258 wince: unify _vmem and vmem32. Use 4GB virtual space on 64-bit arch
On 64-bit architectures, _vmem first tries to allocate 4GB then falls
back to 512 MB.
The same virtual space is now used by _vmem and vmem32 (mmu)
2019-05-23 11:40:33 +02:00
Flyinghead c2c0215e1b Merge remote-tracking branch 'origin/master' into fh/wince-dynarec 2019-05-22 14:13:00 +02:00
Flyinghead fb76efb08d Standard functions for virtual mem alloc/protect/map/... 2019-05-22 11:41:12 +02:00
David Guillen Fandos 3463872fdf Fix small clang build issue. 2019-05-13 01:35:40 +02:00
David Guillen Fandos 65e2218792 Fix ARM64 rewrites with NO_RWX_PAGES
Tested on nvidia jetson and Android, so far works great.
2019-05-13 00:23:18 +02:00
David Guillen Fandos aa4fc8dd60 Move cache invalidation to vmem_platform and implement NO_RWX on arm64
Still not functional yet, this commit breaks arm64 on android for instance.
Rewrites are not yet figured out, will push them in the next commit.
2019-05-12 23:25:43 +02:00
David GF 5ba56627a9 Optimize rec-ARM64 by emitting less instructions on loads.
Fast load uses 3 or 4 insts, whereas slow load takes 2+.
On A57 measured ~3% perf, which is expected for an OOO CPU, hopefully
perf will be much better on A53 and other in-order CPUs.
2019-05-09 00:10:01 +02:00
Flyinghead 810b8a59da wince: 32-bit virtual mem space
use fast mem read/write for x64 and arm64 dynarecs
2019-04-29 18:23:00 +02:00
Flyinghead 011849ea74 wince: arm64 dynarec fixes 2019-04-19 17:20:55 +02:00
Flyinghead 553f6054ce NO_MMU build fixes 2019-04-19 11:56:11 +02:00
Flyinghead dece3fc13e wince: use setjmp/longjmp instead of try/catch for dynarecs
WinCE fast mmu implementation
WIP arm64 dynarec
2019-04-15 18:02:34 +02:00
Stefanos Kornilios Mitsis Poiitidis af6993a819 dynarec: Refactor smc-option a bit 2019-03-30 07:16:44 +01:00
Flyinghead 6438a402df dynarec: add option to control smc code checks: none, fast, full 2019-03-29 19:23:37 +01:00
Flyinghead 5242af5879 rec-arm64: better pref fix 2019-03-28 14:26:04 +01:00
Flyinghead 20b09cf1b7 arm64: disable partially implemented 0x1337 pref optimization hack 2019-03-28 13:02:08 +01:00
Flyinghead fca6f3cecb dsp arm64: fix crash when VIXL_DEBUG is off 2019-01-24 21:47:55 +01:00
Flyinghead 91cfd4b2f7 Reserve and allocate maximum RAM/VRAM/ARAM in all cases
Reserve enough virtual memory space for DC and Naomi
Allocate dynarec entry point tables for max possible ram
Free mem and release vmem on exit
2019-01-24 09:48:58 +01:00
Flyinghead 91b76f0c16 arm64 dynarec: missing edits 2019-01-22 18:40:36 +01:00
Flyinghead 75a04d6d28 arm64 dynarec: implement tail calling and block linking 2019-01-22 18:37:04 +01:00
Flyinghead a3682e7b22 arm64 dynarec: revert to non-explode spans and minor optimizations
Added some profiling
2019-01-21 12:54:29 +01:00
Flyinghead 573f285f3b arm64 dynarec: save x29 and x30 in ngen_mainloop prologue 2019-01-18 00:06:33 +01:00
Flyinghead cb8e81d473 arm64: direct memory access and jit rewrite
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
2019-01-16 13:04:16 +01:00
Flyinghead c2a048e8d8 arm64: use explode_spans to allocate regs for V2 and F64 params 2019-01-15 08:47:07 +01:00
Flyinghead 523b110412 arm64: dynarec fixes 2019-01-13 11:32:28 +01:00
Flyinghead fc05727538 dynarecs clean-up
move GetRegPtr and ngen_FailedToFindBlock to sh4/dyna
2019-01-11 23:52:20 +01:00
Flyinghead e5ee48efa9 arm64: implement swaplb and pref. Various optimizations 2019-01-11 15:58:48 +01:00
Flyinghead 1c80207879 arm64: implement ftrv and frswap 2019-01-10 21:22:53 +01:00
Flyinghead 18a16f83ac arm64: more native opcodes implemented 2019-01-10 18:58:29 +01:00
Flyinghead a9a2aad8f6 arm64: use register spans allocation. Implement some opcodes natively 2019-01-09 16:35:23 +01:00
Flyinghead 3d8b01c515 arm64: Use x28 as sh4 regs base pointer. Reg cache to avoid fetches.
Block check optimization
2019-01-08 13:29:08 +01:00
Flyinghead 67a4eb8f1f arm64 dynarec using vixl 2019-01-07 21:50:46 +01:00