Connor McLaughlin
|
aec01d3890
|
Bus: Reduce RAM write delay
|
2019-11-27 00:01:47 +10:00 |
|
Connor McLaughlin
|
b3cf18b593
|
Don't create .7z within .zip for windows build
|
2019-11-26 20:00:43 +10:00 |
|
Connor McLaughlin
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519dbc818d
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CPU/CodeCache: Fix DMA writes not invalidating code blocks
Fixes Crash Team Racing and Spyro in Cached Interpreter/Recompiler
modes.
|
2019-11-26 19:45:38 +10:00 |
|
Connor McLaughlin
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47cbe75b48
|
Create windows-build.yml
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2019-11-25 17:15:32 +10:00 |
|
Connor McLaughlin
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771a151567
|
GPU/OpenGL: Use CopyImageSubData for VRAM copies
Not correct with regard to the mask bit handling, but better than
blitting.
|
2019-11-25 00:27:23 +10:00 |
|
Connor McLaughlin
|
22e8b6b0a7
|
System: Fall back to software when D3D11 selected on Linux
|
2019-11-25 00:24:22 +10:00 |
|
Connor McLaughlin
|
446ad20d2b
|
Update README.md with system requirements
|
2019-11-25 00:22:43 +10:00 |
|
Connor McLaughlin
|
0bc7333e6e
|
GPU/OpenGL: Set GLSL version string dynamically
Rather than hardcoding to 3.3.
|
2019-11-25 00:17:17 +10:00 |
|
Connor McLaughlin
|
db0d11c2ff
|
GPU/HW: Cull primitives larger than 1024x512
|
2019-11-24 23:46:33 +10:00 |
|
Connor McLaughlin
|
024ed01bbb
|
GPU/HW: Set alpha to mask bit setting
|
2019-11-24 23:30:35 +10:00 |
|
Connor McLaughlin
|
bc5a247a4b
|
GPU/HW: Use dual-source blend to split alpha and mask
|
2019-11-24 23:28:01 +10:00 |
|
Connor McLaughlin
|
9d6d00480c
|
GPU: Implement mask bit handling in software renderer
Still needs implementation in the hardware renderers.
|
2019-11-24 18:47:42 +10:00 |
|
Connor McLaughlin
|
6c6bf8714c
|
CPU/Recompiler: Only check interpreter load delay when it's dirty
|
2019-11-24 16:51:08 +10:00 |
|
Connor McLaughlin
|
e3965d9be3
|
CPU/Recompiler: Fix b{ltz,gez}al when using a load delayed register
|
2019-11-24 16:47:21 +10:00 |
|
Connor McLaughlin
|
8c5fcc8f48
|
CPU: Fix more load delay slot issues
Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until
issues are fixed.
|
2019-11-24 01:11:51 +10:00 |
|
Connor McLaughlin
|
897e75fa8e
|
CPU/Recompiler: Fix code generation crash on Linux
|
2019-11-23 21:38:38 +10:00 |
|
Connor McLaughlin
|
889bd73ac8
|
CPU: Add settings for execution mode
|
2019-11-23 20:22:09 +10:00 |
|
Connor McLaughlin
|
b8de55b9b8
|
CPU/Recompiler: Implement simple block linking
|
2019-11-23 19:56:19 +10:00 |
|
Connor McLaughlin
|
201be8aa9c
|
CPU: Fix interpreter speed regression from recompiler
Seems the logging prevented ExecuteInstruction() from being inlined.
|
2019-11-23 19:49:44 +10:00 |
|
Connor McLaughlin
|
5d0a6f88ad
|
CDROM: Header valid/playing should not be set on SeekL
Fixes Syphon Filter locking up on boot.
|
2019-11-23 19:13:50 +10:00 |
|
Connor McLaughlin
|
9da4e642af
|
CMake: Include SDL2 module in-tree
|
2019-11-23 19:07:54 +10:00 |
|
Connor McLaughlin
|
bb4ef2103e
|
GPU: Fix dump vram-to-cpu copies
|
2019-11-23 19:07:17 +10:00 |
|
Connor McLaughlin
|
da69085b3c
|
CPU/Recompiler: Implement nor
|
2019-11-23 12:53:44 +10:00 |
|
Connor McLaughlin
|
2f3107216a
|
CPU/Recompiler: Implement syscall/break
|
2019-11-23 12:51:17 +10:00 |
|
Connor McLaughlin
|
d2d0d5287b
|
CPU/Recompiler: Implement slt/sltu/slti/sltiu
|
2019-11-23 01:20:59 +10:00 |
|
Connor McLaughlin
|
bdc47319dc
|
CPU/Recompiler: Remove unused variable
|
2019-11-23 00:45:46 +10:00 |
|
Connor McLaughlin
|
e2850b5a6c
|
CPU/Recompiler: Implement and/or/xor
|
2019-11-23 00:41:25 +10:00 |
|
Connor McLaughlin
|
a9cbc08890
|
CPU/Recompiler: Cleanup/combine shift immediate/variable
|
2019-11-23 00:35:32 +10:00 |
|
Connor McLaughlin
|
5b745864e3
|
CPU/Recompiler: Implement sub/subu
|
2019-11-23 00:30:47 +10:00 |
|
Connor McLaughlin
|
f14ad1d3c4
|
CPU/Recompiler: Implement add/addu/addi
|
2019-11-23 00:26:56 +10:00 |
|
Connor McLaughlin
|
641e68db95
|
CPU/Recompiler: Implement b{gez,ltz}(al)?
|
2019-11-23 00:25:51 +10:00 |
|
Connor McLaughlin
|
167e2a3454
|
CPU/Recompiler: Implement j/jal/jr/jalr/beq/bne/bgtz/blez
|
2019-11-22 21:41:10 +10:00 |
|
Connor McLaughlin
|
44676a6810
|
Update README.md
|
2019-11-22 18:33:35 +10:00 |
|
Connor McLaughlin
|
ff398a3f77
|
Revert "Frontend: Swap L1/R1 and L2/R2 bindings"
This reverts commit a25fe54a4b.
|
2019-11-22 18:28:41 +10:00 |
|
Connor McLaughlin
|
11966e4caf
|
CPU/Recompiler: Write exception exits to far code buffer
Keeps the hot path nice and clean.
|
2019-11-22 18:01:28 +10:00 |
|
Connor McLaughlin
|
7b0978119b
|
CPU: Only write exceptions to log when logging
|
2019-11-22 17:54:06 +10:00 |
|
Connor McLaughlin
|
f46160ac46
|
CPU/Recompiler: Implement mult/multu
|
2019-11-22 16:45:13 +10:00 |
|
Connor McLaughlin
|
e5c0d28fdc
|
CPU/Recompiler: Implement mfhi/mthi/mflo/mtlo
|
2019-11-22 10:53:54 +10:00 |
|
Connor McLaughlin
|
51a873e58d
|
CPU: Expand register file to include hi/lo/pc/npc
|
2019-11-22 10:53:54 +10:00 |
|
Connor McLaughlin
|
330d512831
|
CPU: Write exceptions to trace log
|
2019-11-22 10:53:15 +10:00 |
|
Connor McLaughlin
|
9e82afac7b
|
CPU/Recompiler: Support block revalidation instead of flushing
|
2019-11-22 00:32:40 +10:00 |
|
Connor McLaughlin
|
7aafaeacbc
|
CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions
Currently not passing CPU tests when combined with lwl/lwr.
|
2019-11-21 23:34:04 +10:00 |
|
Connor McLaughlin
|
9e3bb62216
|
CPU/CodeCache: Fast path for self-linking blocks
|
2019-11-20 01:19:03 +10:00 |
|
Connor McLaughlin
|
09de3819eb
|
CPU/Recompiler: Implement sra/srav instructions
|
2019-11-20 01:00:31 +10:00 |
|
Connor McLaughlin
|
4f436461ff
|
CPU/Recompiler: Combine shift instructions
|
2019-11-20 01:00:31 +10:00 |
|
Connor McLaughlin
|
51600c5bc0
|
CPU/Recompiler: Implement andi/xori, combine BitwiseImmediate
|
2019-11-20 01:00:31 +10:00 |
|
Connor McLaughlin
|
6157aa9d21
|
CPU/Recompiler: Implement srlv/srrv instructions
|
2019-11-20 00:32:41 +10:00 |
|
Connor McLaughlin
|
82cbb6e1b8
|
CPU/Recompiler: Implement srl instruction
|
2019-11-20 00:21:02 +10:00 |
|
Connor McLaughlin
|
5217088d82
|
CPU: Refactor load delay handling
Now works when mixing interpreter and recompiler code.
|
2019-11-20 00:15:15 +10:00 |
|
Connor McLaughlin
|
1d6c4a3af1
|
CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
|
2019-11-19 20:38:05 +10:00 |