Commit Graph

35566 Commits

Author SHA1 Message Date
JosJuice f70ddebb40 JitArm64: Disable indexed paired loadstore instructions
Since the merge of b24b79e, we've gotten reports that the
following games are broken on JitArm64:

* Sonic Heroes
* The SpongeBob SquarePants Movie
* Astérix & Obélix XXL
* The Incredibles: Rise of the Underminer

Disabling the register cache avoids the issue, so the cause
of the bug might not actually have anything to do with the
newly implemented instructions. Nevertheless, I don't want
to ship a beta with this problem present, so I would like to
disable these instructions for the time being.
2021-08-22 22:16:02 +02:00
JosJuice 0cf8405126 JitArm64: Make HandleFastmemFault less unsafe
HandleFastmemFault works correctly when faults only happen in
expected locations, but it does some things that are rather
dangerous for faults in unexpected locations, like decrementing
an iterator without checking whether it's equal to begin.

This change cleans up the logic by making m_fault_to_handler's
key be the end of the fastmem region instead of the start.
2021-08-22 19:51:21 +02:00
Pokechu22 44129dda4c dsp_rom: Add version numbers and hashes to VerifyRoms and readme 2021-08-22 10:49:46 -07:00
Pokechu22 a5e2a0d973 dsp_rom: Remove illegal use of AX with SRS 2021-08-22 10:49:46 -07:00
Tillmann Karras c881f4db22 dsp_rom: add pseudo code and fix small accuracy issues
Doesn't fix anything, hence not upstreaming this.
2021-08-22 10:49:46 -07:00
Pokechu22 d0b40528e5 dsp_rom: Fix readme eols and trailing whitespace 2021-08-22 10:49:46 -07:00
Pokechu22 9b1d370478 DSPLLE: Implement conditional variants of RTI 2021-08-22 10:49:46 -07:00
Pokechu22 f9e36bfa67 DSPLLE: Split SRS into SRS and SRSH
Hardware testing indicated that SRS uses a different list of registers than LRS (specifically, acS.h can be used with SRSH but not LRS, and SRS does not support AX registers, and there are 2 encodings that do nothing).
2021-08-22 10:49:46 -07:00
Pokechu22 51c26d82a5 DSPSpy: Require user to specify a test_main label
This makes the point where execution starts more obvious compared to a start_of_test label at the end of the include, and allows putting other functions at the start of the file.  This change also modifies the existing tests to build with this change.
2021-08-22 10:49:46 -07:00
Pokechu22 5f7c852d22 DSPSpy: Split main dsp_base logic from interrupt handlers
This is so that interrupt handlers can be manually specified in tests that need them.
2021-08-21 20:10:42 -07:00
Pokechu22 87dc668522 DSPSpy: Fix hang when using the free DSP rom 2021-08-21 20:10:42 -07:00
Tilka e7a30dd468
Merge pull request #10048 from Pokechu22/dsp-manual
Improvements to DSP manual
2021-08-22 04:06:49 +01:00
Pokechu22 88d2a7260d DSPLLE: Improve various instruction comments
* DSP*Arithmetic: Fix grammar for ANDCF and ANDF
* DSP*Arithmetic: Fix registers used by MOVAX and MOV
* DSP*Branch: Fix documentation for JMPR
* DSP*Branch: Fix HALT encoding ("I think I saw a two")
* DSP*ExtOps: Fix 'LN encoding (The listed encoding was for 'L)
* DSP*ExtOps: Improve documentation for 'LD and 'LDAX
* DSPJitExtOps: Correct typo
* DSP*LoadStore: Remove obsolete comment about pc in SRS (This was fixed in 1419e7e5b2)
* DSP*LoadStore: Fix comments for LRR/SRR
* DSP*Misc: Improve documentation for SBCLR and SBSET
* DSP*Multiplier: Fix MULXAC encoding (The previous encoding was for MULXMVZ)
* DSP*Multiplier: Fix tabs in MULCAC and MULCMVZ (There are some other tabs in comments in the JIT, but these are the only ones that are in instruction comments instead of indicating the corresponding interpreter code.  Those other comments can be corrected in a different PR, as they're not documentation related.)
* DSPJitMultiplier: Fix MULXMVZ typo
2021-08-21 17:07:14 -07:00
Pokechu22 ddc2dd91d2 DSPSpy: Create README.md 2021-08-21 17:07:14 -07:00
Pokechu22 1ad8dd7634 DSPSpy: Remove build.sh and sbuild.sh
This also removes the emu folder from the Makefile, and the Config.h file.  I'm not entirely sure what build.sh was for, but my best guess is that it was some kind of tool to run emulated DSP code at the same time as the actual DSP code and compare the results.  I don't know if it ever worked, but it certainly doesn't work now.
2021-08-21 17:07:14 -07:00
Pokechu22 3eaf06d2e0 DSPSpy: Create .gitignore 2021-08-21 17:07:14 -07:00
Pokechu22 4fa9517ba3 docs/DSP: Update version and history
The GFDL requires the history section to be updated.
2021-08-21 17:07:14 -07:00
Pokechu22 9ef388f1c3 docs/DSP: NEG can set overflow and carry 2021-08-21 17:07:14 -07:00
Pokechu22 602163b623 docs/DSP: Fix typo with MULCMVZ and MULCMV 2021-08-21 17:07:14 -07:00
Pokechu22 c51c339424 docs/DSP: Document initialization process 2021-08-21 17:07:14 -07:00
Pokechu22 5bf59f3ce4 docs/DSP: A failed RETcc only inceases PC by 1, not 2
This is because RETcc is a single-word instruction.
2021-08-21 17:07:14 -07:00
Pokechu22 1b84721b7f docs/DSP: Add RTIcc 2021-08-21 17:07:14 -07:00
Pokechu22 5611bd8f23 docs/DSP: Change conditional names to match Dolphin 2021-08-21 17:07:14 -07:00
Pokechu22 af10eab938 docs/DSP: Split SRSH from SRS 2021-08-21 17:07:14 -07:00
Pokechu22 408623b6e9 docs/DSP: Document behavior of LRS/SRS/SI with CR 2021-08-21 17:07:14 -07:00
Pokechu22 8fa649e1d6 docs/DSP: Document masking/sign extension behavior of registers 2021-08-21 17:07:14 -07:00
Pokechu22 7c645e1865 docs/DSP: Fix registers used by MOVAX and MOV 2021-08-21 17:07:14 -07:00
Pokechu22 be753e5a45 docs/DSP: MADDC operates on acS.m, not acS.l
This matches the prose and Dolphin's implementation.
2021-08-21 17:07:13 -07:00
Pokechu22 0796fada17 docs/DSP: Add information about flags for every instruction 2021-08-21 17:07:13 -07:00
Pokechu22 9249454f33 docs/DSP: Document overflow and carry behavior 2021-08-21 17:07:13 -07:00
Pokechu22 a8ec0ad27f docs/DSP: Fix MULXAC bytes
The previous encoding was for MULXMVZ.
2021-08-21 16:05:06 -07:00
Pokechu22 2db2683ea9 docs/DSP: Fix 'S format 2021-08-21 16:05:06 -07:00
Pokechu22 139e05800f docs/DSP: Fix 'LS encoding
The old encoding was a copy of 'LN.
2021-08-21 16:05:06 -07:00
Pokechu22 8767df40e5 docs/DSP: Fix acD/acR conflation in shift instructions 2021-08-21 16:05:06 -07:00
Pokechu22 332bb6fd55 docs/DSP: Fix operation for LSR/ASR 2021-08-21 16:05:06 -07:00
Pokechu22 2eb791d5e1 docs/DSP: Note that ADDAXL is unsigned 2021-08-21 16:05:06 -07:00
Pokechu22 953670b057 docs/DSP: Fix operation of ADDR and SUBR 2021-08-21 16:05:06 -07:00
Pokechu22 8881ecef19 docs/DSP: Adjust operation for CMPI and CMPIS
This more clearly indicates what it is supposed to do.
2021-08-21 16:05:06 -07:00
Pokechu22 79664d419c docs/DSP: Document rounding behavior of CLRL 2021-08-21 16:05:06 -07:00
Pokechu22 1bcea561e9 docs/DSP: Add 'NOP 2021-08-21 16:05:05 -07:00
Pokechu22 29b61d463e docs/DSP: Document 'LD and 'LDAX 2021-08-21 16:05:05 -07:00
Pokechu22 031621bf51 docs/DSP: Document behavior and instructions when the first nybble is 3 2021-08-21 16:05:05 -07:00
Pokechu22 211c2b5d99 docs/DSP: Add most missing instructions
These instructions were already implememented by Dolphin, but never added to the manual.  Extension instructions will be handled in a later commit, as wlil instructions that were not previously implememented by Dolphin.
2021-08-21 16:05:05 -07:00
Pokechu22 446b1d2f13 docs/DSP: Adjust bit names in opcode table
The old names did not match the ones used by the instructions themselves, and were generally fairly inconsistent.
2021-08-21 16:05:05 -07:00
Pokechu22 16da6e214d docs/DSP: Hyperlink opcode names 2021-08-21 16:05:03 -07:00
Pokechu22 ccc5085988 docs/DSP: Rename 'SLMN to 'SLNM
This is for consistency with Dolphin, the opcode table, and 'LSNM.
2021-08-21 16:03:50 -07:00
Pokechu22 2a9e1a3b5d docs/DSP: Document accelerator hardware registers 2021-08-21 16:03:50 -07:00
Pokechu22 c9ed9dd0a7 docs/DSP: Adjust formatting of RegisterBitOverview 2021-08-21 16:03:50 -07:00
Pokechu22 9a269929ec docs/DSP: Improve DMA hardware register information 2021-08-21 16:03:50 -07:00
Pokechu22 b99fbf7e9c docs/DSP: Sort hardware registers by address
The actual documentation for registers is not changed in this commit; nor are any new registers added.  This is purely to make later diffs more readable.
2021-08-21 16:03:50 -07:00