docs/DSP: fix opcode operations
some did not reflect the correct PC increments, other had their registers mixed up. LSNM was misspelled as LSMN.
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@ -990,7 +990,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\begin{DSPOpcodeOperation}
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$acD.hm += #I
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FLAGS($acD)
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$pc++
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$pc += 2
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -1118,7 +1118,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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ELSE
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$sr.LZ = 0
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ENDIF
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$pc++
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$pc += 2
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -1144,7 +1144,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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ELSE
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$sr.LZ = 0
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ENDIF
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$pc++
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$pc += 2
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -1165,7 +1165,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\begin{DSPOpcodeOperation}
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$acD.m &= #I
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FLAGS($acD)
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$pc++
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$pc += 2
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -1270,7 +1270,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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$st0 = $pc + 2
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$st2 = addrA
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$st3 = $R
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$pc + 2
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$pc += 2
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// On real hardware, the below does not happen,
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// this opcode only sets stack registers
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@ -1306,7 +1306,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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$st0 = $pc + 2
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$st2 = addrA
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$st3 = I
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$pc + 2
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$pc += 2
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// On real hardware, the below does not happen,
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// this opcode only sets stack registers
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@ -1499,7 +1499,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\begin{DSPOpcodeOperation}
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res = ($acD.hm - I) | $acD.l
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FLAGS(res)
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$pc++
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$pc += 2
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -2039,7 +2039,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\begin{DSPOpcodeOperation}
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$(0x18+D) = MEM[M]
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$pc += 2
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -2821,7 +2821,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\begin{DSPOpcodeOperation}
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$acD.m |= #I
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FLAGS($acD)
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$pc++
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$pc += 2
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3088,7 +3088,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\begin{DSPOpcodeOperation}
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MEM[M] = $(0x18+S)
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$pc += 2
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$pc++
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3227,7 +3227,7 @@ There are two pairs of conditions that work similar: \texttt{EQ}/\texttt{NE} and
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\begin{DSPOpcodeOperation}
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$acD.m ^= #I
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FLAGS($acD)
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$pc++
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$pc += 2
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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@ -3384,13 +3384,13 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeOperation}
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\end{DSPOpcode}
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\begin{DSPOpcode}{'LSMN}
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\begin{DSPOpcode}{'LSNM}
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\begin{DSPOpcodeBytefield}{16}
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\monobitbox{4}{xxxx} & \monobitbox{4}{xxxx} & \monobitbox{4}{10dd} & \monobitbox{4}{110s}
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\end{DSPOpcodeBytefield}
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\begin{DSPOpcodeFormat}
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'LSMN $(0x18+D), $acS.m
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'LSNM $(0x18+D), $acS.m
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\end{DSPOpcodeFormat}
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\begin{DSPOpcodeDescription}
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@ -3503,8 +3503,8 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$(0x18+D) = MEM[$ar0]
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MEM[$ar3] = $acS.m
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$(0x18+D) = MEM[$ar3]
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MEM[$ar0] = $acS.m
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$ar0++
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$ar3++
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\end{DSPOpcodeOperation}
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@ -3526,8 +3526,8 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$(0x18+D) = MEM[$ar0]
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MEM[$ar3] = $acS.m
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$(0x18+D) = MEM[$ar3]
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MEM[$ar0] = $acS.m
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$ar0++
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$ar3 += $ix3
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\end{DSPOpcodeOperation}
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@ -3550,8 +3550,8 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$(0x18+D) = MEM[$ar0]
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MEM[$ar3] = $acS.m
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$(0x18+D) = MEM[$ar3]
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MEM[$ar0] = $acS.m
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$ar0 += $ix0
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$ar3 += $ix3
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\end{DSPOpcodeOperation}
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@ -3573,8 +3573,8 @@ allow extending (8 lower bits of opcode not used by opcode). Extended opcodes do
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\end{DSPOpcodeDescription}
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\begin{DSPOpcodeOperation}
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$(0x18+D) = MEM[$ar0]
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MEM[$ar3] = $acS.m
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$(0x18+D) = MEM[$ar3]
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MEM[$ar0] = $acS.m
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$ar0 += $ix0
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$ar3++
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\end{DSPOpcodeOperation}
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