68877c52d1
Merge pull request #8027 from MerryMage/MOVAPS
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Jit64: Prefer MOVAPS where possible
2019-05-22 15:05:17 +10:00
ff972e3673
Reformat repo to clang-format 7.0 rules
2019-05-06 18:48:04 +00:00
1baa8ee970
x64Emitter: Prefer MOVAPS to MOVSD
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* The high half of regOp is immediately overwritten so the value in it is irrelevant.
* MOVSD produces an unnecessary dependency on the high half of regOp.
* MOVAPS is implemented as a register rename on modern microarchitectures.
2019-04-27 12:56:05 +01:00
2d4dd8cdc1
x64Emitter: Prefer MOVAPS to MOVAPD
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There is no reason to use MOVAPD over MOVAPS, for two reasons:
* There has never been a microarchitecture with separate single and double domains.
* MOVAPD is one byte longer than MOVAPS
2019-04-27 12:54:43 +01:00
da7608ff9f
x64Emitter: Add some single-precision instructions
2018-12-26 00:23:42 +00:00
32ef8706e5
Merge pull request #7414 from Sintendo/shortmovs
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x64Emitter: emit shorter MOVs for 64-bit immediates
2018-10-06 00:01:35 +01:00
d8953dbe57
x64Emitter: nit, use helper method in CMP_or_TEST
2018-09-29 09:52:54 +02:00
53a947749a
x64Emitter: short MOV for 64bit immediates (2)
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Prior to this commit, the emitter would unconditionally emit a 10-byte
instruction known as MOVABS when loading a 64-bit immediate to a
register.
0: 48 b8 ef be ad de 00 movabs rax,0xdeadbeef
7: 00 00 00
With this change, it will instead rely on the fact that on x64 writes to
32-bit registers are automatically zero extended to 64-bits, allowing
us to emit a 5 or 6-bytes instruction with the same effect for certain
immediates.
0: b8 ef be ad de mov eax,0xdeadbeef
2018-09-16 19:52:03 +02:00
575f1b309a
x64Emitter: short MOV for 64bit immediates (1)
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Prior to this commit, the emitter would unconditionally emit a 10-byte
instruction known as MOVABS when loading a 64-bit immediate to a
register.
0: 48 b8 ef be ad de ff movabs rax,0xffffffffdeadbeef
7: ff ff ff
With this change, it will instead emit a 7-byte instruction when it is
possible to express the 64-bit immediate using a signed 32-bit value.
0: 48 c7 c0 ef be ad de mov rax,0xffffffffdeadbeef
2018-09-14 23:11:26 +02:00
82b1518342
x64Emitter: Use an enum class to represent FixupBranch branch types
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Gets rid of the use of magic values and replaces them with strongly
typed symbolic names.
2018-05-06 22:05:03 -04:00
e28d063539
x64Emitter: Make the Align* functions return a non-const data pointer
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There's no real requirement to make this const, and this should also
be decided by the calling code, considering we had places that would
simply cast away the const and carry on.
2018-04-12 19:46:55 -04:00
40bb9974f2
Reformat all the things!
2018-04-12 21:28:39 +02:00
975ba4abf0
x64Emitter: Make FloatOp and NormalOp enum classes
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Reduces the amount of identifiers placed in the Gen namespace internally.
2018-03-18 18:04:54 -04:00
c22a6f4551
x64Emitter: Move FloatOp and NormalOp enums to the cpp file
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These are only used internally. This also allows us to eliminate some
symbols that get dumped into the exposed Gen namespace.
By extension this also hides the Write[X] functions from OpArg's public
interface. This is only used internally by XEmitter, so they shouldn't
be usable by anything else.
2018-03-18 18:04:48 -04:00
75f5fcdfee
Assert: Remove unused parameter from DEBUG_ASSERT
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This brings the macro in line with the regular ASSERT macro, which only has one
macro parameter.
2018-03-16 13:01:11 -04:00
50a476c371
Assert: Uppercase assertion macros
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Macros should be all upper-cased. This is also kind of a wart that's
been sticking out for quite a while now (we avoid prefixing
underscores).
2018-03-14 22:03:12 -04:00
a95010bc72
x64Emitter: Allow code alignment to arbitrary power of 2
2017-04-12 08:41:51 +01:00
f31b25fe39
Jit64: Enable branch following.
2017-01-28 02:48:56 +01:00
13506d3c12
x64Emitter: Generify ABI_CallFunction variants
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Gets rid of the need to cast to void* just to use the functions.
2016-08-31 22:54:47 -04:00
e57333ac5e
Jit: Remove unsafe MOV optimization
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This optimization broke arithXex in rare cases by
emitting XOR where MOV was expected.
2016-07-01 01:43:35 +10:00
1e08ad0d97
Add MOV optimization and MOV_sum
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Replaces incarnations of the A=B+C pattern throughout the
code so we can apply optimizations consistently.
2016-06-27 15:43:52 -06:00
b1296a7825
Refactor fastmem/trampoline code.
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Simplication to avoid reading back the generated instructions, allowing
us to handle all possible cases.
2016-06-27 14:58:20 -06:00
3570c7f03a
Reformat all the things. Have fun with merge conflicts.
2016-06-24 10:43:46 +02:00
cfa43f64bf
x64Emitter: Remove pointer cast
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No more ubsan asserts in the JIT and x64 emitter code paths when running starfield.
2015-09-17 09:35:13 -04:00
19459e827f
Partially revert "General: Toss out PRI macro usage"
2015-09-11 09:49:00 -04:00
8fdb013d54
General: Toss out PRI macro usage
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Now that VS supports more printf specifiers, these aren't necessary
2015-09-05 16:02:35 -04:00
ee4a12ffe2
Jit64: some byte-swapping changes
2015-08-26 05:41:18 +02:00
0a0e012fab
x64Emitter: add RCPPS and RCPSS SSE instructions
2015-08-23 16:59:27 +02:00
a69755d9ee
x64Emitter: Remove pointer casts from Write{8,16,32,64} functions
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This also silences quite a few ubsan asserts from firing when the emitter is being used.
2015-08-21 18:09:48 -04:00
a59f00a5e4
x64Emitter: Remove unused code
2015-08-20 23:05:20 -04:00
022286fb90
x64Emitter: don't check flags for most BMI2 ops
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With the exception of BZHI, BMI2 instructions don't affect flags, so
don't check if they're locked.
2015-08-14 23:39:17 +02:00
5e9fe4cd13
x64Emitter: check for immediates in BMI ops
2015-08-14 21:25:41 +02:00
439fb26b9b
x64Emitter: add MOVSLDUP/MOVSHDUP
2015-08-06 10:39:43 +02:00
5ddd2cef6c
zfreeze: cache vertex positions
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Suggested by degasus.
2015-06-07 12:13:00 +02:00
8db6588bb9
XEmitter: add FMA4 instructions
2015-06-02 19:19:52 +02:00
e3a6191f02
x64Emitter: Pass some OpArg parameters by const reference
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Considering OpArg is a struct, passing by value creates unnecessary copies.
2015-05-29 01:13:29 -04:00
810a04db58
x64Emitter: Remove 'Gen::' namespace prefix from some parameters
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The emitter is already within the Gen namespace, so this isn't necessary.
2015-05-29 01:05:09 -04:00
84ed196c14
x64Emitter: Adjust position of reference and pointer indicators
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Matches the coding style.
2015-05-29 01:04:45 -04:00
7c04c76a26
Merge pull request #2421 from Tilka/jit_stuff
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Jit64: fixes + less code
2015-05-25 23:08:24 -04:00
30ebb2459e
Set copyright year to when a file was created
2015-05-25 13:22:31 +02:00
cefcb0ace9
Update license headers to GPLv2+
2015-05-25 13:22:31 +02:00
6593ba7ecc
XEmitter: add BLENDPS/BLENDPD
2015-05-21 12:33:36 +02:00
ad6b522c3b
XEmitter: fix L bit in VEX prefix
2015-05-20 09:34:27 +02:00
c2c31086ae
XEmitter: restructure WriteVEXOp wrappers
2015-05-17 18:44:56 +02:00
ae8efaa6a3
XEmitter: add VBLENDVPD and VCMPPD
2015-05-17 18:42:36 +02:00
18e9241637
XEmitter: rename WriteVex to WriteVEX
2015-05-17 09:35:53 +02:00
9e3f4df733
XEmitter: rename WriteRex to WriteREX
2015-05-17 09:35:53 +02:00
b3aaa46d42
Merge pull request #2088 from Sintendo/diecmp
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Emit 'TEST reg, reg' for 'CMP reg, 0' automatically
2015-04-23 16:34:23 -04:00
ad95454d04
Merge pull request #2223 from phire/imm
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Cleanup OpArg, make immediates more explicit.
2015-04-23 01:53:18 -04:00
c19482c9a3
Add function to emit CMP, or TEST when possible
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Also, a spelling mistake.
2015-03-22 17:22:27 +01:00
Connor McLaughlin