x64Emitter: Remove 'Gen::' namespace prefix from some parameters
The emitter is already within the Gen namespace, so this isn't necessary.
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@ -886,7 +886,7 @@ void XEmitter::WriteMOVBE(int bits, u8 op, X64Reg reg, OpArg arg)
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void XEmitter::MOVBE(int bits, X64Reg dest, const OpArg& src) {WriteMOVBE(bits, 0xF0, dest, src);}
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void XEmitter::MOVBE(int bits, const OpArg& dest, X64Reg src) {WriteMOVBE(bits, 0xF1, src, dest);}
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void XEmitter::LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src)
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void XEmitter::LoadAndSwap(int size, X64Reg dst, const OpArg& src)
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{
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if (cpu_info.bMOVBE)
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{
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@ -899,7 +899,7 @@ void XEmitter::LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src)
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}
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}
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void XEmitter::SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src)
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void XEmitter::SwapAndStore(int size, const OpArg& dst, X64Reg src)
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{
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if (cpu_info.bMOVBE)
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{
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@ -503,8 +503,8 @@ public:
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// Available only on Atom or >= Haswell so far. Test with cpu_info.bMOVBE.
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void MOVBE(int bits, X64Reg dest, const OpArg& src);
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void MOVBE(int bits, const OpArg& dest, X64Reg src);
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void LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src);
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void SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src);
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void LoadAndSwap(int size, X64Reg dst, const OpArg& src);
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void SwapAndStore(int size, const OpArg& dst, X64Reg src);
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// Available only on AMD >= Phenom or Intel >= Haswell
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void LZCNT(int bits, X64Reg dest, OpArg src);
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@ -931,7 +931,7 @@ public:
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void ABI_CallFunctionRR(const void* func, X64Reg reg1, X64Reg reg2);
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// Helper method for the above, or can be used separately.
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void MOVTwo(int bits, Gen::X64Reg dst1, Gen::X64Reg src1, s32 offset, Gen::X64Reg dst2, Gen::X64Reg src2);
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void MOVTwo(int bits, X64Reg dst1, X64Reg src1, s32 offset, X64Reg dst2,X64Reg src2);
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// Saves/restores the registers and adjusts the stack to be aligned as
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// required by the ABI, where the previous alignment was as specified.
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