Commit Graph

40994 Commits

Author SHA1 Message Date
JosJuice 1b7bd32ac1 JitArm64: Correctly flush non-dirty immediates
Without this change, non-dirty immediates don't actually get flushed.
This can be a problem if we for instance are flushing all registers in
order to execute an interpreter fallback. If that interpreter fallback
writes to a register that contained a non-dirty immediate, the JIT will
keep using the old value instead of loading the updated value.
2023-11-05 09:15:08 +01:00
TryTwo 2a5147a19b Dark style: add QTableCornerButton. Fix padding for tables.
CodeDiffDialog: Fix QTableWidget UI issues
2023-11-04 15:00:07 -07:00
Dentomologist 43e69d3e6a DolphinQt: Remove unnecessary qOverloads
qOverload is used to disambiguate pointers to overloaded functions, but
most of the usages in the code base were with non-overloaded functions.
2023-11-04 14:14:14 -07:00
Tilka b7b8f46832
Merge pull request #12259 from Sintendo/frsqrte-unit-test
UnitTests: Test frsqrte against known values
2023-11-04 20:10:23 +00:00
JosJuice 9cc1df6c14 JitArm64: Optimize frsqrte denormal path (in an "interesting" way) 2023-11-04 11:58:03 +01:00
JosJuice 9b21046dfc JitArm64: Read X1 instead of X3 in frsqrte denormal path
If we hit the denormal path, the sign and exponent are guaranteed to be
0, which means X1 and X3 have the same value.
2023-11-04 11:58:03 +01:00
JosJuice 9807cf0b82 JitArm64: Stop using X4 in frsqrte
This required a change in the denormal path where, instead of
subtracting 11 before shifting left, we shift left immediately and then
shift right by 11. This shouldn't affect performance.
2023-11-04 11:58:03 +01:00
JosJuice 4b2f73774f JitArm64: Optimize frsqrte denormal path
Now that the normal path is no longer reading X2 and X3, it doesn't
matter what the denormal path writes to them.
2023-11-04 11:58:03 +01:00
JosJuice e5bd8019f6 JitArm64: Read X1 instead of X3 in frsqrte normal path
With this, the normal path is no longer reading the value in X3,
which opens up for the next commit.
2023-11-04 11:57:59 +01:00
JosJuice 31d751b6da JitArm64: Read X1 in frsqrte normal path
Instead of combining X2 (the exponent) and X3 (the mantissa) using an
ORR instruction, we can read X1, which already contains both.

This requires us to reconstruct X1 in the denormal path, but that's
an acceptable price.
2023-11-04 11:56:15 +01:00
JosJuice 6b2d801ed7
Merge pull request #12267 from JosJuice/contributing-leaks
Contributing.md: Make our stance on leaked information explicit
2023-11-03 22:37:50 +01:00
JosJuice a2a733f4a3 Contributing.md: Make our stance on leaked information explicit
We have been operating on this principle for a while. Let's make it
explicit so that new contributors know about it.
2023-11-03 18:53:49 +01:00
Admiral H. Curtiss c7243c368f
Merge pull request #12270 from AdmiralCurtiss/clang-enum-out-of-range-2
Netplay: Fix building on clang 17.
2023-11-03 16:34:50 +01:00
Admiral H. Curtiss b181842092
Netplay: Fix building on clang 17. 2023-11-03 16:15:04 +01:00
Admiral H. Curtiss 7dae4dd3d2
Merge pull request #12266 from noahpistilli/kd-junk-data
IOS/KD: Disable download and mail when files are invalid
2023-11-03 15:27:44 +01:00
Sketch ad2044993d IOS/KD: Disable download and mail when files are invalid 2023-11-02 22:05:56 -04:00
JosJuice 482da7975b Jit: Define new terms related to fastmem
Dolphin's JITs have a minor terminology problem: The term "fastmem" can
refer to either the system of switching between a fast path and a slow
path using backpatching, or to the fast path itself. To hopefully make
things clearer, I'm adding some new terms, defining the old and new
terms as follows:

Fastmem: The system of switching from a fast path to a slow path by
backpatching when an invalid memory access occurs.

Fast access: A code path that accesses guest memory without calling C++
code.

Slow access: A code path that accesses guest memory by calling C++ code.
2023-11-02 21:30:12 +01:00
Admiral H. Curtiss b4c0da30bd
Merge pull request #12244 from DacoTaco/feature/crypto
IOS: implement /dev/aes & /dev/sha
2023-11-02 19:36:40 +01:00
DacoTaco 2241aaf168 IOS: implement /dev/aes 2023-11-01 22:08:39 +01:00
DacoTaco d4c18f3f31 IOS: implement /dev/sha 2023-11-01 22:08:39 +01:00
JosJuice 13c70eeb31
Merge pull request #12257 from Wack0/patch-1
JIT64 (Jit_Integer): for twx instructions, raise exception with correct SRR0
2023-11-01 21:10:39 +01:00
JosJuice c248a69268 JitArm64: Add utility for calling a function with arguments
With this, situations where multiple arguments need to be moved
from multiple registers become easy to handle, and we also get
compile-time checking that the number of arguments is correct.
2023-11-01 19:01:58 +01:00
Admiral H. Curtiss 17122f171a
Merge pull request #12260 from Pokechu22/multiple-fifo-recording-regression
Fix regression when recording multiple fifologs
2023-11-01 12:01:52 +01:00
Admiral H. Curtiss ff009dd8b5
Merge pull request #12258 from skyfloogle/traversal-logging
Netplay: Don't log skippable events as errors
2023-11-01 11:56:39 +01:00
Admiral H. Curtiss 166d8a1aa3
Merge pull request #12211 from JosJuice/toggle-dcache
PowerPC: Allow toggling write-back cache during emulation
2023-11-01 11:53:56 +01:00
Dentomologist 9230266529 CheatSearchWidget: Add checkbox to toggle Current Value autoupdate 2023-10-31 17:35:14 -07:00
Dentomologist fdb7328c73 CheatSearch: Update Current Values at end of frame
At the end of each frame automatically update the Current Value for
visible table rows in the selected and visible CheatSearchWidget (if
any). Also update all Current Values in all CheatSearchWidgets when the
State changes to Paused.

Only updating visible table rows serves to minimize the performance cost
of this feature. If the user scrolls to an un-updated cell it will
promptly be updated by either the next VIEndFieldEvent or the State
transitioning to Paused.
2023-10-31 17:34:31 -07:00
JosJuice d04e67be3d Add fastmem arena setting
Just for debugging.
2023-10-31 19:43:49 +01:00
JosJuice 8686536d7d Jit: Always initialize fastmem arena
If dcache is enabled when the game starts, initializing the fastmem
arena is still useful in case the user changes the dcache setting.
And initializing it doesn't really cost anything.
2023-10-31 19:43:49 +01:00
JosJuice 0606433404 JitArm64: Check fastmem instead of fastmem_arena
Preparation for the next commit.

JitArm64 has been conflating these two flags. Most of the stuff that's
been guarded by fastmem_arena checks in fact requires fastmem.

When we have fastmem_arena without fastmem, it would be possible to do
things a bit more efficiently than what this commit does, but it's
non-trivial and therefore I will leave it out of this PR. With this
commit, we effectively have the same behavior as before this PR - plus
the added ability to toggle fastmem with a cache clear.
2023-10-31 19:43:49 +01:00
JosJuice b3bfcc5d7f PowerPC: Allow toggling write-back cache during emulation
Now that PR 10575 is merged, the JIT automatically clears its cache
when this setting is changed, making this reasonable to implement.
2023-10-31 19:43:49 +01:00
JosJuice 899d61bc7d Jit64: Recompile asm routines on cache clear
This is needed so that the checks added in the previous commit will be
reevaluated if the value of m_enable_dcache changes.

JitArm64 was already recompiling its asm routines on cache clear by
necessity. It doesn't have the same setup as Jit64 where the asm
routines are in a separate region, so clearing the JitArm64 cache
results in the asm routines being cleared too.
2023-10-31 19:43:49 +01:00
JosJuice 5e74a8b850 Jit64: Don't make use of fastmem arena when dcache is enabled
Some code paths in EmuCodeBlock.cpp that were checking fastmem_arena
should really also be checking m_enable_dcache.

Because JitArm64 centralizes more or less all memory access to the
EmitBackpatchRoutine function and because that function already
contained a check, JitArm64 works fine without the additional checks
added by this commit. Regardless, I added the checks to MMU.cpp instead
of EmuCodeBlock.cpp where applicable so they would be available to
JitArm64. Maybe one day JitArm64 will need them if its code gets
restructured.
2023-10-31 19:43:40 +01:00
JosJuice b32ac9353e
Merge pull request #12262 from AdmiralCurtiss/last-state-order-refactor
Core/State: Refactor logic for determining the relative age of existing savestates.
2023-10-31 19:39:47 +01:00
Admiral H. Curtiss 8e51f0c054
Merge pull request #12264 from Dentomologist/cheats_manager_fix_factory_widget_spacing
Cheats Manager: Fix factory widget spacing
2023-10-31 19:02:58 +01:00
Dentomologist 74d3ba7c46 Cheats Manager: Fix factory widget spacing
Add stretch to bottom of factory widget to prevent the Data Type
QGroupBox from getting stretched out awkwardly.
2023-10-30 17:44:39 -07:00
Dentomologist 7dfb23d38c CheatSearchWidget: Don't recreate table when refreshing values
The table only needs to be recreated when the displayed addresses might
change. If we're just refreshing the current values then update those
table cells and leave the rest of the table alone.
2023-10-30 17:18:18 -07:00
Sintendo ef7f3b5bac UnitTests: Test ApproximateReciprocalSquareRoot 2023-10-30 22:39:12 +01:00
Dentomologist fa7c969e15 CheatSearch: Use index range for ClonePartial
Specify the begin and end indices instead of filling a vector with all
the indices which are continuous anyway.
2023-10-30 12:58:38 -07:00
Admiral H. Curtiss 437946fb1a
Core/State: Refactor logic for determining the relative age of existing savestates.
The code previously did this indirectly via `std::map<double, int>`, the key being the timestamp, which required a questionable workaround for the case where multiple states have the same timestamp. By having a particular combination of timestamps in the on-disk savestates, you could cause this workaround to infinitely loop, locking up Dolphin. This avoids this completely by refactoring the logic and just using `std::vector` instead.
2023-10-30 19:19:01 +01:00
Admiral H. Curtiss 99a3bbc055
Core/State: Return an empty string on invalid input to SystemTimeAsDoubleToString(). 2023-10-30 19:19:01 +01:00
Admiral H. Curtiss 03f8ec09eb
Merge pull request #12261 from TryTwo/Bugfix_GetAddress
PPCDebugInterface:  Tweak regex in GetMemoryAddressFromInstruction to fix bugs
2023-10-30 10:49:13 +01:00
Admiral H. Curtiss 045868bbb4
Merge pull request #12256 from malleoz/savestate_read_header_fix
Core: Fix UI slowdown for savestate timestamp reads
2023-10-30 10:45:14 +01:00
TryTwo 490e4b78a7 Bugfixes for PPCDebugInterface::GetMemoryAddressFromInstruction
FromChars cannot return a value prefixed with 0x.
Possible regex failures on rX, rY, rZ
2023-10-29 22:54:45 -07:00
Pokechu22 35831f342e Fix regression when recording multiple fifologs
Since ccf92a3e56, recording fifologs multiple times after launching dolphin caused all initial state to not be saved (the initial contents of bpmem, cpmem, etc were all zeroed out). For some games, this was not noticeable, as most registers were set each frame, but for others, this resulted in completely broken fifologs. (Note that recording fifologs also required 05181f6b88 and 9e0755a598 to be cherry-picked due to other, since fixed, regressions.)

This was because previously, `Renderer::CheckFifoRecording` was called every frame, but ccf92a3e56 changed it into a callback (`m_end_of_frame_event`) that was removed when recording ended. Thus, before, `OpcodeDecoder::g_record_fifo_data = IsRecording()` was called when `IsRecording()` returned false, but after that commit `g_record_fifo_data` never got changed back to false, so the check for `was_recording` only ever passed on the first fifolog recorded (even after stopping and starting a game).

There may still be another issue lurking, as I'm not sure if all broken fifologs were caused by recording multiple fifologs (for instance, on https://bugs.dolphin-emu.org/issues/13377, only one fifolog was initially uploaded, but it was affected by an issue with the same symptoms as this).
2023-10-29 15:23:31 -07:00
Floogle bee6d5bfb6 Netplay: Don't log skippable events as errors 2023-10-28 18:06:07 +02:00
Tilka 220988d064
Merge pull request #12161 from krnlyng/tools_no_show_raw_insn
Tools: fix perf-disassemble.sh.
2023-10-28 03:28:28 +01:00
Tilka 2ccc2bfb2e
Merge pull request #12250 from Sintendo/dcbx-nit
Jit_LoadStore: Minor dcbx register optimizations
2023-10-28 02:33:51 +01:00
Tilka 9bea807732
Merge pull request #12249 from Sintendo/frsqrte-nit
PowerPC: Negate m_dec values in frsqrte table
2023-10-28 02:15:05 +01:00
Tilka 2212a5b225
Merge pull request #12254 from AdmiralCurtiss/savestate-no-xfb-stride
VideoCommon: Don't swap on state load when there's no XFB.
2023-10-28 02:14:30 +01:00