JitArm64: Add utility for calling a function with arguments
With this, situations where multiple arguments need to be moved from multiple registers become easy to handle, and we also get compile-time checking that the number of arguments is correct.
This commit is contained in:
JosJuice
parent
b32ac9353e
commit
c248a69268
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@ -1795,6 +1795,62 @@ void ARM64XEmitter::ADRP(ARM64Reg Rd, s64 imm)
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EncodeAddressInst(1, Rd, static_cast<s32>(imm >> 12));
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}
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// This is using a hand-rolled algorithm. The goal is zero memory allocations, not necessarily
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// the best JIT-time time complexity. (The number of moves is usually very small.)
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void ARM64XEmitter::ParallelMoves(RegisterMove* begin, RegisterMove* end,
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std::array<u8, 32>* source_gpr_usages)
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{
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// X0-X7 are used for passing arguments.
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// X18-X31 are either callee saved or used for special purposes.
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constexpr size_t temp_reg_begin = 8;
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constexpr size_t temp_reg_end = 18;
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while (begin != end)
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{
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bool removed_moves_during_this_loop_iteration = false;
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RegisterMove* move = end;
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while (move != begin)
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{
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RegisterMove* prev_move = move;
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--move;
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if ((*source_gpr_usages)[DecodeReg(move->dst)] == 0)
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{
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MOV(move->dst, move->src);
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(*source_gpr_usages)[DecodeReg(move->src)]--;
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std::move(prev_move, end, move);
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--end;
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removed_moves_during_this_loop_iteration = true;
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}
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}
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if (!removed_moves_during_this_loop_iteration)
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{
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// We need to break a cycle using a temporary register.
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size_t temp_reg = temp_reg_begin;
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while ((*source_gpr_usages)[temp_reg] != 0)
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{
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++temp_reg;
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ASSERT_MSG(COMMON, temp_reg != temp_reg_end, "Out of registers");
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}
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const ARM64Reg src = begin->src;
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const ARM64Reg dst =
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(Is64Bit(src) ? EncodeRegTo64 : EncodeRegTo32)(static_cast<ARM64Reg>(temp_reg));
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MOV(dst, src);
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(*source_gpr_usages)[DecodeReg(dst)] = (*source_gpr_usages)[DecodeReg(src)];
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(*source_gpr_usages)[DecodeReg(src)] = 0;
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std::for_each(begin, end, [src, dst](RegisterMove& move) {
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if (move.src == src)
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move.src = dst;
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});
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}
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}
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}
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template <typename T>
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void ARM64XEmitter::MOVI2RImpl(ARM64Reg Rd, T imm)
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{
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@ -3,10 +3,12 @@
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#pragma once
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#include <array>
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#include <bit>
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#include <cstring>
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#include <functional>
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#include <optional>
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#include <type_traits>
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#include <utility>
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#include "Common/ArmCommon.h"
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@ -17,6 +19,7 @@
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#include "Common/Common.h"
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#include "Common/CommonTypes.h"
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#include "Common/MathUtil.h"
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#include "Common/SmallVector.h"
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namespace Arm64Gen
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{
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@ -599,6 +602,12 @@ class ARM64XEmitter
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friend class ARM64FloatEmitter;
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private:
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struct RegisterMove
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{
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ARM64Reg dst;
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ARM64Reg src;
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};
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// Pointer to memory where code will be emitted to.
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u8* m_code = nullptr;
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@ -646,6 +655,10 @@ private:
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[[nodiscard]] FixupBranch WriteFixupBranch();
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// This function solves the "parallel moves" problem common in compilers.
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// The arguments are mutated!
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void ParallelMoves(RegisterMove* begin, RegisterMove* end, std::array<u8, 32>* source_gpr_usages);
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template <typename T>
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void MOVI2RImpl(ARM64Reg Rd, T imm);
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@ -1058,6 +1071,114 @@ public:
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void ABI_PushRegisters(BitSet32 registers);
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void ABI_PopRegisters(BitSet32 registers, BitSet32 ignore_mask = BitSet32(0));
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// Plain function call
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void QuickCallFunction(ARM64Reg scratchreg, const void* func);
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template <typename T>
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void QuickCallFunction(ARM64Reg scratchreg, T func)
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{
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QuickCallFunction(scratchreg, (const void*)func);
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}
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template <typename FuncRet, typename... FuncArgs, typename... Args>
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void ABI_CallFunction(FuncRet (*func)(FuncArgs...), Args... args)
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{
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static_assert(sizeof...(FuncArgs) == sizeof...(Args), "Wrong number of arguments");
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static_assert(sizeof...(FuncArgs) <= 8, "Passing arguments on the stack is not supported");
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if constexpr (!std::is_void_v<FuncRet>)
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static_assert(sizeof(FuncRet) <= 16, "Large return types are not supported");
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std::array<u8, 32> source_gpr_uses{};
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auto check_argument = [&](auto& arg) {
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using Arg = std::decay_t<decltype(arg)>;
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if constexpr (std::is_same_v<Arg, ARM64Reg>)
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{
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ASSERT(IsGPR(arg));
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source_gpr_uses[DecodeReg(arg)]++;
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}
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else
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{
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// To be more correct, we should be checking FuncArgs here rather than Args, but that's a
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// lot more effort to implement. Let's just do these best-effort checks for now.
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static_assert(!std::is_floating_point_v<Arg>, "Floating-point arguments are not supported");
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static_assert(sizeof(Arg) <= 8, "Arguments bigger than a register are not supported");
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}
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};
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(check_argument(args), ...);
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{
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Common::SmallVector<RegisterMove, sizeof...(Args)> pending_moves;
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size_t i = 0;
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auto handle_register_argument = [&](auto& arg) {
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using Arg = std::decay_t<decltype(arg)>;
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if constexpr (std::is_same_v<Arg, ARM64Reg>)
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{
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const ARM64Reg dst_reg =
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(Is64Bit(arg) ? EncodeRegTo64 : EncodeRegTo32)(static_cast<ARM64Reg>(i));
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if (dst_reg == arg)
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{
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// The value is already in the right register.
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source_gpr_uses[DecodeReg(arg)]--;
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}
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else if (source_gpr_uses[i] == 0)
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{
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// The destination register isn't used as the source of another move.
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// We can go ahead and do the move right away.
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MOV(dst_reg, arg);
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source_gpr_uses[DecodeReg(arg)]--;
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}
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else
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{
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// The destination register is used as the source of a move we haven't gotten to yet.
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// Let's record that we need to deal with this move later.
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pending_moves.emplace_back(dst_reg, arg);
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}
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}
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++i;
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};
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(handle_register_argument(args), ...);
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if (!pending_moves.empty())
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{
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ParallelMoves(pending_moves.data(), pending_moves.data() + pending_moves.size(),
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&source_gpr_uses);
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}
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}
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{
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size_t i = 0;
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auto handle_immediate_argument = [&](auto& arg) {
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using Arg = std::decay_t<decltype(arg)>;
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if constexpr (!std::is_same_v<Arg, ARM64Reg>)
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{
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const ARM64Reg dst_reg =
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(sizeof(arg) == 8 ? EncodeRegTo64 : EncodeRegTo32)(static_cast<ARM64Reg>(i));
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if constexpr (std::is_pointer_v<Arg>)
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MOVP2R(dst_reg, arg);
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else
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MOVI2R(dst_reg, arg);
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}
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++i;
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};
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(handle_immediate_argument(args), ...);
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}
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QuickCallFunction(ARM64Reg::X8, func);
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}
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// Utility to generate a call to a std::function object.
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//
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// Unfortunately, calling operator() directly is undefined behavior in C++
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@ -1069,23 +1190,11 @@ public:
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return (*f)(args...);
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}
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// This function expects you to have set up the state.
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// Overwrites X0 and X8
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template <typename T, typename... Args>
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ARM64Reg ABI_SetupLambda(const std::function<T(Args...)>* f)
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template <typename FuncRet, typename... FuncArgs, typename... Args>
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void ABI_CallLambdaFunction(const std::function<FuncRet(FuncArgs...)>* f, Args... args)
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{
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auto trampoline = &ARM64XEmitter::CallLambdaTrampoline<T, Args...>;
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MOVP2R(ARM64Reg::X8, trampoline);
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MOVP2R(ARM64Reg::X0, const_cast<void*>((const void*)f));
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return ARM64Reg::X8;
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}
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// Plain function call
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void QuickCallFunction(ARM64Reg scratchreg, const void* func);
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template <typename T>
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void QuickCallFunction(ARM64Reg scratchreg, T func)
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{
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QuickCallFunction(scratchreg, (const void*)func);
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auto trampoline = &ARM64XEmitter::CallLambdaTrampoline<FuncRet, FuncArgs...>;
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ABI_CallFunction(trampoline, f, args...);
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}
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};
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@ -29,9 +29,11 @@ public:
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T& operator[](size_t i) { return m_array[i]; }
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const T& operator[](size_t i) const { return m_array[i]; }
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auto data() { return m_array.data(); }
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auto begin() { return m_array.begin(); }
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auto end() { return m_array.begin() + m_size; }
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auto data() const { return m_array.data(); }
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auto begin() const { return m_array.begin(); }
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auto end() const { return m_array.begin() + m_size; }
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@ -197,10 +197,7 @@ void JitArm64::FallBackToInterpreter(UGeckoInstruction inst)
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}
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Interpreter::Instruction instr = Interpreter::GetInterpreterOp(inst);
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MOVP2R(ARM64Reg::X8, instr);
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MOVP2R(ARM64Reg::X0, &m_system.GetInterpreter());
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MOVI2R(ARM64Reg::W1, inst.hex);
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BLR(ARM64Reg::X8);
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ABI_CallFunction(instr, &m_system.GetInterpreter(), inst.hex);
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// If the instruction wrote to any registers which were marked as discarded,
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// we must mark them as no longer discarded
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@ -248,10 +245,7 @@ void JitArm64::HLEFunction(u32 hook_index)
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gpr.Flush(FlushMode::All, ARM64Reg::INVALID_REG);
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fpr.Flush(FlushMode::All, ARM64Reg::INVALID_REG);
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MOVP2R(ARM64Reg::X8, &HLE::ExecuteFromJIT);
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MOVI2R(ARM64Reg::W0, js.compilerPC);
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MOVI2R(ARM64Reg::W1, hook_index);
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BLR(ARM64Reg::X8);
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ABI_CallFunction(&HLE::ExecuteFromJIT, js.compilerPC, hook_index);
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}
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void JitArm64::DoNothing(UGeckoInstruction inst)
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@ -275,21 +269,15 @@ void JitArm64::Cleanup()
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SUB(ARM64Reg::X0, ARM64Reg::X0, ARM64Reg::X1);
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CMP(ARM64Reg::X0, GPFifo::GATHER_PIPE_SIZE);
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FixupBranch exit = B(CC_LT);
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MOVP2R(ARM64Reg::X1, &GPFifo::UpdateGatherPipe);
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MOVP2R(ARM64Reg::X0, &m_system.GetGPFifo());
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BLR(ARM64Reg::X1);
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ABI_CallFunction(&GPFifo::UpdateGatherPipe, &m_system.GetGPFifo());
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SetJumpTarget(exit);
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}
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// SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time.
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if (MMCR0(m_ppc_state).Hex || MMCR1(m_ppc_state).Hex)
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{
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MOVP2R(ARM64Reg::X8, &PowerPC::UpdatePerformanceMonitor);
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MOVI2R(ARM64Reg::X0, js.downcountAmount);
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MOVI2R(ARM64Reg::X1, js.numLoadStoreInst);
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MOVI2R(ARM64Reg::X2, js.numFloatingPointInst);
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MOVP2R(ARM64Reg::X3, &m_ppc_state);
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BLR(ARM64Reg::X8);
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ABI_CallFunction(&PowerPC::UpdatePerformanceMonitor, js.downcountAmount, js.numLoadStoreInst,
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js.numFloatingPointInst, &m_ppc_state);
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}
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}
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@ -331,10 +319,8 @@ void JitArm64::IntializeSpeculativeConstants()
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fail = GetCodePtr();
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MOVI2R(DISPATCHER_PC, js.blockStart);
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STR(IndexType::Unsigned, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
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MOVP2R(ARM64Reg::X8, &JitInterface::CompileExceptionCheckFromJIT);
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MOVP2R(ARM64Reg::X0, &m_system.GetJitInterface());
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MOVI2R(ARM64Reg::W1, static_cast<u32>(JitInterface::ExceptionType::SpeculativeConstants));
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BLR(ARM64Reg::X8);
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ABI_CallFunction(&JitInterface::CompileExceptionCheckFromJIT, &m_system.GetJitInterface(),
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static_cast<u32>(JitInterface::ExceptionType::SpeculativeConstants));
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B(dispatcher_no_check);
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SwitchToNearCode();
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}
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@ -652,12 +638,10 @@ void JitArm64::WriteExceptionExit(ARM64Reg dest, bool only_external, bool always
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static_assert(PPCSTATE_OFF(pc) + 4 == PPCSTATE_OFF(npc));
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STP(IndexType::Signed, DISPATCHER_PC, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
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MOVP2R(ARM64Reg::X0, &m_system.GetPowerPC());
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if (only_external)
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MOVP2R(EncodeRegTo64(DISPATCHER_PC), &PowerPC::CheckExternalExceptionsFromJIT);
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else
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MOVP2R(EncodeRegTo64(DISPATCHER_PC), &PowerPC::CheckExceptionsFromJIT);
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BLR(EncodeRegTo64(DISPATCHER_PC));
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const auto f =
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only_external ? &PowerPC::CheckExternalExceptionsFromJIT : &PowerPC::CheckExceptionsFromJIT;
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ABI_CallFunction(f, &m_system.GetPowerPC());
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EmitUpdateMembase();
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LDR(IndexType::Unsigned, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(npc));
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@ -998,10 +982,8 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
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SetJumpTarget(fail);
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MOVI2R(DISPATCHER_PC, js.blockStart);
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STR(IndexType::Unsigned, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
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MOVP2R(ARM64Reg::X0, &m_system.GetJitInterface());
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MOVI2R(ARM64Reg::W1, static_cast<u32>(JitInterface::ExceptionType::PairedQuantize));
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MOVP2R(ARM64Reg::X2, &JitInterface::CompileExceptionCheckFromJIT);
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BLR(ARM64Reg::X2);
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ABI_CallFunction(&JitInterface::CompileExceptionCheckFromJIT, &m_system.GetJitInterface(),
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static_cast<u32>(JitInterface::ExceptionType::PairedQuantize));
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B(dispatcher_no_check);
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SwitchToNearCode();
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SetJumpTarget(no_fail);
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@ -1064,9 +1046,7 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
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ABI_PushRegisters(regs_in_use);
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m_float_emit.ABI_PushRegisters(fprs_in_use, ARM64Reg::X30);
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MOVP2R(ARM64Reg::X8, &GPFifo::FastCheckGatherPipe);
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MOVP2R(ARM64Reg::X0, &m_system.GetGPFifo());
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BLR(ARM64Reg::X8);
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ABI_CallFunction(&GPFifo::FastCheckGatherPipe, &m_system.GetGPFifo());
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m_float_emit.ABI_PopRegisters(fprs_in_use, ARM64Reg::X30);
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ABI_PopRegisters(regs_in_use);
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@ -1182,9 +1162,7 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
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MOVI2R(DISPATCHER_PC, op.address);
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STP(IndexType::Signed, DISPATCHER_PC, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
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MOVP2R(ARM64Reg::X0, &m_system.GetPowerPC());
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MOVP2R(ARM64Reg::X1, &PowerPC::CheckBreakPointsFromJIT);
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BLR(ARM64Reg::X1);
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ABI_CallFunction(&PowerPC::CheckBreakPointsFromJIT, &m_system.GetPowerPC());
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LDR(IndexType::Unsigned, ARM64Reg::W0, ARM64Reg::X0,
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MOVPage2R(ARM64Reg::X0, cpu.GetStatePtr()));
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@ -211,55 +211,45 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, MemAccessMode mode, ARM64Reg RS,
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src_reg = dst_reg;
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}
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if (dst_reg != src_reg)
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MOV(dst_reg, src_reg);
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const bool reverse = (flags & BackPatchInfo::FLAG_REVERSE) != 0;
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MOVP2R(ARM64Reg::X2, &m_mmu);
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if (access_size == 64)
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{
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MOVP2R(ARM64Reg::X8,
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reverse ? &PowerPC::WriteU64SwapFromJitArm64 : &PowerPC::WriteU64FromJitArm64);
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ABI_CallFunction(reverse ? &PowerPC::WriteU64SwapFromJitArm64 :
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&PowerPC::WriteU64FromJitArm64,
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src_reg, ARM64Reg::W1, &m_mmu);
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}
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else if (access_size == 32)
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{
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MOVP2R(ARM64Reg::X8,
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reverse ? &PowerPC::WriteU32SwapFromJitArm64 : &PowerPC::WriteU32FromJitArm64);
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ABI_CallFunction(reverse ? &PowerPC::WriteU32SwapFromJitArm64 :
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&PowerPC::WriteU32FromJitArm64,
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src_reg, ARM64Reg::W1, &m_mmu);
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}
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else if (access_size == 16)
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{
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MOVP2R(ARM64Reg::X8,
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reverse ? &PowerPC::WriteU16SwapFromJitArm64 : &PowerPC::WriteU16FromJitArm64);
|
||||
ABI_CallFunction(reverse ? &PowerPC::WriteU16SwapFromJitArm64 :
|
||||
&PowerPC::WriteU16FromJitArm64,
|
||||
src_reg, ARM64Reg::W1, &m_mmu);
|
||||
}
|
||||
else
|
||||
{
|
||||
MOVP2R(ARM64Reg::X8, &PowerPC::WriteU8FromJitArm64);
|
||||
ABI_CallFunction(&PowerPC::WriteU8FromJitArm64, src_reg, ARM64Reg::W1, &m_mmu);
|
||||
}
|
||||
|
||||
BLR(ARM64Reg::X8);
|
||||
}
|
||||
else if (flags & BackPatchInfo::FLAG_ZERO_256)
|
||||
{
|
||||
MOVP2R(ARM64Reg::X1, &m_mmu);
|
||||
MOVP2R(ARM64Reg::X8, &PowerPC::ClearDCacheLineFromJitArm64);
|
||||
BLR(ARM64Reg::X8);
|
||||
ABI_CallFunction(&PowerPC::ClearDCacheLineFromJitArm64, ARM64Reg::W0, &m_mmu);
|
||||
}
|
||||
else
|
||||
{
|
||||
MOVP2R(ARM64Reg::X1, &m_mmu);
|
||||
|
||||
if (access_size == 64)
|
||||
MOVP2R(ARM64Reg::X8, &PowerPC::ReadU64FromJitArm64);
|
||||
ABI_CallFunction(&PowerPC::ReadU64FromJitArm64, ARM64Reg::W0, &m_mmu);
|
||||
else if (access_size == 32)
|
||||
MOVP2R(ARM64Reg::X8, &PowerPC::ReadU32FromJitArm64);
|
||||
ABI_CallFunction(&PowerPC::ReadU32FromJitArm64, ARM64Reg::W0, &m_mmu);
|
||||
else if (access_size == 16)
|
||||
MOVP2R(ARM64Reg::X8, &PowerPC::ReadU16FromJitArm64);
|
||||
ABI_CallFunction(&PowerPC::ReadU16FromJitArm64, ARM64Reg::W0, &m_mmu);
|
||||
else
|
||||
MOVP2R(ARM64Reg::X8, &PowerPC::ReadU8FromJitArm64);
|
||||
|
||||
BLR(ARM64Reg::X8);
|
||||
ABI_CallFunction(&PowerPC::ReadU8FromJitArm64, ARM64Reg::W0, &m_mmu);
|
||||
}
|
||||
|
||||
m_float_emit.ABI_PopRegisters(fprs_to_push, ARM64Reg::X30);
|
||||
|
|
|
|||
|
|
@ -770,13 +770,17 @@ void JitArm64::dcbx(UGeckoInstruction inst)
|
|||
ABI_PushRegisters(gprs_to_push);
|
||||
m_float_emit.ABI_PushRegisters(fprs_to_push, WA);
|
||||
|
||||
MOVP2R(ARM64Reg::X0, &m_system.GetJitInterface());
|
||||
// effective_address and loop_counter are already in W1 and W2 respectively
|
||||
// For efficiency, effective_addr and loop_counter are already in W1 and W2 respectively
|
||||
if (make_loop)
|
||||
MOVP2R(ARM64Reg::X8, &JitInterface::InvalidateICacheLinesFromJIT);
|
||||
{
|
||||
ABI_CallFunction(&JitInterface::InvalidateICacheLinesFromJIT, &m_system.GetJitInterface(),
|
||||
effective_addr, loop_counter);
|
||||
}
|
||||
else
|
||||
MOVP2R(ARM64Reg::X8, &JitInterface::InvalidateICacheLineFromJIT);
|
||||
BLR(ARM64Reg::X8);
|
||||
{
|
||||
ABI_CallFunction(&JitInterface::InvalidateICacheLineFromJIT, &m_system.GetJitInterface(),
|
||||
effective_addr);
|
||||
}
|
||||
|
||||
m_float_emit.ABI_PopRegisters(fprs_to_push, WA);
|
||||
ABI_PopRegisters(gprs_to_push);
|
||||
|
|
|
|||
|
|
@ -78,9 +78,7 @@ void JitArm64::UpdateRoundingMode()
|
|||
|
||||
ABI_PushRegisters(gprs_to_save);
|
||||
m_float_emit.ABI_PushRegisters(fprs_to_save, ARM64Reg::X8);
|
||||
MOVP2R(ARM64Reg::X0, &m_ppc_state);
|
||||
MOVP2R(ARM64Reg::X8, &PowerPC::RoundingModeUpdated);
|
||||
BLR(ARM64Reg::X8);
|
||||
ABI_CallFunction(&PowerPC::RoundingModeUpdated, &m_ppc_state);
|
||||
m_float_emit.ABI_PopRegisters(fprs_to_save, ARM64Reg::X8);
|
||||
ABI_PopRegisters(gprs_to_save);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -169,10 +169,7 @@ void JitArm64::GenerateAsm()
|
|||
|
||||
// Call JIT
|
||||
ResetStack();
|
||||
MOVP2R(ARM64Reg::X0, this);
|
||||
MOV(ARM64Reg::W1, DISPATCHER_PC);
|
||||
MOVP2R(ARM64Reg::X8, reinterpret_cast<void*>(&JitTrampoline));
|
||||
BLR(ARM64Reg::X8);
|
||||
ABI_CallFunction(&JitTrampoline, this, DISPATCHER_PC);
|
||||
LDR(IndexType::Unsigned, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
|
||||
B(dispatcher_no_check);
|
||||
|
||||
|
|
@ -189,8 +186,7 @@ void JitArm64::GenerateAsm()
|
|||
FixupBranch exit = CBNZ(ARM64Reg::W0);
|
||||
|
||||
SetJumpTarget(to_start_of_timing_slice);
|
||||
MOVP2R(ARM64Reg::X8, &CoreTiming::GlobalAdvance);
|
||||
BLR(ARM64Reg::X8);
|
||||
ABI_CallFunction(&CoreTiming::GlobalAdvance);
|
||||
|
||||
// When we've just entered the jit we need to update the membase
|
||||
// GlobalAdvance also checks exceptions after which we need to
|
||||
|
|
|
|||
|
|
@ -78,10 +78,8 @@ private:
|
|||
|
||||
m_emit->ABI_PushRegisters(m_gprs_in_use);
|
||||
float_emit.ABI_PushRegisters(m_fprs_in_use, ARM64Reg::X1);
|
||||
m_emit->MOVP2R(ARM64Reg::X1, m_system);
|
||||
m_emit->MOVI2R(ARM64Reg::W2, m_address);
|
||||
m_emit->MOV(ARM64Reg::W3, m_src_reg);
|
||||
m_emit->BLR(m_emit->ABI_SetupLambda(lambda));
|
||||
|
||||
m_emit->ABI_CallLambdaFunction(lambda, m_system, m_address, m_src_reg);
|
||||
|
||||
float_emit.ABI_PopRegisters(m_fprs_in_use, ARM64Reg::X1);
|
||||
m_emit->ABI_PopRegisters(m_gprs_in_use);
|
||||
|
|
@ -176,9 +174,9 @@ private:
|
|||
|
||||
m_emit->ABI_PushRegisters(m_gprs_in_use);
|
||||
float_emit.ABI_PushRegisters(m_fprs_in_use, ARM64Reg::X1);
|
||||
m_emit->MOVP2R(ARM64Reg::X1, m_system);
|
||||
m_emit->MOVI2R(ARM64Reg::W2, m_address);
|
||||
m_emit->BLR(m_emit->ABI_SetupLambda(lambda));
|
||||
|
||||
m_emit->ABI_CallLambdaFunction(lambda, m_system, m_address);
|
||||
|
||||
if (m_sign_extend)
|
||||
m_emit->SBFM(m_dst_reg, ARM64Reg::W0, 0, sbits - 1);
|
||||
else
|
||||
|
|
|
|||
|
|
@ -0,0 +1,178 @@
|
|||
// Copyright 2023 Dolphin Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "Common/Arm64Emitter.h"
|
||||
#include "Common/BitSet.h"
|
||||
#include "Common/BitUtils.h"
|
||||
|
||||
#include <gtest/gtest.h>
|
||||
|
||||
using namespace Arm64Gen;
|
||||
|
||||
namespace
|
||||
{
|
||||
u32 ZeroParameterFunction()
|
||||
{
|
||||
return 123;
|
||||
}
|
||||
|
||||
u32 OneParameterFunction(u64 a)
|
||||
{
|
||||
return a + 23;
|
||||
}
|
||||
|
||||
u32 TwoParameterFunction(u64 a, u64 b)
|
||||
{
|
||||
return a * 10 + b + 3;
|
||||
}
|
||||
|
||||
u32 ThreeParameterFunction(u64 a, u64 b, u64 c)
|
||||
{
|
||||
return a * 10 + b + c / 10;
|
||||
}
|
||||
|
||||
u32 EightParameterFunction(u64 a, u64 b, u64 c, u64 d, u64 e, u64 f, u64 g, u64 h)
|
||||
{
|
||||
return a / 20 + b / 8 + c / 10 + d / 2 + e / 5 - f + g + h / 3;
|
||||
}
|
||||
|
||||
class TestCallFunction : public ARM64CodeBlock
|
||||
{
|
||||
public:
|
||||
TestCallFunction() { AllocCodeSpace(4096); }
|
||||
|
||||
template <typename F>
|
||||
void Emit(F f)
|
||||
{
|
||||
ResetCodePtr();
|
||||
|
||||
m_code_pointer = GetCodePtr();
|
||||
{
|
||||
const Common::ScopedJITPageWriteAndNoExecute enable_jit_page_writes;
|
||||
|
||||
constexpr BitSet32 link_register{DecodeReg(ARM64Reg::X30)};
|
||||
ABI_PushRegisters(link_register);
|
||||
f();
|
||||
ABI_PopRegisters(link_register);
|
||||
RET();
|
||||
}
|
||||
|
||||
FlushIcacheSection(const_cast<u8*>(m_code_pointer), const_cast<u8*>(GetCodePtr()));
|
||||
}
|
||||
|
||||
void Run()
|
||||
{
|
||||
const u64 actual = Common::BitCast<u64 (*)()>(m_code_pointer)();
|
||||
constexpr u64 expected = 123;
|
||||
EXPECT_EQ(expected, actual);
|
||||
}
|
||||
|
||||
private:
|
||||
const u8* m_code_pointer = nullptr;
|
||||
};
|
||||
|
||||
} // namespace
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_ZeroParameters)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] { test.ABI_CallFunction(&ZeroParameterFunction); });
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_OneConstantParameter)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] { test.ABI_CallFunction(&OneParameterFunction, 100); });
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_OneRegisterParameterNoMov)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X0, 100);
|
||||
test.ABI_CallFunction(&OneParameterFunction, ARM64Reg::X0);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_OneRegisterParameterMov)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X8, 100);
|
||||
test.ABI_CallFunction(&OneParameterFunction, ARM64Reg::X8);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_TwoRegistersMixed)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X0, 20);
|
||||
test.ABI_CallFunction(&TwoParameterFunction, 10, ARM64Reg::X0);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_TwoRegistersCycle)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X0, 20);
|
||||
test.MOVI2R(ARM64Reg::X1, 10);
|
||||
test.ABI_CallFunction(&TwoParameterFunction, ARM64Reg::X1, ARM64Reg::X0);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_ThreeRegistersMixed)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X1, 10);
|
||||
test.MOVI2R(ARM64Reg::X2, 20);
|
||||
test.ABI_CallFunction(&ThreeParameterFunction, ARM64Reg::X1, ARM64Reg::X2, 30);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_ThreeRegistersCycle1)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X0, 30);
|
||||
test.MOVI2R(ARM64Reg::X1, 10);
|
||||
test.MOVI2R(ARM64Reg::X2, 20);
|
||||
test.ABI_CallFunction(&ThreeParameterFunction, ARM64Reg::X1, ARM64Reg::X2, ARM64Reg::X0);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_ThreeRegistersCycle2)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X0, 20);
|
||||
test.MOVI2R(ARM64Reg::X1, 30);
|
||||
test.MOVI2R(ARM64Reg::X2, 10);
|
||||
test.ABI_CallFunction(&ThreeParameterFunction, ARM64Reg::X2, ARM64Reg::X0, ARM64Reg::X1);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
||||
TEST(Arm64Emitter, CallFunction_EightRegistersMixed)
|
||||
{
|
||||
TestCallFunction test;
|
||||
test.Emit([&] {
|
||||
test.MOVI2R(ARM64Reg::X3, 12);
|
||||
test.MOVI2R(ARM64Reg::X4, 23);
|
||||
test.MOVI2R(ARM64Reg::X5, 24);
|
||||
test.MOVI2R(ARM64Reg::X30, 2000);
|
||||
test.ABI_CallFunction(&EightParameterFunction, ARM64Reg::X30, 40, ARM64Reg::X4, ARM64Reg::X5,
|
||||
ARM64Reg::X4, ARM64Reg::X3, 5, ARM64Reg::X4);
|
||||
});
|
||||
test.Run();
|
||||
}
|
||||
|
|
@ -21,4 +21,6 @@ add_dolphin_test(SwapTest SwapTest.cpp)
|
|||
if (_M_X86)
|
||||
add_dolphin_test(x64EmitterTest x64EmitterTest.cpp)
|
||||
target_link_libraries(x64EmitterTest PRIVATE bdisasm)
|
||||
elseif (_M_ARM_64)
|
||||
add_dolphin_test(Arm64EmitterTest Arm64EmitterTest.cpp)
|
||||
endif()
|
||||
|
|
|
|||
|
|
@ -79,6 +79,7 @@
|
|||
<ClCompile Include="Core\PowerPC\Jit64Common\Frsqrte.cpp" />
|
||||
</ItemGroup>
|
||||
<ItemGroup Condition="'$(Platform)'=='ARM64'">
|
||||
<ClCompile Include="Common\Arm64EmitterTest.cpp" />
|
||||
<ClCompile Include="Core\PowerPC\JitArm64\ConvertSingleDouble.cpp" />
|
||||
<ClCompile Include="Core\PowerPC\JitArm64\FPRF.cpp" />
|
||||
<ClCompile Include="Core\PowerPC\JitArm64\Fres.cpp" />
|
||||
|
|
|
|||
Loading…
Reference in New Issue