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// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, version 2.0.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License 2.0 for more details.
// A copy of the GPL 2.0 should have been included with the program.
// If not, see http://www.gnu.org/licenses/
// Official SVN repository and contact information can be found at
// http://code.google.com/p/dolphin-emu/
# include <cmath>
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# include "VideoConfig.h"
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# include "Statistics.h"
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# include "RenderBase.h"
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# include "VideoCommon.h"
# include "PixelShaderManager.h"
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# include "PixelEngine.h"
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# include "BPFunctions.h"
# include "BPStructs.h"
# include "TextureDecoder.h"
# include "OpcodeDecoding.h"
# include "VertexLoader.h"
# include "VertexShaderManager.h"
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# include "Thread.h"
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# include "HW/Memmap.h"
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using namespace BPFunctions ;
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u32 mapTexAddress ;
bool mapTexFound ;
int numWrites ;
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extern volatile bool g_bSkipCurrentFrame ;
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static const float s_gammaLUT [ ] =
{
1.0f ,
1.7f ,
2.2f ,
1.0f
} ;
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void BPInit ( )
{
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memset ( & bpmem , 0 , sizeof ( bpmem ) ) ;
bpmem . bpMask = 0xFFFFFF ;
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mapTexAddress = 0 ;
numWrites = 0 ;
mapTexFound = false ;
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}
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void RenderToXFB ( const BPCmd & bp , const EFBRectangle & rc , float yScale , float xfbLines , u32 xfbAddr , const u32 dstWidth , const u32 dstHeight , float gamma )
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{
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Renderer : : RenderToXFB ( xfbAddr , dstWidth , dstHeight , rc , gamma ) ;
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}
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void BPWritten ( const BPCmd & bp )
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{
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/*
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Purpose : Writes to the BP registers
Called : At the end of every : OpcodeDecoding . cpp ExecuteDisplayList > Decode ( ) > LoadBPReg
How It Works : First the pipeline is flushed then update the bpmem with the new value .
Some of the BP cases have to call certain functions while others just update the bpmem .
some bp cases check the changes variable , because they might not have to be updated all the time
NOTE : it seems not all bp cases like checking changes , so calling if ( bp . changes = = 0 ? false : true )
had to be ditched and the games seem to work fine with out it .
NOTE2 : Yet Another Gamecube Documentation calls them Bypass Raster State Registers but possibly completely wrong
NOTE3 : This controls the register groups : RAS1 / 2 , SU , TF , TEV , C / Z , PEC
TODO : Turn into function table . The ( future ) DisplayList ( DL ) jit can then call the functions directly ,
getting rid of dynamic dispatch . Unfortunately , few games use DLs properly - most \
just stuff geometry in them and don ' t put state changes there
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
*/
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// Debugging only, this lets you skip a bp update
//static int times = 0;
//static bool enable = false;
//switch (bp.address)
//{
//case BPMEM_CONSTANTALPHA:
// {
// if (times-- == 0 && enable)
// return;
// else
// break;
// }
//default: break;
//}
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// FIXME: Hangs load-state, but should fix graphic-heavy games state loading
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//std::lock_guard<std::mutex> lk(s_bpCritical);
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// BEGIN ZTP SPEEDUP HACK CHANGES
// This hunk of code disables the usual pipeline flush for certain BP Writes
// that occur while the minimap is being drawn in Zelda: Twilight Princess.
// This significantly increases speed while in hyrule field. In depth discussion
// on how this Hack came to be can be found at: http://forums.dolphin-emu.com/thread-10638.html
// -fircrestsk8
if ( g_ActiveConfig . bZTPSpeedHack )
{
if ( ! mapTexFound )
{
if ( bp . address ! = BPMEM_TEV_COLOR_ENV & & bp . address ! = BPMEM_TEV_ALPHA_ENV )
numWrites = 0 ;
else if ( + + numWrites > = 100 ) // seem that if 100 consecutive BP writes are called to either of these addresses in ZTP,
{ // then it is safe to assume the map texture address is currently loaded into the BP memory
mapTexAddress = bpmem . tex [ 0 ] . texImage3 [ 0 ] . hex < < 5 ;
mapTexFound = true ;
WARN_LOG ( VIDEO , " \n ZTP map texture found at address %08x \n " , mapTexAddress ) ;
}
FlushPipeline ( ) ;
}
else if ( ( bpmem . tex [ 0 ] . texImage3 [ 0 ] . hex < < 5 ) ! = mapTexAddress | |
bpmem . tevorders [ 0 ] . getEnable ( 0 ) = = 0 | |
bp . address = = BPMEM_TREF )
{
FlushPipeline ( ) ;
}
} // END ZTP SPEEDUP HACK
else FlushPipeline ( ) ;
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( ( u32 * ) & bpmem ) [ bp . address ] = bp . newvalue ;
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switch ( bp . address )
{
case BPMEM_GENMODE : // Set the Generation Mode
{
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PRIM_LOG ( " genmode: texgen=%d, col=%d, ms_en=%d, tev=%d, cullmode=%d, ind=%d, zfeeze=%d " ,
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bpmem . genMode . numtexgens , bpmem . genMode . numcolchans ,
bpmem . genMode . ms_en , bpmem . genMode . numtevstages + 1 , bpmem . genMode . cullmode ,
bpmem . genMode . numindstages , bpmem . genMode . zfreeze ) ;
SetGenerationMode ( bp ) ;
break ;
}
case BPMEM_IND_MTXA : // Index Matrix Changed
case BPMEM_IND_MTXB :
case BPMEM_IND_MTXC :
case BPMEM_IND_MTXA + 3 :
case BPMEM_IND_MTXB + 3 :
case BPMEM_IND_MTXC + 3 :
case BPMEM_IND_MTXA + 6 :
case BPMEM_IND_MTXB + 6 :
case BPMEM_IND_MTXC + 6 :
PixelShaderManager : : SetIndMatrixChanged ( ( bp . address - BPMEM_IND_MTXA ) / 3 ) ;
break ;
case BPMEM_RAS1_SS0 : // Index Texture Coordinate Scale 0
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PixelShaderManager : : SetIndTexScaleChanged ( 0x03 ) ;
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case BPMEM_RAS1_SS1 : // Index Texture Coordinate Scale 1
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PixelShaderManager : : SetIndTexScaleChanged ( 0x0c ) ;
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break ;
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// ----------------
// Scissor Control
// ----------------
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case BPMEM_SCISSORTL : // Scissor Rectable Top, Left
case BPMEM_SCISSORBR : // Scissor Rectable Bottom, Right
case BPMEM_SCISSOROFFSET : // Scissor Offset
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SetScissor ( ) ;
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break ;
case BPMEM_LINEPTWIDTH : // Line Width
SetLineWidth ( bp ) ;
break ;
case BPMEM_ZMODE : // Depth Control
PRIM_LOG ( " zmode: test=%d, func=%d, upd=%d " , bpmem . zmode . testenable , bpmem . zmode . func ,
bpmem . zmode . updateenable ) ;
SetDepthMode ( bp ) ;
break ;
case BPMEM_BLENDMODE : // Blending Control
{
if ( bp . changes & 0xFFFF )
{
PRIM_LOG ( " blendmode: en=%d, open=%d, colupd=%d, alphaupd=%d, dst=%d, src=%d, sub=%d, mode=%d " ,
bpmem . blendmode . blendenable , bpmem . blendmode . logicopenable , bpmem . blendmode . colorupdate , bpmem . blendmode . alphaupdate ,
bpmem . blendmode . dstfactor , bpmem . blendmode . srcfactor , bpmem . blendmode . subtract , bpmem . blendmode . logicmode ) ;
// Set LogicOp Blending Mode
if ( bp . changes & 2 )
SetLogicOpMode ( bp ) ;
// Set Dithering Mode
if ( bp . changes & 4 )
SetDitherMode ( bp ) ;
// Set Blending Mode
if ( bp . changes & 0xFE1 )
SetBlendMode ( bp ) ;
// Set Color Mask
if ( bp . changes & 0x18 )
SetColorMask ( bp ) ;
}
break ;
}
case BPMEM_CONSTANTALPHA : // Set Destination Alpha
{
PRIM_LOG ( " constalpha: alp=%d, en=%d " , bpmem . dstalpha . alpha , bpmem . dstalpha . enable ) ;
PixelShaderManager : : SetDestAlpha ( bpmem . dstalpha ) ;
break ;
}
// This is called when the game is done drawing the new frame (eg: like in DX: Begin(); Draw(); End();)
// Triggers an interrupt on the PPC side so that the game knows when the GPU has finished drawing.
// Tokens are similar.
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case BPMEM_SETDRAWDONE :
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switch ( bp . newvalue & 0xFF )
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{
case 0x02 :
PixelEngine : : SetFinish ( ) ; // may generate interrupt
DEBUG_LOG ( VIDEO , " GXSetDrawDone SetPEFinish (value: 0x%02X) " , ( bp . newvalue & 0xFFFF ) ) ;
break ;
default :
WARN_LOG ( VIDEO , " GXSetDrawDone ??? (value 0x%02X) " , ( bp . newvalue & 0xFFFF ) ) ;
break ;
}
break ;
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case BPMEM_PE_TOKEN_ID : // Pixel Engine Token ID
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PixelEngine : : SetToken ( static_cast < u16 > ( bp . newvalue & 0xFFFF ) , false ) ;
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DEBUG_LOG ( VIDEO , " SetPEToken 0x%04x " , ( bp . newvalue & 0xFFFF ) ) ;
break ;
case BPMEM_PE_TOKEN_INT_ID : // Pixel Engine Interrupt Token ID
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PixelEngine : : SetToken ( static_cast < u16 > ( bp . newvalue & 0xFFFF ) , true ) ;
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DEBUG_LOG ( VIDEO , " SetPEToken + INT 0x%04x " , ( bp . newvalue & 0xFFFF ) ) ;
break ;
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// ------------------------
// EFB copy command. This copies a rectangle from the EFB to either RAM in a texture format or to XFB as YUYV.
// It can also optionally clear the EFB while copying from it. To emulate this, we of course copy first and clear afterwards.
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case BPMEM_TRIGGER_EFB_COPY : // Copy EFB Region or Render to the XFB or Clear the screen.
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{
// The bottom right is within the rectangle
// The values in bpmem.copyTexSrcXY and bpmem.copyTexSrcWH are updated in case 0x49 and 0x4a in this function
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EFBRectangle rc ;
rc . left = ( int ) bpmem . copyTexSrcXY . x ;
rc . top = ( int ) bpmem . copyTexSrcXY . y ;
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// Here Width+1 like Height, otherwise some textures are corrupted already since the native resolution.
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rc . right = ( int ) ( bpmem . copyTexSrcXY . x + bpmem . copyTexSrcWH . x + 1 ) ;
rc . bottom = ( int ) ( bpmem . copyTexSrcXY . y + bpmem . copyTexSrcWH . y + 1 ) ;
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UPE_Copy PE_copy = bpmem . triggerEFBCopy ;
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// Check if we are to copy from the EFB or draw to the XFB
if ( PE_copy . copy_to_xfb = = 0 )
{
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if ( GetConfig ( CONFIG_SHOWEFBREGIONS ) )
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stats . efb_regions . push_back ( rc ) ;
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CopyEFB ( bpmem . copyTexDest < < 5 , PE_copy . tp_realFormat ( ) ,
bpmem . zcontrol . pixel_format , rc , PE_copy . intensity_fmt ,
PE_copy . half_scale ) ;
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}
else
{
// We should be able to get away with deactivating the current bbox tracking
// here. Not sure if there's a better spot to put this.
// the number of lines copied is determined by the y scale * source efb height
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PixelEngine : : bbox_active = false ;
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float yScale ;
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if ( PE_copy . scale_invert )
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yScale = 256.0f / ( float ) bpmem . dispcopyyscale ;
else
yScale = ( float ) bpmem . dispcopyyscale / 256.0f ;
float xfbLines = ( ( bpmem . copyTexSrcWH . y + 1.0f ) * yScale ) ;
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if ( ( u32 ) xfbLines > MAX_XFB_HEIGHT )
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{
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INFO_LOG ( VIDEO , " Tried to scale EFB to too many XFB lines (%f) " , xfbLines ) ;
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xfbLines = MAX_XFB_HEIGHT ;
}
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RenderToXFB ( bp , rc , yScale , xfbLines ,
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bpmem . copyTexDest < < 5 ,
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bpmem . copyMipMapStrideChannels < < 4 ,
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( u32 ) xfbLines ,
s_gammaLUT [ PE_copy . gamma ] ) ;
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}
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// Clear the rectangular region after copying it.
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if ( PE_copy . clear )
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{
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ClearScreen ( bp , rc ) ;
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}
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break ;
}
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case BPMEM_LOADTLUT0 : // This one updates bpmem.tlutXferSrc, no need to do anything here.
break ;
case BPMEM_LOADTLUT1 : // Load a Texture Look Up Table
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{
u32 tlutTMemAddr = ( bp . newvalue & 0x3FF ) < < 9 ;
u32 tlutXferCount = ( bp . newvalue & 0x1FFC00 ) > > 5 ;
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u8 * ptr = 0 ;
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// TODO - figure out a cleaner way.
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if ( GetConfig ( CONFIG_ISWII ) )
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ptr = GetPointer ( bpmem . tmem_config . tlut_src < < 5 ) ;
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else
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ptr = GetPointer ( ( bpmem . tmem_config . tlut_src & 0xFFFFF ) < < 5 ) ;
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if ( ptr )
memcpy_gc ( texMem + tlutTMemAddr , ptr , tlutXferCount ) ;
else
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PanicAlert ( " Invalid palette pointer %08x %08x %08x " , bpmem . tmem_config . tlut_src , bpmem . tmem_config . tlut_src < < 5 , ( bpmem . tmem_config . tlut_src & 0xFFFFF ) < < 5 ) ;
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// TODO(ector) : kill all textures that use this palette
// Not sure if it's a good idea, though. For now, we hash texture palettes
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break ;
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}
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case BPMEM_FOGRANGE : // Fog Settings Control
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case BPMEM_FOGRANGE + 1 :
case BPMEM_FOGRANGE + 2 :
case BPMEM_FOGRANGE + 3 :
case BPMEM_FOGRANGE + 4 :
case BPMEM_FOGRANGE + 5 :
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if ( ! GetConfig ( CONFIG_DISABLEFOG ) )
PixelShaderManager : : SetFogRangeAdjustChanged ( ) ;
break ;
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case BPMEM_FOGPARAM0 :
case BPMEM_FOGBMAGNITUDE :
case BPMEM_FOGBEXPONENT :
case BPMEM_FOGPARAM3 :
if ( ! GetConfig ( CONFIG_DISABLEFOG ) )
PixelShaderManager : : SetFogParamChanged ( ) ;
break ;
case BPMEM_FOGCOLOR : // Fog Color
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if ( ! GetConfig ( CONFIG_DISABLEFOG ) )
PixelShaderManager : : SetFogColorChanged ( ) ;
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break ;
case BPMEM_ALPHACOMPARE : // Compare Alpha Values
PRIM_LOG ( " alphacmp: ref0=%d, ref1=%d, comp0=%d, comp1=%d, logic=%d " , bpmem . alphaFunc . ref0 ,
bpmem . alphaFunc . ref1 , bpmem . alphaFunc . comp0 , bpmem . alphaFunc . comp1 , bpmem . alphaFunc . logic ) ;
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PixelShaderManager : : SetAlpha ( bpmem . alphaFunc ) ;
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break ;
case BPMEM_BIAS : // BIAS
PRIM_LOG ( " ztex bias=0x%x " , bpmem . ztex1 . bias ) ;
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PixelShaderManager : : SetZTextureBias ( bpmem . ztex1 . bias ) ;
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break ;
case BPMEM_ZTEX2 : // Z Texture type
{
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if ( bp . changes & 3 )
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PixelShaderManager : : SetZTextureTypeChanged ( ) ;
# if defined(_DEBUG) || defined(DEBUGFAST)
const char * pzop [ ] = { " DISABLE " , " ADD " , " REPLACE " , " ? " } ;
const char * pztype [ ] = { " Z8 " , " Z16 " , " Z24 " , " ? " } ;
PRIM_LOG ( " ztex op=%s, type=%s " , pzop [ bpmem . ztex2 . op ] , pztype [ bpmem . ztex2 . type ] ) ;
# endif
break ;
}
// ----------------------------------
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// Display Copy Filtering Control - GX_SetCopyFilter(u8 aa,u8 sample_pattern[12][2],u8 vf,u8 vfilter[7])
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// Fields: Destination, Frame2Field, Gamma, Source
// ----------------------------------
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case BPMEM_DISPLAYCOPYFILER : // if (aa) { use sample_pattern } else { use 666666 }
case BPMEM_DISPLAYCOPYFILER + 1 : // if (aa) { use sample_pattern } else { use 666666 }
case BPMEM_DISPLAYCOPYFILER + 2 : // if (aa) { use sample_pattern } else { use 666666 }
case BPMEM_DISPLAYCOPYFILER + 3 : // if (aa) { use sample_pattern } else { use 666666 }
case BPMEM_COPYFILTER0 : // if (vf) { use vfilter } else { use 595000 }
case BPMEM_COPYFILTER1 : // if (vf) { use vfilter } else { use 000015 }
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break ;
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// -----------------------------------
// Interlacing Control
// -----------------------------------
case BPMEM_FIELDMASK : // GX_SetFieldMask(u8 even_mask,u8 odd_mask)
case BPMEM_FIELDMODE : // GX_SetFieldMode(u8 field_mode,u8 half_aspect_ratio)
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SetInterlacingMode ( bp ) ;
break ;
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// ----------------------------------------
// Unimportant regs (Clock, Perf, ...)
// ----------------------------------------
case BPMEM_BUSCLOCK0 : // TB Bus Clock ?
case BPMEM_BUSCLOCK1 : // TB Bus Clock ?
case BPMEM_PERF0_TRI : // Perf: Triangles
case BPMEM_PERF0_QUAD : // Perf: Quads
case BPMEM_PERF1 : // Perf: Some Clock, Texels, TX, TC
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break ;
// ----------------
// EFB Copy config
// ----------------
case BPMEM_EFB_TL : // EFB Source Rect. Top, Left
case BPMEM_EFB_BR : // EFB Source Rect. Bottom, Right (w, h - 1)
case BPMEM_EFB_ADDR : // EFB Target Address
break ;
// --------------
// Clear Config
// --------------
case BPMEM_CLEAR_AR : // Alpha and Red Components
case BPMEM_CLEAR_GB : // Green and Blue Components
case BPMEM_CLEAR_Z : // Z Components (24-bit Zbuffer)
break ;
// -------------------------
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// Bounding Box Control
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// -------------------------
case BPMEM_CLEARBBOX1 :
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case BPMEM_CLEARBBOX2 :
{
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if ( g_ActiveConfig . bUseBBox )
{
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// Don't compute bounding box if this frame is being skipped!
// Wrong but valid values are better than bogus values...
if ( g_bSkipCurrentFrame )
break ;
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if ( bp . address = = BPMEM_CLEARBBOX1 ) {
int right = bp . newvalue > > 10 ;
int left = bp . newvalue & 0x3ff ;
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// We should only set these if bbox is calculated properly.
PixelEngine : : bbox [ 0 ] = left ;
PixelEngine : : bbox [ 1 ] = right ;
PixelEngine : : bbox_active = true ;
} else {
int bottom = bp . newvalue > > 10 ;
int top = bp . newvalue & 0x3ff ;
// We should only set these if bbox is calculated properly.
PixelEngine : : bbox [ 2 ] = top ;
PixelEngine : : bbox [ 3 ] = bottom ;
PixelEngine : : bbox_active = true ;
}
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}
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}
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break ;
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case BPMEM_TEXINVALIDATE : // Used, if game has manual control the Texture Cache, which we don't allow
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DEBUG_LOG ( VIDEO , " BP Texture Invalid: %08x " , bp . newvalue ) ;
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break ;
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case BPMEM_ZCOMPARE : // Set the Z-Compare and EFB pixel format
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g_renderer - > SetColorMask ( ) ; // alpha writing needs to be disabled if the new pixel format doesn't have an alpha channel
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OnPixelFormatChange ( bp ) ;
break ;
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case BPMEM_MIPMAP_STRIDE : // MipMap Stride Channel
case BPMEM_COPYYSCALE : // Display Copy Y Scale
case BPMEM_IREF : /* 24 RID
21 BC3 - Ind . Tex Stage 3 NTexCoord
18 BI3 - Ind . Tex Stage 3 NTexMap
15 BC2 - Ind . Tex Stage 2 NTexCoord
12 BI2 - Ind . Tex Stage 2 NTexMap
9 BC1 - Ind . Tex Stage 1 NTexCoord
6 BI1 - Ind . Tex Stage 1 NTexMap
3 BC0 - Ind . Tex Stage 0 NTexCoord
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0 BI0 - Ind . Tex Stage 0 NTexMap */
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case BPMEM_TEV_KSEL : // Texture Environment Swap Mode Table 0
case BPMEM_TEV_KSEL + 1 : // Texture Environment Swap Mode Table 1
case BPMEM_TEV_KSEL + 2 : // Texture Environment Swap Mode Table 2
case BPMEM_TEV_KSEL + 3 : // Texture Environment Swap Mode Table 3
case BPMEM_TEV_KSEL + 4 : // Texture Environment Swap Mode Table 4
case BPMEM_TEV_KSEL + 5 : // Texture Environment Swap Mode Table 5
case BPMEM_TEV_KSEL + 6 : // Texture Environment Swap Mode Table 6
case BPMEM_TEV_KSEL + 7 : // Texture Environment Swap Mode Table 7
case BPMEM_BP_MASK : // This Register can be used to limit to which bits of BP registers is actually written to. the mask is
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// only valid for the next BP command, and will reset itself.
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case BPMEM_IND_IMASK : // Index Mask ?
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case BPMEM_REVBITS : // Always set to 0x0F when GX_InitRevBits() is called.
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break ;
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case BPMEM_UNKNOWN_57 : // Sunshine alternates this register between values 0x000 and 0xAAA
DEBUG_LOG ( VIDEO , " Unknown BP Reg 0x57: %08x " , bp . newvalue ) ;
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break ;
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case BPMEM_PRELOAD_ADDR :
case BPMEM_PRELOAD_TMEMEVEN :
case BPMEM_PRELOAD_TMEMODD : // Used when PRELOAD_MODE is set
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break ;
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case BPMEM_PRELOAD_MODE : // Set to 0 when GX_TexModeSync() is called.
// if this is different from 0, manual TMEM management is used.
if ( bp . newvalue ! = 0 )
{
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// NOTE(neobrain): Apparently tmemodd doesn't affect hardware behavior at all (libogc uses it just as a buffer and switches its contents with tmemeven whenever this is called)
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BPS_TmemConfig & tmem_cfg = bpmem . tmem_config ;
u8 * ram_ptr = Memory : : GetPointer ( tmem_cfg . preload_addr < < 5 ) ;
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u32 tmem_addr = tmem_cfg . preload_tmem_even * TMEM_LINE_SIZE ;
u32 size = tmem_cfg . preload_tile_info . count * 32 ;
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// Check if the game has overflowed TMEM, and copy up to the limit.
// Paper Mario does this when entering the Great Boogly Tree (Chap 2)
// TODO: Does this wrap?
if ( ( tmem_addr + size ) > TMEM_SIZE )
size = TMEM_SIZE - tmem_addr ;
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memcpy ( texMem + tmem_addr , ram_ptr , size ) ;
}
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break ;
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// ------------------------------------------------
// On Default, we try to look for other things
// before we give up and say its an unknown opcode
// ------------------------------------------------
default :
switch ( bp . address & 0xFC ) // Texture sampler filter
{
// -------------------------
// Texture Environment Order
// -------------------------
case BPMEM_TREF :
case BPMEM_TREF + 4 :
break ;
// ----------------------
// Set wrap size
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// ----------------------
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case BPMEM_SU_SSIZE :
case BPMEM_SU_TSIZE :
case BPMEM_SU_SSIZE + 2 :
case BPMEM_SU_TSIZE + 2 :
case BPMEM_SU_SSIZE + 4 :
case BPMEM_SU_TSIZE + 4 :
case BPMEM_SU_SSIZE + 6 :
case BPMEM_SU_TSIZE + 6 :
case BPMEM_SU_SSIZE + 8 :
case BPMEM_SU_TSIZE + 8 :
case BPMEM_SU_SSIZE + 10 :
case BPMEM_SU_TSIZE + 10 :
case BPMEM_SU_SSIZE + 12 :
case BPMEM_SU_TSIZE + 12 :
case BPMEM_SU_SSIZE + 14 :
case BPMEM_SU_TSIZE + 14 :
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PixelShaderManager : : SetTexCoordChanged ( ( bp . address - BPMEM_SU_SSIZE ) > > 1 ) ;
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break ;
// ------------------------
// BPMEM_TX_SETMODE0 - (Texture lookup and filtering mode) LOD/BIAS Clamp, MaxAnsio, LODBIAS, DiagLoad, Min Filter, Mag Filter, Wrap T, S
// BPMEM_TX_SETMODE1 - (LOD Stuff) - Max LOD, Min LOD
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// ------------------------
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case BPMEM_TX_SETMODE0 : // (0x90 for linear)
case BPMEM_TX_SETMODE0_4 :
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// Shouldn't need to call this here, we call it for each active texture right before rendering
SetTextureMode ( bp ) ;
break ;
case BPMEM_TX_SETMODE1 :
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case BPMEM_TX_SETMODE1_4 :
break ;
// --------------------------------------------
// BPMEM_TX_SETIMAGE0 - Texture width, height, format
// BPMEM_TX_SETIMAGE1 - even LOD address in TMEM - Image Type, Cache Height, Cache Width, TMEM Offset
// BPMEM_TX_SETIMAGE2 - odd LOD address in TMEM - Cache Height, Cache Width, TMEM Offset
// BPMEM_TX_SETIMAGE3 - Address of Texture in main memory
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// --------------------------------------------
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case BPMEM_TX_SETIMAGE0 :
case BPMEM_TX_SETIMAGE0_4 :
case BPMEM_TX_SETIMAGE1 :
case BPMEM_TX_SETIMAGE1_4 :
case BPMEM_TX_SETIMAGE2 :
case BPMEM_TX_SETIMAGE2_4 :
case BPMEM_TX_SETIMAGE3 :
case BPMEM_TX_SETIMAGE3_4 :
break ;
// -------------------------------
// Set a TLUT
// BPMEM_TX_SETTLUT - Format, TMEM Offset (offset of TLUT from start of TMEM high bank > > 5)
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// -------------------------------
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case BPMEM_TX_SETTLUT :
case BPMEM_TX_SETLUT_4 :
break ;
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// ---------------------------------------------------
// Set the TEV Color
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// ---------------------------------------------------
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case BPMEM_TEV_REGISTER_L : // Reg 1
case BPMEM_TEV_REGISTER_H :
case BPMEM_TEV_REGISTER_L + 2 : // Reg 2
case BPMEM_TEV_REGISTER_H + 2 :
case BPMEM_TEV_REGISTER_L + 4 : // Reg 3
case BPMEM_TEV_REGISTER_H + 4 :
case BPMEM_TEV_REGISTER_L + 6 : // Reg 4
case BPMEM_TEV_REGISTER_H + 6 :
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// some games only send the _L part, so always update
// there actually are 2 register behind each of these
// addresses, selected by the type bit.
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{
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// don't compare with changes!
int num = ( bp . address > > 1 ) & 0x3 ;
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if ( ( bp . address & 1 ) = = 0 )
PixelShaderManager : : SetColorChanged ( bpmem . tevregs [ num ] . low . type , num , false ) ;
else
PixelShaderManager : : SetColorChanged ( bpmem . tevregs [ num ] . high . type , num , true ) ;
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}
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break ;
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// ------------------------------------------------
// On Default, we try to look for other things
// before we give up and say its an unknown opcode
// again ...
// ------------------------------------------------
default :
switch ( bp . address & 0xF0 )
{
// --------------
// Indirect Tev
// --------------
case BPMEM_IND_CMD :
case BPMEM_IND_CMD + 1 :
case BPMEM_IND_CMD + 2 :
case BPMEM_IND_CMD + 3 :
case BPMEM_IND_CMD + 4 :
case BPMEM_IND_CMD + 5 :
case BPMEM_IND_CMD + 6 :
case BPMEM_IND_CMD + 7 :
case BPMEM_IND_CMD + 8 :
case BPMEM_IND_CMD + 9 :
case BPMEM_IND_CMD + 10 :
case BPMEM_IND_CMD + 11 :
case BPMEM_IND_CMD + 12 :
case BPMEM_IND_CMD + 13 :
case BPMEM_IND_CMD + 14 :
case BPMEM_IND_CMD + 15 :
break ;
// --------------------------------------------------
// Set Color/Alpha of a Tev
// BPMEM_TEV_COLOR_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D
// BPMEM_TEV_ALPHA_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D, T Swap, R Swap
// --------------------------------------------------
case BPMEM_TEV_COLOR_ENV : // Texture Environment 1
case BPMEM_TEV_ALPHA_ENV :
case BPMEM_TEV_COLOR_ENV + 2 : // Texture Environment 2
case BPMEM_TEV_ALPHA_ENV + 2 :
case BPMEM_TEV_COLOR_ENV + 4 : // Texture Environment 3
case BPMEM_TEV_ALPHA_ENV + 4 :
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case BPMEM_TEV_COLOR_ENV + 6 : // Texture Environment 4
case BPMEM_TEV_ALPHA_ENV + 6 :
case BPMEM_TEV_COLOR_ENV + 8 : // Texture Environment 5
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case BPMEM_TEV_ALPHA_ENV + 8 :
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case BPMEM_TEV_COLOR_ENV + 10 : // Texture Environment 6
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case BPMEM_TEV_ALPHA_ENV + 10 :
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case BPMEM_TEV_COLOR_ENV + 12 : // Texture Environment 7
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case BPMEM_TEV_ALPHA_ENV + 12 :
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case BPMEM_TEV_COLOR_ENV + 14 : // Texture Environment 8
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case BPMEM_TEV_ALPHA_ENV + 14 :
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case BPMEM_TEV_COLOR_ENV + 16 : // Texture Environment 9
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case BPMEM_TEV_ALPHA_ENV + 16 :
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case BPMEM_TEV_COLOR_ENV + 18 : // Texture Environment 10
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case BPMEM_TEV_ALPHA_ENV + 18 :
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case BPMEM_TEV_COLOR_ENV + 20 : // Texture Environment 11
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case BPMEM_TEV_ALPHA_ENV + 20 :
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case BPMEM_TEV_COLOR_ENV + 22 : // Texture Environment 12
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case BPMEM_TEV_ALPHA_ENV + 22 :
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case BPMEM_TEV_COLOR_ENV + 24 : // Texture Environment 13
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case BPMEM_TEV_ALPHA_ENV + 24 :
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case BPMEM_TEV_COLOR_ENV + 26 : // Texture Environment 14
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case BPMEM_TEV_ALPHA_ENV + 26 :
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case BPMEM_TEV_COLOR_ENV + 28 : // Texture Environment 15
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case BPMEM_TEV_ALPHA_ENV + 28 :
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case BPMEM_TEV_COLOR_ENV + 30 : // Texture Environment 16
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case BPMEM_TEV_ALPHA_ENV + 30 :
break ;
default :
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WARN_LOG ( VIDEO , " Unknown BP opcode: address = 0x%08x value = 0x%08x " , bp . address , bp . newvalue ) ;
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break ;
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}
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}
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}
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}